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1. 发明授权

US06937496B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06937496B2
公开(公告)日：2005-08-30
申请号：US10757441
申请日：2004-01-15
申请人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
发明人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
IPC分类号： G11C11/413 , G05F1/56 , G11C5/14 , G11C11/407 , H01L21/822 , H01L27/04 , G11C11/36
CPC分类号： G11C5/14 , G11C5/147
摘要： A semiconductor device having a first circuit block supplied with a first operating voltage, a second circuit block supplied with a second operating voltage, a voltage generating circuit for generating a third operating voltage in response to the first operating voltage, and a third circuit block supplied with the third operating voltage. Preferably, the third operating voltage is generated such that the first operating voltage is increased to a fourth operating voltage by a voltage-up converter, and then the fourth operating voltage is dropped to the third operating voltage by a voltage down-converter. Hence, a power supply operating internally stably in spite of use of a relatively fluctuating voltage can be provided even in the case where a power-supply voltage is dropped.
摘要翻译：一种半导体器件，具有提供有第一工作电压的第一电路块，提供有第二工作电压的第二电路块，用于响应于第一工作电压产生第三工作电压的电压产生电路，以及提供的第三电路块具有第三工作电压。优选地，产生第三工作电压，使得通过升压转换器将第一工作电压增加到第四工作电压，然后通过电压下变频器将第四工作电压降至第三工作电压。因此，即使在电源电压下降的情况下，即使使用相对波动的电压也能够内部稳定工作的电源。

2. 发明授权

US06711071B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06711071B2
公开(公告)日：2004-03-23
申请号：US10319511
申请日：2002-12-16
申请人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
发明人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
IPC分类号： G11C700
CPC分类号： G11C5/14 , G11C5/147
摘要： A semiconductor device having a first circuit block supplied with a first operating voltage, a second circuit block supplied with a second operating voltage, a voltage generating circuit for generating a third operating voltage in response to the first operating voltage, and a third circuit block supplied with the third operating voltage. Preferably, the third operating voltage is generated such that the first operating voltage is increased to a fourth operating voltage by a voltage-up converter, and then the fourth operating voltage is dropped to the third operating voltage by a voltage down-converter. Hence, a power supply operating internally stably in spite of use of a relatively fluctuating voltage can be provided even in the case where a power-supply voltage is dropped.
摘要翻译：一种半导体器件，具有提供有第一工作电压的第一电路块，提供有第二工作电压的第二电路块，用于响应于第一工作电压产生第三工作电压的电压产生电路，以及提供的第三电路块具有第三工作电压。优选地，产生第三工作电压，使得通过升压转换器将第一工作电压增加到第四工作电压，然后通过电压下变频器将第四工作电压降至第三工作电压。因此，即使在电源电压下降的情况下，即使使用相对波动的电压也能够内部稳定地工作的电源。

3. 发明授权

US06515918B2 Semiconductor device 有权
公开(公告)号：US06515918B2
公开(公告)日：2003-02-04
申请号：US10067902
申请日：2002-02-08
申请人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
发明人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
IPC分类号： G11C700
CPC分类号： G11C5/14 , G11C5/147
摘要： A semiconductor device having a first circuit block supplied with a first operating voltage, a second circuit block supplied with a second operating voltage, a voltage generating circuit for generating a third operating voltage in response to the first operating voltage, and a third circuit block supplied with the third operating voltage. Preferably, the third operating voltage is generated such that the first operating voltage is increased to a fourth operating voltage by a voltage-up converter, and then the fourth operating voltage is dropped to the third operating voltage by a voltage down-converter. Hence, a power supply operating internally stably in spite of use of a relatively fluctuating voltage can be provided even in the case where a power-supply voltage is dropped.

4. 发明授权

US06366506B1 Semiconductor device operating by receiving a plurality of operating voltages 有权
标题翻译：半导体器件通过接收多个工作电压而工作
公开(公告)号：US06366506B1
公开(公告)日：2002-04-02
申请号：US09639742
申请日：2000-08-15
申请人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
发明人： Hiroyuki Mizuno , Takao Watanabe , Mitsuru Hiraki , Hitoshi Tanaka
IPC分类号： G11C700
CPC分类号： G11C5/14 , G11C5/147
摘要： A semiconductor device having a first circuit block supplied with a first operating voltage, a second circuit block supplied with a second operating voltage, a voltage generating circuit for generating a third operating voltage in response to the first operating voltage, and a third circuit block supplied with the third operating voltage. Preferably, the third operating voltage is generated such that the first operating voltage is increased to a fourth operating voltage by a voltage-up converter, and then the fourth operating voltage is dropped to the third operating voltage by a voltage down-converter. Hence, a power supply operating internally stably in spite of use of a relatively fluctuating voltage can be provided even in the case where a power-supply voltage is dropped.
摘要翻译：一种半导体器件，具有提供有第一工作电压的第一电路块，提供有第二工作电压的第二电路块，用于响应于第一工作电压产生第三工作电压的电压产生电路，以及提供的第三电路块具有第三工作电压。优选地，产生第三工作电压，使得通过升压转换器将第一工作电压增加到第四工作电压，然后通过电压下变频器将第四工作电压降至第三工作电压。因此，即使在电源电压下降的情况下，即使使用相对波动的电压也能够内部稳定地工作的电源。

5. 发明授权

US07002397B2 Method of setting back bias of MOS circuit, and MOS integrated circuit 失效
公开(公告)号：US07002397B2
公开(公告)日：2006-02-21
申请号：US10401734
申请日：2003-03-31
申请人： Masaharu Kubo , Mitsuru Hiraki , Hiroyuki Mizuno , Syuji Ikeda
发明人： Masaharu Kubo , Mitsuru Hiraki , Hiroyuki Mizuno , Syuji Ikeda
IPC分类号： H03K3/01
CPC分类号： H01L27/0928 , H01L21/761 , H01L27/1203 , H03K3/356113
摘要： In a MOS circuit comprising a plurality of MOSFETs constituting a digital circuit, an input signal is supplied to the digital circuit, and a first back bias voltage is supplied to a semiconductor substrate or a semiconductor well region in which the MOSFETs are formed, so that a pn junction between the semiconductor substrate or the semiconductor well region and a source region is brought to a forward voltage. In a non-operating state in which a circuit operation is suspended by the input signal supplied to the digital circuit as a fixed level, a second back bias voltage is applied to the semiconductor substrate or the semiconductor well region so that the pn junction between the semiconductor substrate or the semiconductor well region and the source region is brought to a reverse voltage.

6. 发明授权

US07876589B2 Semiconductor circuit device and data processing system 失效
公开(公告)号：US07876589B2
公开(公告)日：2011-01-25
申请号：US12654718
申请日：2009-12-30
申请人： Masashi Horiguchi , Mitsuru Hiraki
发明人： Masashi Horiguchi , Mitsuru Hiraki
IPC分类号： H02M1/00 , G05F1/40 , H02M3/06
CPC分类号： G05F3/242 , H01L2224/16145 , H01L2224/32245 , H01L2224/48137 , H01L2224/4826 , H01L2224/73215 , Y10T307/76 , H01L2924/00
摘要： Occurrence of power supply noise arising in connection with a step-down action at the time of turning on power supply is to be restrained. A step-down unit is provided with a switched capacitor type step-down circuit and a series regulator type step-down circuit, and stepped-down voltage output terminals of the step-down circuits are connected in common. The common connection of the stepped-down voltage output terminals of both step-down circuits makes possible parallel driving of both, selective driving of either or consecutive driving of the two. In the consecutive driving, even if the switched capacitor type step-down circuit is driven after driving the series regulator type step-down circuit first to supply a stepped-down voltage to loads, the switched capacitor type step-down circuit will need only to be compensated for a discharge due to the loads, and a peak of a charge current for capacitors can be kept low. When operation of the switched capacitor type step-down circuit is started, no large rush current arises, and occurrence of noise is restrained.

7. 发明申请

US20100157689A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100157689A1
公开(公告)日：2010-06-24
申请号：US12718111
申请日：2010-03-05
申请人： TOSHIHIRO TANAKA , Yukiko Umemoto , Mitsuru Hiraki , Yutaka Shinagawa , Masamichi Fujito , Kazufumi Suzukawa , Hiroyuki Tanikawa , Takashi Yamaki , Yoshiaki Kamigaki , Shinichi Minami , Kozo Katayama , Nozomu Matsuzaki
发明人： TOSHIHIRO TANAKA , Yukiko Umemoto , Mitsuru Hiraki , Yutaka Shinagawa , Masamichi Fujito , Kazufumi Suzukawa , Hiroyuki Tanikawa , Takashi Yamaki , Yoshiaki Kamigaki , Shinichi Minami , Kozo Katayama , Nozomu Matsuzaki
IPC分类号： G11C16/06 , H01L29/788 , G11C16/04
CPC分类号： G11C16/26 , G11C5/025 , G11C8/08 , G11C16/04 , G11C16/0425 , G11C16/0433 , G11C16/08 , G11C16/24 , G11C16/30 , H01L21/28 , H01L21/28273 , H01L27/105 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11546 , H01L29/42328 , H01L29/42332 , H01L29/4234 , H01L29/66825 , H01L29/7885 , H01L29/792
摘要： A semiconductor device includes a plurality of nonvolatile memory cells (1). Each of the nonvolatile memory cells comprises a MOS type first transistor section (3) used for information storage, and a MOS type second transistor section (4) which selects the first transistor section. The second transistor section has a bit line electrode (16) connected to a bit line, and a control gate electrode (18) connected to a control gate control line. The first transistor section has a source line electrode (10) connected to a source line, a memory gate electrode (14) connected to a memory gate control line, and a charge storage region (11) disposed directly below the memory gate electrode. A gate withstand voltage of the second transistor section is lower than that of the first transistor section. Assuming that the thickness of a gate insulating film of the second transistor section is defined as tc and the thickness of a gate insulating film of the first transistor section is defined as tm, they have a relationship of tc
摘要翻译：半导体器件包括多个非易失性存储单元（1）。每个非易失性存储单元包括用于信息存储的MOS型第一晶体管部分（3）和选择第一晶体管部分的MOS型第二晶体管部分（4）。第二晶体管部分具有连接到位线的位线电极（16）和连接到控制栅极控制线的控制栅电极（18）。第一晶体管部分具有连接到源极线的源极线电极（10），连接到存储器栅极控制线的存储栅电极（14）和直接位于存储栅电极下方的电荷存储区域（11）。第二晶体管部分的栅极耐受电压低于第一晶体管部分的栅极耐受电压。假设第二晶体管部分的栅极绝缘膜的厚度被定义为tc，并且第一晶体管部分的栅极绝缘膜的厚度被定义为tm，它们具有tc

8. 发明授权

US07700992B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07700992B2
公开(公告)日：2010-04-20
申请号：US12142566
申请日：2008-06-19
申请人： Toshihiro Tanaka , Yukiko Umemoto , Mitsuru Hiraki , Yutaka Shinagawa , Masamichi Fujito , Kazufumi Suzukawa , Hiroyuki Tanikawa , Takashi Yamaki , Yoshiaki Kamigaki , Shinichi Minami , Kozo Katayama , Nozomu Matsuzaki
发明人： Toshihiro Tanaka , Yukiko Umemoto , Mitsuru Hiraki , Yutaka Shinagawa , Masamichi Fujito , Kazufumi Suzukawa , Hiroyuki Tanikawa , Takashi Yamaki , Yoshiaki Kamigaki , Shinichi Minami , Kozo Katayama , Nozomu Matsuzaki
IPC分类号： G11C11/34
CPC分类号： G11C16/26 , G11C5/025 , G11C8/08 , G11C16/04 , G11C16/0425 , G11C16/0433 , G11C16/08 , G11C16/24 , G11C16/30 , H01L21/28 , H01L21/28273 , H01L27/105 , H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11546 , H01L29/42328 , H01L29/42332 , H01L29/4234 , H01L29/66825 , H01L29/7885 , H01L29/792
摘要： A semiconductor device includes a plurality of nonvolatile memory cells (1). Each of the nonvolatile memory cells comprises a MOS type first transistor section (3) used for information storage, and a MOS type second transistor section (4) which selects the first transistor section. The second transistor section has a bit line electrode (16) connected to a bit line, and a control gate electrode (18) connected to a control gate control line. The first transistor section has a source line electrode (10) connected to a source line, a memory gate electrode (14) connected to a memory gate control line, and a charge storage region (11) disposed directly below the memory gate electrode. A gate withstand voltage of the second transistor section is lower than that of the first transistor section. Assuming that the thickness of a gate insulating film of the second transistor section is defined as tc and the thickness of a gate insulating film of the first transistor section is defined as tm, they have a relationship of tc
摘要翻译：半导体器件包括多个非易失性存储单元（1）。每个非易失性存储单元包括用于信息存储的MOS型第一晶体管部分（3）和选择第一晶体管部分的MOS型第二晶体管部分（4）。第二晶体管部分具有连接到位线的位线电极（16）和连接到控制栅极控制线的控制栅电极（18）。第一晶体管部分具有连接到源极线的源极线电极（10），连接到存储器栅极控制线的存储栅电极（14）和直接位于存储栅电极下方的电荷存储区域（11）。第二晶体管部分的栅极耐受电压低于第一晶体管部分的栅极耐受电压。假设第二晶体管部分的栅极绝缘膜的厚度被定义为tc，并且第一晶体管部分的栅极绝缘膜的厚度被定义为tm，它们具有tc

9. 发明授权

US07692997B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US07692997B2
公开(公告)日：2010-04-06
申请号：US12165979
申请日：2008-07-01
申请人： Masashi Horiguchi , Mitsuru Hiraki
发明人： Masashi Horiguchi , Mitsuru Hiraki
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , H03K19/0013
摘要： A semiconductor integrated circuit device with reduced consumption current is provided. A first step-down circuit stationarily forms internal voltage lower than supply voltage supplied through an external terminal. A second step-down circuit is switched between first mode and second mode according to control signals. In first mode, the internal voltage is formed from the supply voltage supplied through the external terminal and is outputted through a second output terminal. In second mode, operating current for a control system that forms the internal voltage is interrupted and an output high impedance state is established. The first output terminal of the first step-down circuit and the second output terminal of the second step-down circuit are connected in common, and the internal voltage is supplied to internal circuits.
摘要翻译：提供了具有降低的消耗电流的半导体集成电路器件。第一降压电路固定地形成低于通过外部端子提供的电源电压的内部电压。根据控制信号，第二降压电路在第一模式和第二模式之间切换。在第一模式中，内部电压由通过外部端子提供的电源电压形成，并通过第二输出端子输出。在第二模式中，形成内部电压的控制系统的工作电流被中断，并且建立了输出高阻抗状态。第一降压电路的第一输出端子和第二降压电路的第二输出端子共同连接，内部电压被提供给内部电路。

10. 发明授权

US07630178B2 Semiconductor integrated circuit 失效
标题翻译：半导体集成电路
公开(公告)号：US07630178B2
公开(公告)日：2009-12-08
申请号：US12180329
申请日：2008-07-25
申请人： Takayasu Ito , Mitsuru Hiraki , Koichi Ashiga
发明人： Takayasu Ito , Mitsuru Hiraki , Koichi Ashiga
IPC分类号： H02H3/22
CPC分类号： H01L23/50 , H01L23/60 , H01L24/06 , H01L27/0207 , H01L27/0266 , H01L2224/05553 , H01L2224/05554 , H01L2924/01029 , H01L2924/12032 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H02M3/00 , H02M3/07 , H02M3/157 , H01L2924/00
摘要： An integrated circuit formed on a semiconductor chip includes voltage regulators for stepping down an externally-supplied power voltage to produce an internal power voltage, and internal circuits which operate based on the internal power voltage. The voltage regulators are laid in the area of the buffers and protective elements for the input/output signals and power voltages so that the overhead area due to the on-chip provision of the voltage regulators is minimized. The internal power voltage is distributed to the internal circuits through a looped main power line, with an electrode pad for connecting an external capacitor for stabilizing the internal power voltage being provided on it, so that the internal power voltage is stabilized and the power consumption of the integrated circuit is minimized.
摘要翻译：形成在半导体芯片上的集成电路包括用于降低外部提供的电源电压以产生内部电源电压的电压调节器，以及基于内部电源电压工作的内部电路。电压调节器被放置在缓冲器和保护元件的区域中用于输入/输出信号和电源电压，使得由于电压调节器的片上提供而导致的开销面积被最小化。内部电源电压通过环形主电源线分配到内部电路，电极焊盘用于连接外部电容器，用于稳定其上提供的内部电源电压，从而内部电源电压稳定，功耗集成电路最小化。

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