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    • 4. 发明申请
    • ACTIVE MATRIX SUBSTRATE
    • 主动矩阵基板
    • US20130009160A1
    • 2013-01-10
    • US13635200
    • 2010-12-07
    • Hiromitsu KatsuiWataru NakamuraKenichi Kitoh
    • Hiromitsu KatsuiWataru NakamuraKenichi Kitoh
    • H01L27/15
    • H01L27/1248G02F1/136227G02F1/136286H01L27/1244
    • Disposed on an insulating substrate (10a) are a plurality of TFTs arranged in a matrix, each including a drain electrode (18b) in which a first conductive layer (16b) and a second conductive layer (17bb) are laminated in this order; an interlayer insulating film (21) deposited on each of the TFTs, in which a plurality of contact holes (21a) reaching to the respective drain electrodes (18b) are formed; and a plurality of pixel electrodes (22a) disposed on the interlayer insulating film (21) in a matrix, each connected to a corresponding drain electrode (18b) via a corresponding contact hole (21a), being susceptible to an electric corrosion reaction with the second conductive layer (17bb). At a side of the drain electrode, which is connected to the pixel electrode (22a), a top surface of the first conductive layer (16b) is exposed from the second conductive layer (17bb). The interlayer insulating film (21) is disposed to cover the second conductive layer (17bb).
    • 设置在绝缘基板(10a)上的是排列成矩阵状的多个TFT,每个TFT依次层叠有第一导电层(16b)和第二导电层(17bb),漏电极(18b) 沉积在每个TFT上的层间绝缘膜(21),其中形成到达各个漏电极(18b)的多个接触孔(21a); 以及以矩阵形式设置在所述层间绝缘膜(21)上的多个像素电极(22a),每个像素电极通过相应的接触孔(21a)连接到相应的漏极电极(18b),所述接触孔易受到与 第二导电层(17bb)。 在与像素电极(22a)连接的漏电极的一侧,第一导电层(16b)的顶表面从第二导电层(17bb)露出。 层间绝缘膜(21)设置成覆盖第二导电层(17bb)。