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1. 发明申请

US20060071669A1 Method of measuring electric field distribution and electric field distribution measuring instrument 有权
标题翻译：测量电场分布和电场分布测量仪的方法
公开(公告)号：US20060071669A1
公开(公告)日：2006-04-06
申请号：US11236733
申请日：2005-09-28
申请人： Hiroki Funato , Takashi Suga , Kouichi Uesaka , Satoshi Nakamura
发明人： Hiroki Funato , Takashi Suga , Kouichi Uesaka , Satoshi Nakamura
IPC分类号： G01R27/04
CPC分类号： G01R29/0871 , G01R29/0814 , G01R29/0892 , G01R31/002
摘要： A method and apparatus for measuring an electric field distribution according to the present invention calculates a distribution of electric field intensity and its direction at arbitrary positions on the surface of the electronic apparatus or its circumference with use of data of measurement positions and measurement results of a potential distribution on a surface of an electronic apparatus. Further, it clearly indicates a flow of electromagnetic energy on the surface or in the circumference of the electronic apparatus by applying mathematical treatments to a magnetic field distribution at circumferential positions of the electronic apparatus. Thus, a distribution of high-frequency electric field generated from the electronic apparatus is measured with high accuracy.
摘要翻译：根据本发明的用于测量电场分布的方法和装置使用测量位置和测量结果的数据来计算电子设备或其周围上的任意位置处的电场强度及其方向的分布在电子设备的表面上的电位分布。此外，通过对电子设备的圆周位置的磁场分布应用数学处理，清楚地表示电子设备的表面或周围的电磁能量的流动。因此，以高精度测量从电子设备产生的高频电场的分布。

2. 发明授权

US07315173B2 Method of measuring electric field distribution and electric field distribution measuring instrument 有权
标题翻译：测量电场分布和电场分布测量仪的方法
公开(公告)号：US07315173B2
公开(公告)日：2008-01-01
申请号：US11236733
申请日：2005-09-28
申请人： Hiroki Funato , Takashi Suga , Kouichi Uesaka , Satoshi Nakamura
发明人： Hiroki Funato , Takashi Suga , Kouichi Uesaka , Satoshi Nakamura
IPC分类号： G01R27/04 , G01R31/302 , G01R29/12 , G01N27/60
CPC分类号： G01R29/0871 , G01R29/0814 , G01R29/0892 , G01R31/002
摘要： A method and apparatus for measuring an electric field distribution according to the present invention calculates a distribution of electric field intensity and its direction at arbitrary positions on the surface of the electronic apparatus or its circumference with use of data of measurement positions and measurement results of a potential distribution on a surface of an electronic apparatus. Further, it clearly indicates a flow of electromagnetic energy on the surface or in the circumference of the electronic apparatus by applying mathematical treatments to a magnetic field distribution at circumferential positions of the electronic apparatus. Thus, a distribution of high-frequency electric field generated from the electronic apparatus is measured with high accuracy.
摘要翻译：根据本发明的用于测量电场分布的方法和装置使用测量位置和测量结果的数据来计算电子设备或其周围上的任意位置处的电场强度及其方向的分布在电子设备的表面上的电位分布。此外，通过对电子设备的圆周位置的磁场分布应用数学处理，清楚地表示电子设备的表面或周围的电磁能量的流动。因此，以高精度测量从电子设备产生的高频电场的分布。

3. 发明授权

US06875920B2 Semiconductor device and design support method of electronic device using the same 失效
标题翻译：电子设备的半导体器件和设计支持方法使用相同
公开(公告)号：US06875920B2
公开(公告)日：2005-04-05
申请号：US10243965
申请日：2002-09-13
申请人： Satoshi Nakamura , Takashi Suga , Atsushi Nakamura , Hitoshi Yokota , Tsutomu Hara , Kouichi Uesaka , Tatsuji Noma , Makoto Torigoe
发明人： Satoshi Nakamura , Takashi Suga , Atsushi Nakamura , Hitoshi Yokota , Tsutomu Hara , Kouichi Uesaka , Tatsuji Noma , Makoto Torigoe
IPC分类号： G06F17/50 , H01L21/00 , H01L21/82 , H01L23/00 , H01L23/544 , H01L23/552 , H05K1/02 , H05K1/18 , H05K3/00 , H01L23/02
CPC分类号： H01L23/544 , H01L21/67282 , H01L23/552 , H01L2223/54406 , H01L2223/5442 , H01L2223/54473 , H01L2223/54486 , H01L2924/0002 , H01L2924/15311 , H05K1/0231 , H05K1/0266 , H05K1/181 , H05K3/0005 , H01L2924/00
摘要： A semiconductor device includes a semiconductor die having patterned circuitry, a plurality of terminals coupled to the die, and an indication providing signal noise information of at least one of the terminals.
摘要翻译：半导体器件包括具有图案化电路的半导体管芯，耦合到管芯的多个端子以及提供至少一个端子的信号噪声信息的指示。

4. 发明授权

US06625554B2 Method and apparatus for determining a magnetic field 失效
公开(公告)号：US06625554B2
公开(公告)日：2003-09-23
申请号：US09888112
申请日：2001-06-22
申请人： Takashi Suga , Kouichi Uesaka , Satoshi Nakamura , Yoshihiko Hayashi
发明人： Takashi Suga , Kouichi Uesaka , Satoshi Nakamura , Yoshihiko Hayashi
IPC分类号： G01R1900
CPC分类号： G01R31/315
摘要： The present invention provides a magnetic field measuring method and system for determining the magnetic field of an integrated circuit (IC) inside the IC package, including the pre-packaged IC. In one embodiment, induced voltages due only to the magnetic field are determined at measurement heights on the order of the line spacings in an integrated circuit. A magnetic probe is used; the probe has a loop of wire parallel to the current, for measuring the induced voltage of the horizontal component of the magnetic field. The induced voltage due to the electric field is removed by using a calculation including the difference of two measurements. The magnetic field distribution for the integrated circuit may be determined by using the above procedure on a grid like pattern above the IC.

5. 发明授权

US07851898B2 Multichip package or system-in package 有权
标题翻译：多芯片封装或系统包装
公开(公告)号：US07851898B2
公开(公告)日：2010-12-14
申请号：US11384277
申请日：2006-03-21
申请人： Satoshi Nakamura , Takashi Suga , Mitsuaki Katagiri , Yukitoshi Hirose
发明人： Satoshi Nakamura , Takashi Suga , Mitsuaki Katagiri , Yukitoshi Hirose
IPC分类号： H01L23/538 , H01L23/52 , H01L25/18 , H01L25/065
CPC分类号： G11C5/04 , G11C5/063 , G11C29/1201 , G11C29/48 , G11C2029/0401 , G11C2029/3602 , H01L2224/32145 , H01L2224/48145 , H01L2224/48227 , H01L2225/06568 , H01L2924/15192 , H01L2924/15311 , H01L2924/181 , H01L2924/00012
摘要： Disclosed is a multichip package or system-in package which the logic chip includes a selector circuit which, by transmitting a test mode select signal or a test mode select command to the logic chip, enables access from a logic signal pin connected to the logic chip, to a memory control signal to each of the “m” number of memory chips; and the memory control signal, when viewed from the logic chip, is connected using a one-for-one wiring scheme or a one-for-up-to-m branch wiring scheme, between the selector circuit and each of the “m” number of memory chips. This multichip package or system-in package is low in noise and high in operational reliability.
摘要翻译：公开了一种多芯片封装或系统级封装，其中逻辑芯片包括选择器电路，其通过将测试模式选择信号或测试模式选择命令发送到逻辑芯片，使得能够从连接到逻辑芯片的逻辑信号引脚到存储器控制信号到每个“m”个存储器芯片; 并且当从逻辑芯片观察时，存储器控制信号使用一对一布线方案或一对多分支布线方案连接，在选择器电路和每个“m” 内存芯片数量这种多芯片封装或系统级封装的噪声低，操作可靠性高。

6. 发明申请

US20080072194A1 METHOD FOR DESIGNING DEVICE, SYSTEM FOR AIDING TO DESIGN DEVICE, AND COMPUTER PROGRAM PRODUCT THEREFOR 失效
标题翻译：用于设计设备的方法，用于设计设备的系统，以及计算机程序产品
公开(公告)号：US20080072194A1
公开(公告)日：2008-03-20
申请号：US11854591
申请日：2007-09-13
申请人： Mitsuaki KATAGIRI , Satoshi Nakamura , Takashi Suga , Hiroya Shimizu , Satoshi Isa , Satoshi Itaya , Yukitoshi Hirose
发明人： Mitsuaki KATAGIRI , Satoshi Nakamura , Takashi Suga , Hiroya Shimizu , Satoshi Isa , Satoshi Itaya , Yukitoshi Hirose
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A method for designing a device that comprises a first semiconductor chip, a second semiconductor chip and an adjustment target is disclosed. The first semiconductor chip comprises an input pad, a first power supply pad and a first ground pad. The second semiconductor chip comprises an output pad coupled to the input pad. The adjustment target is connected to the first and the second semiconductor chips. A main target variable is calculated from an input circuit chip model, an output circuit chip model of the second semiconductor chip in frequency domain and a target impedance model of the adjustment target in frequency domain. The input circuit chip model is created by representing the first semiconductor chip in frequency domain in consideration of a first capacitor model between the input pad and the first power supply pad, a second capacitor model between the input pad and the first ground pad, and a chip internal capacitor model between the first power supply pad and the first ground pad. The main target variable is compared with a predetermined constraint represented in frequency domain to decide design guidelines for the adjustment target.
摘要翻译：公开了一种用于设计包括第一半导体芯片，第二半导体芯片和调整对象的装置的方法。第一半导体芯片包括输入焊盘，第一电源焊盘和第一接地焊盘。第二半导体芯片包括耦合到输入焊盘的输出焊盘。调整对象被连接到第一和第二半导体芯片。主要目标变量由输入电路芯片模型，频域中的第二半导体芯片的输出电路芯片模型和频域中的调整对象的目标阻抗模型计算。考虑到输入焊盘和第一电源焊盘之间的第一电容器模型，在输入焊盘和第一接地焊盘之间的第二电容器模型，以及第一电容器模型芯片内部电容器模型在第一个电源焊盘和第一个接地焊盘之间。将主要目标变量与在频域中表示的预定约束进行比较，以决定调整目标的设计指南。

7. 发明授权

US07694245B2 Method for designing semiconductor package, system for aiding to design semiconductor package, and computer program product therefor 失效
标题翻译：半导体封装设计方法，半导体封装设计系统及其计算机程序产品
公开(公告)号：US07694245B2
公开(公告)日：2010-04-06
申请号：US11710965
申请日：2007-02-27
申请人： Mitsuaki Katagiri , Satoshi Nakamura , Takashi Suga , Yoji Nishio , Satoshi Isa , Satoshi Itaya
发明人： Mitsuaki Katagiri , Satoshi Nakamura , Takashi Suga , Yoji Nishio , Satoshi Isa , Satoshi Itaya
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , H01L23/50 , H01L2224/05554 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H01L2924/3011 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A method for designing a semiconductor package is disclosed, wherein the semiconductor package comprises a semiconductor chip and an adjustment target. A first target variable is calculated in consideration of a first transition state where an output level of the semiconductor chip changes from a low level to a high level. A second target variable is calculated in consideration of a second transition state where an output level of the semiconductor chip changes from the high level to the low level. Inferior one of the first and the second target variables is selected as a main target variable. The main target variable and a predetermined constraint represented in frequency domain are compared to decide design guidelines for the adjustment target.
摘要翻译：公开了一种用于设计半导体封装的方法，其中半导体封装包括半导体芯片和调整对象。考虑到半导体芯片的输出电平从低电平变为高电平的第一转变状态来计算第一目标变量。考虑到半导体芯片的输出电平从高电平变为低电平的第二过渡状态来计算第二目标变量。选择第一和第二目标变量之一作为主要目标变量。比较主要目标变量和在频域中表示的预定约束，以决定调整目标的设计指南。

8. 发明申请

US20150219704A1 Electromagnetic Wave Visualization Device 审中-公开
标题翻译：电磁波可视化装置
公开(公告)号：US20150219704A1
公开(公告)日：2015-08-06
申请号：US14420951
申请日：2012-08-31
申请人： Aya Ohmae , Satoshi Nakamura , Hitoshi Yokota , Takashi Suga
发明人： Aya Ohmae , Satoshi Nakamura , Hitoshi Yokota , Takashi Suga
IPC分类号： G01R29/08
CPC分类号： G01R29/0871 , G01R13/02 , G01R29/08
摘要： Provided is an electromagnetic wave visualization device capable of visualizing multiple sources of electromagnetic noise in real time in a far field and a near field. The electromagnetic wave visualization device includes a sensor configured to detect an electromagnetic wave and output a detection signal of intensity depending on energy level of the detected electromagnetic wave, a variable resistance connected to the sensor, and a resistance adjustment unit configured to adjust a resistance value of the variable resistance connected to the sensor. The electromagnetic wave is visually measured by adjusting a resistance value of the variable resistance at the adjustment unit.
摘要翻译：提供了能够在远场和近场实时地可视化多个电磁噪声源的电磁波可视化装置。电磁波可视化装置包括：传感器，其被配置为检测电磁波，并根据检测到的电磁波的能级输出强度检测信号，连接到传感器的可变电阻;以及电阻调节单元，其被配置为调整电阻值连接到传感器的可变电阻。通过调整调整单元上的可变电阻的电阻值来目视测量电磁波。

9. 发明授权

US08981790B2 Electronic device and noise current measuring method 有权
标题翻译：电子设备和噪声电流测量方法
公开(公告)号：US08981790B2
公开(公告)日：2015-03-17
申请号：US13375742
申请日：2010-05-26
申请人： Satoshi Nakamura , Takashi Suga , Yutaka Uematsu
发明人： Satoshi Nakamura , Takashi Suga , Yutaka Uematsu
IPC分类号： G01R29/26 , G01R31/08 , G01R31/00 , G01R31/28 , H05K9/00 , H05K1/02 , H05K1/14 , H05K3/32
CPC分类号： G01R31/001 , G01R29/26 , G01R31/281 , H05K1/0215 , H05K1/0234 , H05K1/141 , H05K3/325 , H05K9/0039 , H05K9/0069 , H05K2201/10022 , H05K2201/10409 , H05K2201/2036
摘要： A noise current passing through a substrate on which an electronic component is mounted is suppressed in a housing, to provide a malfunction of an electronic device. A substrate (103) on which an electronic component is mounted is secured to a housing (102) by a metal spacer (108) and a screw (104). A noise control member (100) mainly composed of an insulation substance is disposed between the metal spacer (108) and the substrate (103). A first conductive film is formed on the metal spacer-side of the noise control member (100), and a second conductive film is formed on the substrate-side of the noise control member (100). A resistance member (101) is disposed between the first conductive film and the second conductive film. A noise current introduced from the housing to the substrate can be suppressed by the resistance member.
摘要翻译：通过其中安装有电子部件的基板的噪声电流被抑制在壳体中，以提供电子设备的故障。其上安装有电子部件的基板（103）通过金属间隔件（108）和螺钉（104）固定到壳体（102）。主要由绝缘物质组成的噪声控制构件（100）设置在金属间隔件（108）和基板（103）之间。第一导电膜形成在噪声控制部件（100）的金属间隔件侧上，第二导电膜形成在噪声控制部件（100）的基板侧。电阻构件（101）设置在第一导电膜和第二导电膜之间。可以通过电阻元件来抑制从外壳引入基板的噪声电流。

10. 发明申请

US20120119757A1 Electronic Device and Noise Current Measuring Method 有权
标题翻译：电子设备和噪声电流测量方法
公开(公告)号：US20120119757A1
公开(公告)日：2012-05-17
申请号：US13375742
申请日：2010-05-26
申请人： Satoshi Nakamura , Takashi Suga , Yutaka Uetmatsu
发明人： Satoshi Nakamura , Takashi Suga , Yutaka Uetmatsu
IPC分类号： G01R29/26 , H05K7/06
CPC分类号： G01R31/001 , G01R29/26 , G01R31/281 , H05K1/0215 , H05K1/0234 , H05K1/141 , H05K3/325 , H05K9/0039 , H05K9/0069 , H05K2201/10022 , H05K2201/10409 , H05K2201/2036
摘要： A noise current passing through a substrate on which an electronic component is mounted is suppressed in a housing, to provide a malfunction of an electronic device. A substrate (103) on which an electronic component is mounted is secured to a housing (102) by a metal spacer (108) and a screw (104). A noise control member (100) mainly composed of an insulation substance is disposed between the metal spacer (108) and the substrate (103). A first conductive film is formed on the metal spacer-side of the noise control member (100), and a second conductive film is formed on the substrate-side of the noise control member (100). A resistance member (101) is disposed between the first conductive film and the second conductive film. A noise current introduced from the housing to the substrate can be suppressed by the resistance member.
摘要翻译：通过其中安装有电子部件的基板的噪声电流被抑制在壳体中，以提供电子设备的故障。其上安装有电子部件的基板（103）通过金属间隔件（108）和螺钉（104）固定到壳体（102）。主要由绝缘物质组成的噪声控制构件（100）设置在金属间隔件（108）和基板（103）之间。第一导电膜形成在噪声控制部件（100）的金属间隔件侧上，第二导电膜形成在噪声控制部件（100）的基板侧。电阻构件（101）设置在第一导电膜和第二导电膜之间。可以通过电阻元件来抑制从外壳引入基板的噪声电流。

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