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1. 发明授权

US08558321B2 Semiconductor device having gate insulating film including high dielectric material 有权
标题翻译：具有包括高电介质材料的栅极绝缘膜的半导体器件
公开(公告)号：US08558321B2
公开(公告)日：2013-10-15
申请号：US13005085
申请日：2011-01-12
申请人： Hiroji Shimizu , Yoshihiro Sato , Hideyuki Arai , Takayuki Yamada , Tsutomu Oosuka
发明人： Hiroji Shimizu , Yoshihiro Sato , Hideyuki Arai , Takayuki Yamada , Tsutomu Oosuka
IPC分类号： H01L21/40
CPC分类号： H01L27/0629 , H01L28/20
摘要： A semiconductor device includes: a first MIS transistor of a first conductivity type having a first active region as a region of a semiconductor substrate surrounded by an element isolation region formed in an upper portion of the semiconductor substrate, a first gate insulating film having a first high dielectric film formed on the first active region, and a first gate electrode formed on the first gate insulating film; and a resistance element having a second high dielectric film formed on the element isolation region and a resistance layer made of silicon formed on the second high dielectric film. The first high dielectric film and the second high dielectric film include the same high dielectric material, and the first high dielectric film includes a first adjustment metal, but the second high dielectric film does not include the first adjustment metal.
摘要翻译：一种半导体器件包括：第一导电类型的第一MIS晶体管，具有作为由半导体衬底的上部形成的元件隔离区围绕的半导体衬底的区域的第一有源区，第一栅绝缘膜，形成在第一有源区上的高电介质膜和形成在第一栅极绝缘膜上的第一栅电极; 以及电阻元件，其具有形成在元件隔离区域上的第二高电介质膜和形成在第二高介电膜上的由硅制成的电阻层。第一高介电膜和第二高电介质膜包括相同的高介电材料，第一高电介质膜包括第一调节金属，但第二高电介质膜不包括第一调节金属。

2. 发明申请

US20110169100A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110169100A1
公开(公告)日：2011-07-14
申请号：US13005085
申请日：2011-01-12
申请人： Hiroji SHIMIZU , Yoshihiro Sato , Hideyuki Arai , Takayuki Yamada , Tsutomu Oosuka
发明人： Hiroji SHIMIZU , Yoshihiro Sato , Hideyuki Arai , Takayuki Yamada , Tsutomu Oosuka
IPC分类号： H01L29/78 , H01L21/4763
CPC分类号： H01L27/0629 , H01L28/20
摘要： A semiconductor device includes: a first MIS transistor of a first conductivity type having a first active region as a region of a semiconductor substrate surrounded by an element isolation region formed in an upper portion of the semiconductor substrate, a first gate insulating film having a first high dielectric film formed on the first active region, and a first gate electrode formed on the first gate insulating film; and a resistance element having a second high dielectric film formed on the element isolation region and a resistance layer made of silicon formed on the second high dielectric film. The first high dielectric film and the second high dielectric film include the same high dielectric material, and the first high dielectric film includes a first adjustment metal, but the second high dielectric film does not include the first adjustment metal.
摘要翻译：一种半导体器件包括：第一导电类型的第一MIS晶体管，具有作为由半导体衬底的上部形成的元件隔离区围绕的半导体衬底的区域的第一有源区，第一栅绝缘膜，形成在第一有源区上的高电介质膜和形成在第一栅极绝缘膜上的第一栅电极; 以及电阻元件，其具有形成在元件隔离区域上的第二高电介质膜和形成在第二高介电膜上的由硅制成的电阻层。第一高介电膜和第二高电介质膜包括相同的高介电材料，第一高电介质膜包括第一调节金属，但第二高电介质膜不包括第一调节金属。

3. 发明申请

US20110272815A1 SEMICONDUCTOR DEVICE AND LAYOUT DESIGN METHOD FOR THE SAME 有权
标题翻译：半导体器件及其布局设计方法
公开(公告)号：US20110272815A1
公开(公告)日：2011-11-10
申请号：US13013442
申请日：2011-01-25
申请人： Akio Misaka , Yasuko Tabata , Hideyuki Arai , Takayuki Yamada
发明人： Akio Misaka , Yasuko Tabata , Hideyuki Arai , Takayuki Yamada
IPC分类号： H01L23/528 , G06F17/50
CPC分类号： H01L23/528 , G06F17/50 , G06F17/5072 , G06F2217/12 , H01L23/522 , H01L2924/0002 , Y02P90/265 , H01L2924/00
摘要： A semiconductor device includes: a plurality of line features including at least one real feature which includes a gate electrode portion, and at least one dummy feature. Two of multiple ones of the dummy feature, and at least one of the line features interposed between the two dummy features and including the at least one real feature form parallel running line features which are evenly spaced. The parallel running line features have an identical width, and line end portions of the parallel running line features are substantially flush. Line end portion uniformization dummy features are formed on extensions of the line end portions of the parallel running line features. The line end portion uniformization dummy features include a plurality of linear features each having a same width as each of the line features and spaced at intervals equal to an interval between each adjacent pair of the line features.
摘要翻译：半导体器件包括：多个线特征，包括至少一个实际特征，其包括栅电极部分和至少一个虚拟特征。两个虚拟特征中的两个，并且插入在两个虚拟特征之间并且包括至少一个真实特征的线特征中的至少一个形成均匀间隔的并行运行线特征。平行运行线特征具有相同的宽度，并行运行线特征的线端部分基本齐平。线端部均匀化虚拟特征形成在平行运行线特征的线端部的延伸部上。线端部均匀化虚拟特征包括多个线性特征，每个线性特征具有与每个线特征相同的宽度，并以等于每对相邻线特征之间的间隔的间隔间隔开。

4. 发明授权

US08392856B2 Semiconductor device and layout design method for the same 有权
标题翻译：半导体器件和布局设计方法相同
公开(公告)号：US08392856B2
公开(公告)日：2013-03-05
申请号：US13013442
申请日：2011-01-25
申请人： Akio Misaka , Yasuko Tabata , Hideyuki Arai , Takayuki Yamada
发明人： Akio Misaka , Yasuko Tabata , Hideyuki Arai , Takayuki Yamada
IPC分类号： G06F17/50
CPC分类号： H01L23/528 , G06F17/50 , G06F17/5072 , G06F2217/12 , H01L23/522 , H01L2924/0002 , Y02P90/265 , H01L2924/00
摘要： A semiconductor device includes: a plurality of line features including at least one real feature which includes a gate electrode portion, and at least one dummy feature. Two of multiple ones of the dummy feature, and at least one of the line features interposed between the two dummy features and including the at least one real feature form parallel running line features which are evenly spaced. The parallel running line features have an identical width, and line end portions of the parallel running line features are substantially flush. Line end portion uniformization dummy features are formed on extensions of the line end portions of the parallel running line features. The line end portion uniformization dummy features include a plurality of linear features each having a same width as each of the line features and spaced at intervals equal to an interval between each adjacent pair of the line features.
摘要翻译：半导体器件包括：多个线特征，包括至少一个实际特征，其包括栅电极部分和至少一个虚拟特征。两个虚拟特征中的两个，并且插入在两个虚拟特征之间并且包括至少一个真实特征的线特征中的至少一个形成均匀间隔的并行运行线特征。平行运行线特征具有相同的宽度，并行运行线特征的线端部分基本齐平。线端部均匀化虚拟特征形成在平行运行线特征的线端部的延伸部上。线端部均匀化虚拟特征包括多个线性特征，每个线性特征具有与每个线特征相同的宽度，并以等于每对相邻线特征之间的间隔间隔。

5. 发明授权

US06456607B2 Apparatus and method for transmitting an image signal modulated with a spreading code 失效
标题翻译：用于传输用扩展码调制的图像信号的装置和方法
公开(公告)号：US06456607B2
公开(公告)日：2002-09-24
申请号：US08948970
申请日：1997-10-10
申请人： Hideyuki Arai , Hirofumi Suda
发明人： Hideyuki Arai , Hirofumi Suda
IPC分类号： H04B7216
CPC分类号： H04N19/37 , H04J13/0077 , H04J13/10 , H04J13/16 , H04L1/0002 , H04L1/0017 , H04N5/23203 , H04N21/238 , H04N21/2383 , H04N21/4382 , H04N21/6377 , H04N21/6379 , H04N21/658
摘要： An information signal processing apparatus discriminates a significance factor of an input information signal. A modulation process of the information signal is determined in accordance with the discriminated significance factor. The modulated information signal is transmitted to an external apparatus. Since the modulation process of an information signal to be transmitted is controlled basing upon the significance factor of the information signal, both the transmission error rate and transmission rate can be optimized.
摘要翻译：信息信号处理装置识别输入信息信号的有效因子。信息信号的调制处理根据识别的有效因子来确定。调制信息信号被发送到外部设备。由于要根据信息信号的有效因子来控制要发送的信息信号的调制处理，所以可以优化传输错误率和传输速率。

6. 发明授权

US06337928B1 Image transmission apparatus and method therefor 失效
标题翻译：图像传输装置及其方法
公开(公告)号：US06337928B1
公开(公告)日：2002-01-08
申请号：US08909062
申请日：1997-08-14
申请人： Kazuhiro Takahashi , Hideyuki Arai , Masamine Maeda
发明人： Kazuhiro Takahashi , Hideyuki Arai , Masamine Maeda
IPC分类号： G06K936
CPC分类号： H04N5/232 , G06T9/00 , H04N5/145 , H04N5/38 , H04N5/77 , H04N5/772 , H04N21/485
摘要： An image transmission apparatus/method characterized by inputting image data, detecting the motion of the image data, setting a transmission condition of the image data in accordance with the detection of the motion of the image data, processing the image data in accordance with the set transmission condition and transmitting the processed image data. An image transmission apparatus/method characterized by detecting an image pickup condition of the image pickup means for picking up an image, decreasing information amount of image data from the image pickup means, controlling the decreasing operation in accordance with the image pickup condition and transmitting the image data having the information amount decreased. An image transmission apparatus/method characterized by picking up an image to acquire image data, setting an image pickup operation mode, determining a transmission condition of the image data in accordance with the set condition, processing the image data in accordance with the determined transmission condition and transmitting the processed image data.
摘要翻译：一种图像传输装置/方法，其特征在于输入图像数据，检测图像数据的运动，根据图像数据的运动的检测来设置图像数据的发送条件，根据该集合处理图像数据发送条件并发送处理后的图像数据。一种图像传输装置/方法，其特征在于检测用于拾取图像的图像拾取装置的图像拾取条件，减少来自图像拾取装置的图像数据的信息量，控制下降操作一种图像传送装置/方法，其特征在于拾取图像以获取图像数据，设置图像拾取操作模式，确定图像数据的发送状态根据设定条件，按照图像数据进行处理确定的发送条件并发送处理的图像数据。

7. 发明授权

US5966346A Alarm clock 失效
标题翻译：闹钟
公开(公告)号：US5966346A
公开(公告)日：1999-10-12
申请号：US992831
申请日：1997-12-17
申请人： Hideyuki Arai
发明人： Hideyuki Arai
IPC分类号： G04B23/10 , G04C21/36 , G04G13/02 , G04G21/00 , G04B23/00
CPC分类号： G04B23/10 , G04G13/021
摘要： An alarm clock includes a time indicator, a first alarm for sounding a first alarm at a preset time, a manual rotary bezel provided rotatable relative to the time indicator outside same for setting a time elapsing from the alarm time, and a second alarm for sounding a second alarm when the time set by the rotary bezel has elapsed since the preset time. After the first alarm is sounded at the alarm time, and after the time set by the rotary bezel has elapsed, the second alarm is sounded. The time interval after which the second alarm is sounded is set by a simple operation and two-staged sounding ensures proper awakening of the sleeper.
摘要翻译：闹钟包括时间指示器，用于在预设时间发出第一警报的第一警报，相对于外部时间指示器可旋转地设置的手动旋转挡板，用于设置从闹钟时间开始的时间，以及用于发出声音的第二警报当从预设时间开始经过旋转表圈设定的时间时的第二个报警。第一个报警在报警时响起，旋转挡板设定的时间过后，第二个报警响起。发出第二个闹钟的时间间隔是通过简单的操作来设定的，并且两段声音确保睡眠者正确的唤醒。

8. 发明授权

US08330248B2 Semiconductor device, mask for fabrication of semiconductor device, and optical proximity correction method 有权
标题翻译：半导体装置，半导体装置制造用掩模和光学邻近校正方法
公开(公告)号：US08330248B2
公开(公告)日：2012-12-11
申请号：US13014346
申请日：2011-01-26
申请人： Yasuko Tabata , Akio Misaka , Takehiro Hirai , Hideyuki Arai , Yuji Nonami
发明人： Yasuko Tabata , Akio Misaka , Takehiro Hirai , Hideyuki Arai , Yuji Nonami
IPC分类号： H01L31/23
CPC分类号： G06F17/5068 , G03F1/36 , G03F1/38 , H01L21/28123 , H01L21/31144 , H01L21/32139 , H01L27/0207
摘要： A semiconductor device includes a circuit portion including at least one real feature, and a plurality of dummy feature groups each including a plurality of dummy features spaced apart from each other by a first distance. The plurality of dummy feature groups are spaced apart from each other by a second distance larger than the first distance, and the circuit portion and the plurality of dummy feature groups are spaced apart from each other by the second distance.
摘要翻译：半导体器件包括包括至少一个实际特征的电路部分和多个虚拟特征组，每个虚拟特征组包括彼此间隔开第一距离的多个虚拟特征。多个虚拟特征组彼此间隔开大于第一距离的第二距离，并且电路部分和多个虚拟特征组彼此间隔开第二距离。

9. 发明授权

US07932153B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07932153B2
公开(公告)日：2011-04-26
申请号：US12605875
申请日：2009-10-26
申请人： Takashi Nakabayashi , Hideyuki Arai , Mitsuo Nissa
发明人： Takashi Nakabayashi , Hideyuki Arai , Mitsuo Nissa
IPC分类号： H01L21/8236
CPC分类号： H01L21/823456 , H01L21/823412 , H01L21/823462 , H01L27/10894
摘要： A threshold control layer of a second MIS transistor is formed under the same conditions for forming a threshold control layer of a first MIS transistor. LLD regions of the second MIS transistor are formed under the same conditions for forming LDD regions of a third transistor.
摘要翻译：在用于形成第一MIS晶体管的阈值控制层的相同条件下形成第二MIS晶体管的阈值控制层。在与形成第三晶体管的LDD区域相同的条件下形成第二MIS晶体管的LLD区域。

10. 发明授权

US07763922B2 Semiconductor memory and method for manufacturing the same 失效
标题翻译：半导体存储器及其制造方法
公开(公告)号：US07763922B2
公开(公告)日：2010-07-27
申请号：US11152109
申请日：2005-06-15
申请人： Hideyuki Arai , Takashi Nakabayashi , Takashi Ohtsuka
发明人： Hideyuki Arai , Takashi Nakabayashi , Takashi Ohtsuka
IPC分类号： H01L31/062
CPC分类号： H01L27/10852 , H01L27/10811 , H01L27/10888 , H01L28/91
摘要： A capacitor of a semiconductor memory of the present invention includes: a lower electrode which covers the surface of a storage node hole from the bottom to at least one of the sidewalls up to a level lower than the top surface of a second interlayer insulating film; a capacitive insulating film which covers the lower electrode; and an upper electrode which covers the capacitive insulating film.
摘要翻译：本发明的半导体存储器的电容器包括：下电极，其从底部到至少一个侧壁覆盖存储节点孔的表面直到比第二层间绝缘膜的顶表面低的水平; 覆盖下电极的电容绝缘膜; 以及覆盖电容绝缘膜的上电极。

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