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1. 发明授权

US08461887B2 Integrated circuit 有权
标题翻译：集成电路
公开(公告)号：US08461887B2
公开(公告)日：2013-06-11
申请号：US13409770
申请日：2012-03-01
申请人： Hidenori Okuni , Akihide Sai
发明人： Hidenori Okuni , Akihide Sai
IPC分类号： H03L7/06
CPC分类号： H03L7/0891 , H03L7/18
摘要： There is provided an integrated circuit in which a reference-signal source generates a reference signal having a basic frequency, a phase locked loop includes a voltage-controlled oscillator, a first frequency divider to generate a first frequency-divided signal based on the signal by N, a phase detector, a charge pump and a loop filter, the second frequency generates a second frequency-divided signal based on the signal generated by the voltage-controlled oscillator by M, wherein a minimum absolute value of a difference between the basic frequency multiplied by “K” and a frequency of the second frequency-divided signal is equal to or less than a low cutoff frequency of a bandpass filter or equal to or higher than a high cutoff frequency of the bandpass filter, the bandpass filter being represented by a transfer function from an input of the voltage-controlled oscillator to an output of the phase locked loop.
摘要翻译：提供了一种集成电路，其中参考信号源产生具有基本频率的参考信号，锁相环包括压控振荡器，第一分频器，以基于该信号产生第一分频信号 N，相位检测器，电荷泵和环路滤波器，第二频率基于由压控振荡器产生的信号由M产生第二分频信号，其中基本频率之间的差的最小绝对值乘以“K”，并且第二分频信号的频率等于或小于带通滤波器的低截止频率或等于或高于带通滤波器的高截止频率，带通滤波器由从压控振荡器的输入到锁相环的输出的传递函数。

2. 发明申请

US20090033427A1 OSCILLATOR, PLL OSCILLATOR, RADIO APPARATUS 审中-公开
标题翻译：振荡器，PLL振荡器，无线电设备
公开(公告)号：US20090033427A1
公开(公告)日：2009-02-05
申请号：US12246871
申请日：2008-10-07
申请人： Akihide Sai , Hidenori Okuni , Takafumi Yamaji
发明人： Akihide Sai , Hidenori Okuni , Takafumi Yamaji
IPC分类号： H03L7/00
CPC分类号： H03L7/0995 , H03L7/0891 , H03L7/18
摘要： An oscillator includes a plurality of oscillating units connected in parallel with each other, and a control unit which controls the number of parallel connections of the plurality of oscillating units based on an instruction signal indicating accuracy to be tolerated with respect to oscillation outputs of the oscillating units.
摘要翻译：振荡器包括彼此并联连接的多个振荡单元，以及控制单元，其基于指示信号来控制多个振荡单元的并联数量，所述指令信号指示相对于振荡器的振荡输出允许的精度单位。

3. 发明申请

US20070182493A1 OSCILLATOR, PLL OSCILLATOR, RADIO APPARATUS 失效
标题翻译：振荡器，PLL振荡器，无线电设备
公开(公告)号：US20070182493A1
公开(公告)日：2007-08-09
申请号：US11532630
申请日：2006-09-18
申请人： Akihide Sai , Hidenori Okuni , Takafumi Yamaji
发明人： Akihide Sai , Hidenori Okuni , Takafumi Yamaji
IPC分类号： H03L7/00
CPC分类号： H03L7/0995 , H03L7/0891 , H03L7/18
摘要： An oscillator includes a plurality of oscillating units connected in parallel with each other, and a control unit which controls the number of parallel connections of the plurality of oscillating units based on an instruction signal indicating accuracy to be tolerated with respect to oscillation outputs of the oscillating units.
摘要翻译：振荡器包括彼此并联连接的多个振荡单元，以及控制单元，其基于指示信号来控制多个振荡单元的并联数量，所述指令信号指示相对于振荡器的振荡输出允许的精度单位。

4. 发明申请

US20130049822A1 INTEGRATED CIRCUIT 有权
标题翻译：集成电路
公开(公告)号：US20130049822A1
公开(公告)日：2013-02-28
申请号：US13409770
申请日：2012-03-01
申请人： Hidenori OKUNI , Akihide Sai
发明人： Hidenori OKUNI , Akihide Sai
IPC分类号： H03B19/00
CPC分类号： H03L7/0891 , H03L7/18
摘要： There is provided an integrated circuit in which a reference-signal source generates a reference signal having a basic frequency, a phase locked loop includes a voltage-controlled oscillator, a first frequency divider to generate a first frequency-divided signal based on the signal by N, a phase detector, a charge pump and a loop filter, the second frequency generates a second frequency-divided signal based on the signal generated by the voltage-controlled oscillator by M, wherein a minimum absolute value of a difference between the basic frequency multiplied by “K” and a frequency of the second frequency-divided signal is equal to or less than a low cutoff frequency of a bandpass filter or equal to or higher than a high cutoff frequency of the bandpass filter, the bandpass filter being represented by a transfer function from an input of the voltage-controlled oscillator to an output of the phase locked loop.
摘要翻译：提供了一种集成电路，其中参考信号源产生具有基本频率的参考信号，锁相环包括压控振荡器，第一分频器，以基于该信号产生第一分频信号 N，相位检测器，电荷泵和环路滤波器，第二频率基于由压控振荡器产生的信号由M产生第二分频信号，其中基本频率之间的差的最小绝对值乘以K，并且第二分频信号的频率等于或小于带通滤波器的低截止频率或等于或高于带通滤波器的高截止频率，带通滤波器由转移表示从压控振荡器的输入到锁相环的输出。

5. 发明授权

US07449961B2 Parallel controlled connections of the plurality of ring oscillator units, PLL, radio apparatus 失效
标题翻译：多个环形振荡器单元，PLL，无线电设备的并行控制连接
公开(公告)号：US07449961B2
公开(公告)日：2008-11-11
申请号：US11532630
申请日：2006-09-18
申请人： Akihide Sai , Hidenori Okuni , Takafumi Yamaji
发明人： Akihide Sai , Hidenori Okuni , Takafumi Yamaji
IPC分类号： H03L7/00
CPC分类号： H03L7/0995 , H03L7/0891 , H03L7/18
摘要： An oscillator includes a plurality of oscillating units connected in parallel with each other, and a control unit which controls the number of parallel connections of the plurality of oscillating units based on an instruction signal indicating accuracy to be tolerated with respect to oscillation outputs of the oscillating units.
摘要翻译：振荡器包括彼此并联连接的多个振荡单元，以及控制单元，其基于指示信号来控制多个振荡单元的并联数量，所述指令信号指示相对于振荡器的振荡输出允许的精度单位。

6. 发明授权

US08283957B2 Phase-locked loop circuit and radio receiver 有权
标题翻译：锁相环电路和无线电接收器
公开(公告)号：US08283957B2
公开(公告)日：2012-10-09
申请号：US13036860
申请日：2011-02-28
申请人： Akihide Sai
发明人： Akihide Sai
IPC分类号： H03L7/06
CPC分类号： H03L7/091 , H03L7/0895 , H03L7/0898
摘要： The voltage-controlled oscillator generates a first signal and a second signal having a phase reverse to that of the first signal, frequencies thereof being controlled depending on control voltages. The sub-sampling phase comparator generates first/second sampled voltages by sampling voltages of the first/second signals in each cycle of the reference signal having cycles. The current generating circuit has first/second charge pumps configured to generate first/second current signal depending on supply voltages, the second current signal having a polarity reverse to that of the first current signal. The selection controller selectively carries out a first supply mode for supplying the first and second sampled voltages to the second and first charge pumps and a second supply mode for supplying the first and second sampled voltages to the first and second charge pumps respectively. The loop filter generates the control voltages supplied to the voltage-controlled oscillator by smoothing the composite current signal.
摘要翻译：压控振荡器产生与第一信号相反的相位的第一信号和第二信号，其频率根据控制电压进行控制。子采样相位比较器通过在具有周期的参考信号的每个周期中采样第一/第二信号的电压来产生第一/第二采样电压。电流产生电路具有第一/第二电荷泵，其被配置为根据电源电压产生第一/第二电流信号，第二电流信号具有与第一电流信号的极性相反的极性。选择控制器选择性地执行用于将第一和第二采样电压提供给第二和第一电荷泵的第一供电模式以及用于将第一和第二采样电压分别提供给第一和第二充电泵的第二供电模式。环路滤波器通过平滑复合电流信号来产生提供给压控振荡器的控制电压。

7. 发明申请

US20060139191A1 D/A converter and communication apparatus 有权
公开(公告)号：US20060139191A1
公开(公告)日：2006-06-29
申请号：US11319106
申请日：2005-12-27
申请人： Akihide Sai , Takeshi Ueno , Takafumi Yamaji
发明人： Akihide Sai , Takeshi Ueno , Takafumi Yamaji
IPC分类号： H03M1/00
CPC分类号： H03M1/747
摘要： A D/A converter includes a plurality of current sources configured to be on or off according to input digital data; a constant voltage source configured to apply a constant voltage to the current sources; current supply wirings provided between the constant voltage source and the respective current source, the current supply wirings respectively having equal length from the constant voltage source to the respective current source; ground-side wirings summing up output currents from the plurality of current sources; and output terminals connected to the ground-side wirings, the output terminals outputting analogue data corresponding to the input digital data.

8. 发明申请

US20100195779A1 PHASE LOCKED LOOP CIRCUIT AND RECEIVER USING THE SAME 失效
标题翻译：相位锁定环路和使用相同的接收器
公开(公告)号：US20100195779A1
公开(公告)日：2010-08-05
申请号：US12553186
申请日：2009-09-03
申请人： Akihide Sai
发明人： Akihide Sai
IPC分类号： H04L7/00 , H03L7/06
CPC分类号： H03L7/087 , H03L7/0996 , H03L7/10
摘要： A phase locked loop circuit which obtains an output signal coincident in frequency and phase with a target signal which is acquired by multiplying the frequency of a reference signal by a ratio represented by the sum of a first fraction and a second fraction, the circuit includes a controlled oscillator including the same number of stages of annularly connected amplifiers as a number which is obtained by dividing, by 2, a least common multiple of a denominator of the first fraction, a denominator of the second fraction and 2, the same number of multiphase signals as the least common multiple being extractable from the controlled oscillator, the frequency of the multiphase signals being controlled by a digital control signal and an analog control signal, one of the multiphase signals being output as the output signal.
摘要翻译：一种锁相环电路，其获得与频率和相位一致的输出信号与通过将参考信号的频率乘以由第一分数和第二分数的和表示的比率而获得的目标信号，该电路包括控制振荡器包括相同数量的环形连接放大器级数，其数量是通过将第一级分的分母的最小公倍数，第二级分的分母和2，相同数目的多相信号作为从受控振荡器提取的最小公倍数，多相信号的频率由数字控制信号和模拟控制信号控制，多相信号之一作为输出信号输出。

9. 发明申请

US20080309414A1 VOLTAGE CONTROLLED OSCILLATOR AND PHASE LOCKED LOOP CIRCUIT INCORPORATING THE SAME 审中-公开
标题翻译：电压控制振荡器和相位锁相环路电路
公开(公告)号：US20080309414A1
公开(公告)日：2008-12-18
申请号：US12051103
申请日：2008-03-19
申请人： Akihide Sai
发明人： Akihide Sai
IPC分类号： H03L7/00 , H03K3/03
CPC分类号： H03L7/0995 , H03K3/0315 , H03K2005/00136 , H03L7/0891 , H03L7/18
摘要： A voltage controlled oscillator includes a ring oscillator configured by connecting invertors, each of the invertors including a first and a second transistors, an operational amplifier to obtain an amplified signal, third transistors inserted between the first transistors and a first power supply, and is gate-controlled by the amplified signal, fourth transistors inserted between the second transistors and a second power supply, and is gate-controlled by the control signal, a inverter including a fifth and a sixth transistor, gate terminals and drain terminals of the fifth and sixth transistor being connected in common to a first input terminal of the operational amplifier, a seventh transistor inserted between the fifth transistor and the first power supply, and gate-controlled by the amplified signal, and an eighth transistor inserted between the sixth transistor and the second power supply, and gate-controlled by the control signal.
摘要翻译：压控振荡器包括通过连接反相器构成的环形振荡器，每个反相器包括第一和第二晶体管，运算放大器以获得放大信号，第三晶体管插在第一晶体管和第一电源之间，并且是栅极由放大信号控制，第四晶体管插在第二晶体管和第二电源之间，由控制信号栅极控制，包括第五和第六晶体管的反相器，第五和第六晶体管的栅极端子和漏极端子晶体管共同连接到运算放大器的第一输入端，第七晶体管插在第五晶体管和第一电源之间，并由放大信号进行栅极控制，第八晶体管插在第六晶体管与第二晶体管之间电源，并由控制信号门控制。

10. 发明授权

US08467758B2 Frequency tuning circuit, phase-locked loop circuit, communication apparatus, and storage apparatus 失效
标题翻译：频率调谐电路，锁相环电路，通信装置和存储装置
公开(公告)号：US08467758B2
公开(公告)日：2013-06-18
申请号：US13409597
申请日：2012-03-01
申请人： Akihide Sai
发明人： Akihide Sai
IPC分类号： H04B1/06
CPC分类号： H03L7/087 , H03L7/0891 , H03L7/101 , H03L2207/06
摘要： According to one embodiment, a register outputs a first control code in first and second operation modes, saves the first control code as a third control code at an end of the first operation mode, and outputs the third control code at a beginning of a third operation mode. In the first operation mode, a digital-to-analog converter supplies a control signal with a control voltage to a voltage controlled oscillator. In the second operation mode, the control signal is supplied to a buffer amplifier, the amplifier drives a bandlimiting filter, and the filter generates the control voltage. In the third operation mode, the control signal is supplied to the filter, and the filter generates the control voltage.
摘要翻译：根据一个实施例，寄存器输出第一和第二操作模式中的第一控制码，在第一操作模式结束时将第一控制码作为第三控制码保存，并在第三操作模式的第三个开始处输出第三控制码操作模式。在第一操作模式中，数模转换器将具有控制电压的控制信号提供给压控振荡器。在第二操作模式中，控制信号被提供给缓冲放大器，放大器驱动带限制滤波器，并且滤波器产生控制电压。在第三操作模式中，控制信号被提供给滤波器，并且滤波器产生控制电压。

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