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    • 4. 发明授权
    • Method for manufacturing semiconductor device and semiconductor device
    • 半导体器件和半导体器件的制造方法
    • US08299548B2
    • 2012-10-30
    • US13050813
    • 2011-03-17
    • Kanako KomatsuTsubasa YamadaJun MoriokaKoji Kimura
    • Kanako KomatsuTsubasa YamadaJun MoriokaKoji Kimura
    • H01L29/78
    • H01L29/0847H01L29/0653H01L29/0692H01L29/1045H01L29/66659H01L29/7835
    • According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include simultaneously forming a first field insulating film and at least one second field insulating film on a front face side of a semiconductor layer. The at least one second field insulating film is separated from the first field insulating film and thinner than the first field insulating film. The method can include forming a drift region of a first conductivity type in a region of the semiconductor layer including the first field insulating film and the second field insulating film. The method can include forming a drain region of the first conductivity type in the front face of the semiconductor layer on a side of the first field insulating film. In addition, the method can include forming a source region of the first conductivity type in the front face of the semiconductor layer on a side of the second field insulating film.
    • 根据一个实施例,公开了一种用于制造半导体器件的方法。 该方法可以包括在半导体层的正面侧同时形成第一场绝缘膜和至少一个第二场绝缘膜。 所述至少一个第二场绝缘膜与所述第一场绝缘膜分离并且比所述第一场绝缘膜更薄。 该方法可以包括在包括第一场绝缘膜和第二场绝缘膜的半导体层的区域中形成第一导电类型的漂移区。 该方法可以包括在第一场绝缘膜一侧的半导体层的正面中形成第一导电类型的漏区。 此外,该方法可以包括在第二场绝缘膜的一侧在半导体层的正面形成第一导电类型的源极区域。
    • 7. 发明授权
    • Semiconductor device capable of adjusting output impedance of external semiconductor device and output impedance adjusting method
    • 能够调整外部半导体器件的输出阻抗的半导体器件和输出阻抗调整方法
    • US07489160B2
    • 2009-02-10
    • US11812751
    • 2007-06-21
    • Koji Kimura
    • Koji Kimura
    • H03K17/16
    • H03K19/0175H03K19/0005H04L25/0278
    • In a semiconductor device capable of adjusting an output impedance of a first output impedance adjustable output buffer of an external semiconductor device connectable to the semiconductor device, a second output impedance adjustable output buffer is provided. A comparator compares a first output voltage of a real load circuit including the first output impedance adjustable output buffer with a second output voltage of a replica load circuit including the second output impedance adjustable output buffer. An output impedance control circuit transmits an output signal of the comparator to the external semiconductor device to adjust the output impedance of the first output impedance adjustable output buffer, so that the first output voltage is made equal to the second output voltage.
    • 在能够调节可连接到半导体器件的外部半导体器件的第一输出阻抗可调输出缓冲器的输出阻抗的半导体器件中,提供第二输出阻抗可调输出缓冲器。 比较器将包括第一输出阻抗可调输出缓冲器的实际负载电路的第一输出电压与包括第二输出阻抗可调输出缓冲器的复制负载电路的第二输出电压进行比较。 输出阻抗控制电路将比较器的输出信号发送到外部半导体器件,以调整第一输出阻抗可调输出缓冲器的输出阻抗,使得第一输出电压等于第二输出电压。
    • 10. 发明授权
    • Piezoelectric/electrostrictive structure and method for manufacturing the same
    • 压电/电致伸缩结构及其制造方法
    • US07274134B2
    • 2007-09-25
    • US11138250
    • 2005-05-26
    • Makoto OhmoriKoji Kimura
    • Makoto OhmoriKoji Kimura
    • H01L41/083
    • H01L41/23B41J2/14209B41J2/1609B41J2/1631B41J2/1632B41J2/1642B41J2/1646H01L41/0533H01L41/0831H01L41/273
    • A piezoelectric/electrostrictive structure is provided, including a plurality of stacked sheet-shaped piezoelectric/electrostrictive bodies and at least one sheet of a thin film. The interfaces between the piezoelectric/electrostrictive bodies are exposed at side faces of the piezoelectric/electrostrictive structure, the side faces have notches, and the thin film is placed on the notched portions of side faces. A method for manufacturing the piezoelectric/electrostrictive structure includes the steps of stacking a plurality of ceramic green sheets made of a piezoelectric/electrostrictive material, firing the stacked ceramic green sheets to prepare fired piezoelectric/electrostrictive bodies and forming at least one sheet of a thin film on side faces of the fired piezoelectric/electrostrictive bodies by a chemical vapor deposition process.
    • 提供一种压电/电致伸缩结构,包括多个堆叠的片状压电/电致伸缩体和至少一片薄膜。 压电/电致伸缩体之间的界面在压电/电致伸缩结构的侧面露出,侧面具有凹口,并且薄膜被放置在侧面的切口部分上。 一种制造压电/电致伸缩结构的方法包括以下步骤:堆叠由压电/电致伸缩材料制成的多个陶瓷生片,烧制层叠的陶瓷生片以制备烧制的压电/电致伸缩体并形成至少一片薄的 通过化学气相沉积工艺在烧结的压电/电致伸缩体的侧面上形成薄膜。