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1. 发明授权

US08390044B2 Non-linear element, display device including non-linear element, and electronic device including display device 有权
标题翻译：非线性元件，包括非线性元件的显示装置和包括显示装置的电子装置
公开(公告)号：US08390044B2
公开(公告)日：2013-03-05
申请号：US12954338
申请日：2010-11-24
申请人： Daisuke Kawae , Hideki Uochi , Shunpei Yamazaki
发明人： Daisuke Kawae , Hideki Uochi , Shunpei Yamazaki
IPC分类号： H01L31/062
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/78606 , H01L29/78642 , H01L29/78645 , H01L29/78648 , H01L29/78696
摘要： A non-linear element (such as a diode) which includes an oxide semiconductor and has a favorable rectification property is provided. In a transistor including an oxide semiconductor in which the hydrogen concentration is 5×1019/cm3 or lower, a work function φms of a source electrode in contact with the oxide semiconductor, a work function φmd of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy φms≦χ
摘要翻译：提供了包括氧化物半导体并且具有有利的整流特性的非线性元件（例如二极管）。在包含氢浓度为5×1019 / cm3以下的氧化物半导体的晶体管中，与氧化物半导体接触的源电极的功函数＆amp; ms，接触的漏电极的功函数＆phd 与氧化物半导体相比，氧化物半导体的电子亲和力χ满足＆lt; ms＆nlE;χ＆phgr; md，并且漏电极和氧化物半导体之间的接触面积大于源电极和源电极之间的接触面积氧化物半导体。通过电连接晶体管中的栅电极和漏电极，可以实现具有良好整流特性的非线性元件。

2. 发明授权

US08759829B2 Semiconductor device comprising oxide semiconductor layer as channel formation layer 有权
标题翻译：半导体器件包括氧化物半导体层作为沟道形成层
公开(公告)号：US08759829B2
公开(公告)日：2014-06-24
申请号：US13585077
申请日：2012-08-14
申请人： Hideki Uochi , Daisuke Kawae
发明人： Hideki Uochi , Daisuke Kawae
IPC分类号： H01L29/10
CPC分类号： H01L27/127 , G02F1/13454 , G02F1/13458 , G02F2001/13629 , H01L27/1225 , H01L29/7869
摘要： To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted. A capacitor is formed using an oxide semiconductor layer, an insulating layer, and a wiring or an electrode.
摘要翻译：减少对实际运行的不利影响，减少噪音的不利影响。包括电极，与电极电连接的布线，在俯视图中与电极重叠的氧化物半导体层，在截面图中设置在电极和氧化物半导体层之间的绝缘层的结构，以及功能电路通过布线从电极输入信号，并根据输入的信号控制操作。使用氧化物半导体层，绝缘层，布线或电极形成电容器。

3. 发明授权

US08514609B2 Semiconductor device and method of driving semiconductor device 有权
标题翻译：半导体装置及其驱动方法
公开(公告)号：US08514609B2
公开(公告)日：2013-08-20
申请号：US13019342
申请日：2011-02-02
申请人： Daisuke Kawae , Hideki Uochi
发明人： Daisuke Kawae , Hideki Uochi
IPC分类号： G11C11/24
CPC分类号： G11C11/405 , G11C16/02 , H01L27/105 , H01L27/1052 , H01L27/11521 , H01L27/1156 , H01L27/1203 , H01L27/1225
摘要： The number of wirings per unit memory cell is reduced by sharing a bit line by a writing transistor and a reading transistor. Data is written by turning on the writing transistor so that a potential of the bit line is supplied to a node where one of a source and drain electrodes of the writing transistor and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of charge is held in the node. Data is read by using a signal line connected to a capacitor as a reading signal line or a signal line connected to one of a source and drain electrodes of the reading transistor as a reading signal line so that a reading potential is supplied to the reading signal line, and then detecting a potential of the bit line.
摘要翻译：通过由写入晶体管和读取晶体管共享位线来减少每单位存储单元的布线数量。通过接通写入晶体管来写入数据，使得位线的电位被提供给写入晶体管的源极和漏极之一以及读取晶体管的栅电极之一电连接，然后关断写入晶体管，使得在节点中保持预定量的电荷。通过使用连接到电容器的信号线作为读取信号线或连接到读取晶体管的源极和漏极之一的信号线作为读取信号线来读取数据，使得读取电位被提供给读取信号线，然后检测位线的电位。

4. 发明授权

US08253135B2 Semiconductor device, display device, and electronic appliance 有权
标题翻译：半导体装置，显示装置和电子设备
公开(公告)号：US08253135B2
公开(公告)日：2012-08-28
申请号：US12726370
申请日：2010-03-18
申请人： Hideki Uochi , Daisuke Kawae
发明人： Hideki Uochi , Daisuke Kawae
IPC分类号： H01L29/10
CPC分类号： H01L27/127 , G02F1/13454 , G02F1/13458 , G02F2001/13629 , H01L27/1225 , H01L29/7869
摘要： To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted. A capacitor is formed using an oxide semiconductor layer, an insulating layer, and a wiring or an electrode.
摘要翻译：减少对实际运行的不利影响，减少噪音的不利影响。包括电极，与电极电连接的布线，在俯视图中与电极重叠的氧化物半导体层，在截面图中设置在电极和氧化物半导体层之间的绝缘层的结构，以及功能电路通过布线从电极输入信号，并根据输入的信号控制操作。使用氧化物半导体层，绝缘层，布线或电极形成电容器。

5. 发明申请

US20110194331A1 SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件和驱动器件的方法
公开(公告)号：US20110194331A1
公开(公告)日：2011-08-11
申请号：US13019342
申请日：2011-02-02
申请人： Daisuke Kawae , Hideki Uochi
发明人： Daisuke Kawae , Hideki Uochi
IPC分类号： G11C11/24 , H01L27/108
CPC分类号： G11C11/405 , G11C16/02 , H01L27/105 , H01L27/1052 , H01L27/11521 , H01L27/1156 , H01L27/1203 , H01L27/1225
摘要： The number of wirings per unit memory cell is reduced by sharing a bit line by a writing transistor and a reading transistor. Data is written by turning on the writing transistor so that a potential of the bit line is supplied to a node where one of a source and drain electrodes of the writing transistor and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of charge is held in the node. Data is read by using a signal line connected to a capacitor as a reading signal line or a signal line connected to one of a source and drain electrodes of the reading transistor as a reading signal line so that a reading potential is supplied to the reading signal line, and then detecting a potential of the bit line.
摘要翻译：通过由写入晶体管和读取晶体管共享位线来减少每单位存储单元的布线数量。通过接通写入晶体管来写入数据，使得位线的电位被提供给写入晶体管的源极和漏极之一以及读取晶体管的栅电极之一电连接，然后关断写入晶体管，使得在节点中保持预定量的电荷。通过使用连接到电容器的信号线作为读取信号线或连接到读取晶体管的源极和漏极之一的信号线作为读取信号线来读取数据，使得读取电位被提供给读取信号线，然后检测位线的电位。

6. 发明申请

US20110127526A1 NON-LINEAR ELEMENT, DISPLAY DEVICE INCLUDING NON-LINEAR ELEMENT, AND ELECTRONIC DEVICE INCLUDING DISPLAY DEVICE 有权
标题翻译：非线性元件，包括非线性元件的显示装置和包括显示装置的电子装置
公开(公告)号：US20110127526A1
公开(公告)日：2011-06-02
申请号：US12954338
申请日：2010-11-24
申请人： Daisuke Kawae , Hideki Uochi , Shunpei Yamazaki
发明人： Daisuke Kawae , Hideki Uochi , Shunpei Yamazaki
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/78606 , H01L29/78642 , H01L29/78645 , H01L29/78648 , H01L29/78696
摘要： A non-linear element (such as a diode) which includes an oxide semiconductor and has a favorable rectification property is provided. In a transistor including an oxide semiconductor in which the hydrogen concentration is 5×1019/cm3 or lower, a work function φms of a source electrode in contact with the oxide semiconductor, a work function φmd of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy φms≦χ
摘要翻译：提供了包括氧化物半导体并且具有有利的整流特性的非线性元件（例如二极管）。在包含氢浓度为5×1019 / cm3以下的氧化物半导体的晶体管中，与氧化物半导体接触的源电极的功函数＆amp; ms，接触的漏电极的功函数＆phd 与氧化物半导体相比，氧化物半导体的电子亲和力χ满足＆lt; ms＆nlE;χ＆phgr; md，并且漏电极和氧化物半导体之间的接触面积大于源电极和源电极之间的接触面积氧化物半导体。通过电连接晶体管中的栅电极和漏电极，可以实现具有良好整流特性的非线性元件。

7. 发明申请

US20100244021A1 SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC APPLIANCE 有权
标题翻译：半导体器件，显示器件和电子器件
公开(公告)号：US20100244021A1
公开(公告)日：2010-09-30
申请号：US12726370
申请日：2010-03-18
申请人： Hideki Uochi , Daisuke Kawae
发明人： Hideki Uochi , Daisuke Kawae
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L27/127 , G02F1/13454 , G02F1/13458 , G02F2001/13629 , H01L27/1225 , H01L29/7869
摘要： To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted. A capacitor is formed using an oxide semiconductor layer, an insulating layer, and a wiring or an electrode.
摘要翻译：减少对实际运行的不利影响，减少噪音的不利影响。包括电极，与电极电连接的布线，在俯视图中与电极重叠的氧化物半导体层，在截面图中设置在电极和氧化物半导体层之间的绝缘层的结构，以及功能电路通过布线从电极输入信号，并根据输入的信号控制操作。使用氧化物半导体层，绝缘层，布线或电极形成电容器。

8. 发明授权

US08294155B2 Thin film transistor, display device having thin film transistor, and method for manufacturing the same 有权
标题翻译：薄膜晶体管，具有薄膜晶体管的显示装置及其制造方法
公开(公告)号：US08294155B2
公开(公告)日：2012-10-23
申请号：US13187584
申请日：2011-07-21
申请人： Shunpei Yamazaki , Yoshiyuki Kurokawa , Yasuhiro Jinbo , Satoshi Kobayashi , Daisuke Kawae
发明人： Shunpei Yamazaki , Yoshiyuki Kurokawa , Yasuhiro Jinbo , Satoshi Kobayashi , Daisuke Kawae
IPC分类号： H01L29/10
CPC分类号： H01L29/4908 , H01L27/124 , H01L27/1288 , H01L29/04 , H01L29/41733 , H01L29/66765 , H01L29/78696
摘要： A thin film transistor with excellent electric characteristics, a display device having the thin film transistor, and a method for manufacturing the thin film transistor and the display device are proposed. The thin film transistor includes a gate insulating film formed over a gate electrode, a microcrystalline semiconductor film formed over the gate insulating film, a buffer layer formed over the microcrystalline semiconductor film, a pair of semiconductor films to which an impurity element imparting one conductivity type is added and which are formed over the buffer layer, and wirings formed over the pair of semiconductor films to which the impurity element imparting one conductivity type is added. A part of the gate insulating film or the entire gate insulating film, and/or a part of the microcrystalline semiconductor or the entire microcrystalline semiconductor includes an impurity element which serves as a donor.
摘要翻译：提出了具有优异电特性的薄膜晶体管，具有薄膜晶体管的显示装置，以及制造薄膜晶体管和显示装置的方法。薄膜晶体管包括形成在栅电极上的栅极绝缘膜，形成在栅极绝缘膜上的微晶半导体膜，形成在微晶半导体膜上的缓冲层，一对半导体膜，赋予一种导电型的杂质元素并且形成在缓冲层之上，并且在添加有赋予一种导电类型的杂质元素的一对半导体膜上形成的布线。栅极绝缘膜或整个栅极绝缘膜的一部分和/或微晶半导体的一部分或整个微晶半导体包括用作供体的杂质元素。

9. 发明授权

US08289052B2 Logic circuit and display device having the same 有权
标题翻译：具有相同的逻辑电路和显示装置
公开(公告)号：US08289052B2
公开(公告)日：2012-10-16
申请号：US12894881
申请日：2010-09-30
申请人： Daisuke Kawae
发明人： Daisuke Kawae
IPC分类号： H03K19/00 , H03K19/20 , H03K19/094 , H01L25/00
CPC分类号： H03K19/09407 , G02F1/1362 , G02F1/167 , G02F2001/1674
摘要： It is an object to provide a logic circuit which can be operated even when unipolar transistors are used. A logic circuit includes a source follower circuit and a logic circuit an input portion of which is connected to an output portion of the source follower circuit and all transistors are unipolar transistors. A potential of a wiring for supplying a low potential connected to the source follower circuit is lower than a potential of a wiring for supplying a low potential connected to the logic circuit which includes unipolar transistors. In this manner, a logic circuit which can be operated even with unipolar depletion transistors can be provided.
摘要翻译：本发明的目的是提供即使在使用单极晶体管时也可以进行操作的逻辑电路。逻辑电路包括源极跟随器电路和逻辑电路，其输入部分连接到源极跟随器电路的输出部分，所有晶体管都是单极晶体管。用于提供连接到源极跟随器电路的低电位的布线的电位低于用于提供连接到包括单极晶体管的逻辑电路的低电位的布线的电位。以这种方式，可以提供甚至可以用单极耗尽晶体管操作的逻辑电路。

10. 发明授权

US08095104B2 Semiconductor device and electronic device having the same 有权
标题翻译：半导体装置及具有该半导体装置的电子装置
公开(公告)号：US08095104B2
公开(公告)日：2012-01-10
申请号：US11812761
申请日：2007-06-21
申请人： Daisuke Kawae , Masami Endo , Yoshiyuki Kurokawa , Takayuki Ikeda
发明人： Daisuke Kawae , Masami Endo , Yoshiyuki Kurokawa , Takayuki Ikeda
IPC分类号： H04B1/28
CPC分类号： H03K3/0315 , G06F1/04 , G06K19/07749 , H03K2005/00045 , H03K2005/00084
摘要： A semiconductor device includes an antenna circuit for receiving a wireless signal, a power supply circuit generating power by the wireless signal received by the antenna circuit, and a clock generation circuit to which power is supplied. The clock generation circuit includes a ring oscillator which self-oscillates and a frequency divider which adjusts frequency of an output signal of the ring oscillator in an appropriate range. A digital circuit portion is driven by a clock having high frequency accuracy, so that a malfunction such as an incorrect operation or no response is prevented.
摘要翻译：半导体器件包括用于接收无线信号的天线电路，通过由天线电路接收的无线信号产生电力的电源电路以及供给电力的时钟产生电路。时钟发生电路包括自振荡的环形振荡器和将环形振荡器的输出信号的频率调整到适当范围的分频器。数字电路部分由具有高频精度的时钟驱动，从而防止诸如错误操作或不响应的故障。

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