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1. 发明授权

US06512709B1 Semiconductor integrated circuit 失效
公开(公告)号：US06512709B1
公开(公告)日：2003-01-28
申请号：US10173429
申请日：2002-06-18
申请人： Shigeru Nakahara , Hideki Hayashi , Takeshi Suzuki , Keiichi Higeta
发明人： Shigeru Nakahara , Hideki Hayashi , Takeshi Suzuki , Keiichi Higeta
IPC分类号： G11C700
CPC分类号： G11C29/848 , G11C29/028 , G11C29/44 , G11C29/50012 , G11C29/787 , G11C29/789 , G11C29/802 , G11C2029/1208 , G11C2029/4402
摘要： A semiconductor integrated circuit having therein a plurality of memories, realizing an improved yield by efficiently repairing a defective bit in a memory. This semiconductor integrated circuit has: a plurality of circuit blocks (RAM macro cells) each having an identification code coincidence detecting circuit for determining whether an input identification code coincides with a self identification code or not and a reception data latch and performing an operation according to latched data; a setting circuit capable of setting the identification code and information corresponding to the identification code and serially outputting the set information; and a control circuit capable of sequentially reading the setting information from the setting circuit, converting the setting information to parallel data, and transferring the parallel data to the plurality of circuit blocks. Each of the plurality of circuit blocks captures and holds the setting information transferred when the identification code coincidence detecting circuit determines that the input identification code and the self identification code coincide with each other.

2. 发明授权

US06445627B1 Semiconductor integrated circuit 失效
标题翻译：半导体集成电路
公开(公告)号：US06445627B1
公开(公告)日：2002-09-03
申请号：US09886026
申请日：2001-06-22
申请人： Shigeru Nakahara , Hideki Hayashi , Takeshi Suzuki , Keiichi Higeta
发明人： Shigeru Nakahara , Hideki Hayashi , Takeshi Suzuki , Keiichi Higeta
IPC分类号： G11C700
CPC分类号： G11C29/848 , G11C29/028 , G11C29/44 , G11C29/50012 , G11C29/787 , G11C29/789 , G11C29/802 , G11C2029/1208 , G11C2029/4402
摘要： A semiconductor integrated circuit can efficiently repair a defective bit in a memory and comprises a plurality of circuit blocks (RAM macro cells) each having an identification code coincidence detecting circuit for determining whether an input identification code coincides with a self identification code and a reception data latch and performing an operation according to latched data; a setting circuit capable of setting the identification code and information corresponding to the identification code and serially outputting the set information; and a control circuit capable of sequentially reading the set information from the setting circuit, converting the set information to parallel data, and transferring the parallel data to the plurality of circuit blocks. Each of the plurality of circuit blocks captures and holds the set information transferred when the identification code coincidence detecting circuit determines that the input identification code and the self identification code coincide.
摘要翻译：半导体集成电路可以有效地修复存储器中的有缺陷的位，并且包括多个电路块（RAM宏单元），每个电路块具有识别码重合检测电路，用于确定输入的识别码是否与自身识别码和接收数据一致锁存并根据锁存数据执行操作; 设置电路，其能够设置与识别码相对应的识别码和信息，并且串行地输出设定信息; 以及控制电路，能够从设定电路依次读取设定信息，将设定信息转换成并行数据，并将并行数据传送给多个电路块。当识别码一致检测电路确定输入的识别码和自身识别码一致时，多个电路块中的每一个捕获并保持传送的设置信息。

3. 发明授权

US06779144B2 Semiconductor integrated circuit device and method of testing it 有权
标题翻译：半导体集成电路器件及其测试方法
公开(公告)号：US06779144B2
公开(公告)日：2004-08-17
申请号：US09996722
申请日：2001-11-30
申请人： Hideki Hayashi , Keiichi Higeta , Shigeru Nakahara
发明人： Hideki Hayashi , Keiichi Higeta , Shigeru Nakahara
IPC分类号： G01R3128
CPC分类号： G11C29/36 , G01R31/319 , G11C29/14
摘要： A semiconductor integrated circuit device includes a test circuit including a first latch circuit for holding a test pattern input to an electronic circuit operating in accordance with a clock signal and a second latch circuit for holding the output signal of the electronic circuit corresponding to the test pattern. In the test circuit, the clock signal having a frequency higher than the noise frequency generated in the power line at the time of starting to supply the clock signal to the electronic circuit is continuously supplied to the electronic circuit and the test circuit, while at the same time performing, in accordance with the clock signal in a period longer than the period of the clock signal, the operation of inputting the test pattern to the first latch circuit and the operation of outputting the output signal held in the second latch circuit.
摘要翻译：半导体集成电路装置包括测试电路，该测试电路包括用于保持测试图形输入到根据时钟信号工作的电子电路的第一锁存电路和用于保持对应于测试图案的电子电路的输出信号的第二锁存电路。在测试电路中，具有高于在开始向电子电路提供时钟信号时在电力线中产生的噪声频率的时钟信号被连续地提供给电子电路和测试电路，而在同时根据时钟信号在比时钟信号的周期长的时间内执行向第一锁存电路输入测试图案的操作和输出保持在第二锁存电路中的输出信号的操作。

4. 发明授权

US06496431B1 Semiconductor integrated circuit 失效
公开(公告)号：US06496431B1
公开(公告)日：2002-12-17
申请号：US10173431
申请日：2002-06-18
申请人： Shigeru Nakahara , Hideki Hayashi , Takeshi Suzuki , Keiichi Higeta
发明人： Shigeru Nakahara , Hideki Hayashi , Takeshi Suzuki , Keiichi Higeta
IPC分类号： G11C700
CPC分类号： G11C29/848 , G11C29/028 , G11C29/44 , G11C29/50012 , G11C29/787 , G11C29/789 , G11C29/802 , G11C2029/1208 , G11C2029/4402
摘要： A semiconductor integrated circuit having therein a plurality of memories, realizing an improved yield by efficiently repairing a defective bit in a memory. This semiconductor integrated circuit has: a plurality of circuit blocks (RAM macro cells) each having an identification code coincidence detecting circuit for determining whether an input identification code coincides with a self identification code or not and a reception data latch and performing an operation according to latched data; a setting circuit capable of setting the identification code and information corresponding to the identification code and serially outputting the set information; and a control circuit capable of sequentially reading the setting information from the setting circuit, converting the setting information to parallel data, and transferring the parallel data to the plurality of circuit blocks. Each of the plurality of circuit blocks captures and holds the setting information transferred when the identification code coincidence detecting circuit determines that the input identification code and the self identification code coincide with each other.

5. 外观设计

USD880362S1 Motor vehicle and/or toy replica thereof 有权
公开(公告)号：USD880362S1
公开(公告)日：2020-04-07
申请号：US29673986
申请日：2018-12-19
申请人： Hideki Hayashi , Masayuki Sugiura
设计人： Hideki Hayashi , Masayuki Sugiura
摘要： FIG. 1 is a left, front perspective view of a motor vehicle and/or toy replica showing our new design;
FIG. 2 is a left, rear perspective view thereof;
FIG. 3 is a right, front perspective view thereof;
FIG. 4 is a right, rear perspective view thereof;
FIG. 5 is a front view thereof;
FIG. 6 is a rear view thereof;
FIG. 7 is a left side view thereof;
FIG. 8 is a right side view thereof; and,
FIG. 9 is a top view thereof.

6. 发明申请

US20140219924A1 MEDICAL TISSUE-MARKER AND MANUFACTURING METHOD FOR THE SAME 有权
标题翻译：医用组织标记及其制造方法
公开(公告)号：US20140219924A1
公开(公告)日：2014-08-07
申请号：US14126034
申请日：2012-05-31
申请人： Hideki Hayashi , Hiroya Hatakeyama , Masanori Fujinami , Taro Toyota
发明人： Hideki Hayashi , Hiroya Hatakeyama , Masanori Fujinami , Taro Toyota
IPC分类号： A61K49/00 , A61K49/04
CPC分类号： A61K49/0034 , A61K49/0002 , A61K49/0023 , A61K49/006 , A61K49/0084 , A61K49/0438 , A61K49/0461 , A61K49/0466
摘要： The present invention is to provide a medical tissue-marker which enables the identification of a location even from the outside of an organ, can remain topical over a long period, and enables the easy identification of a marked location within the whole organ; also to provide a manufacturing method for the medical tissue-marker. The medical tissue-marker as in the present invention includes a vesicle formed by the synthesis of a phospholipid and a near infrared fluorescent dye, and an emulsion formed by the synthesis of the phospholipid and an X-ray contrast medium, and has agglomerated clusters wherein the vesicle and the emulsion are contained in a hydrophilic solvent and a plurality of capsules are formed by means of an emulsifier.
摘要翻译：本发明提供一种能够从器官外部识别位置的医疗组织标记物，能够长时间保持局部，能够容易地识别整个器官内的标记位置; 也提供了用于医疗组织标记物的制造方法。本发明中的医疗用组织标记物包括通过合成磷脂和近红外荧光染料形成的囊泡，以及通过合成磷脂和X射线造影剂形成的乳液，并且具有团聚体，其中，囊泡和乳液包含在亲水溶剂中，并且通过乳化剂形成多个胶囊。

7. 发明授权

US08766278B2 Silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件
公开(公告)号：US08766278B2
公开(公告)日：2014-07-01
申请号：US13565388
申请日：2012-08-02
申请人： Hideki Hayashi
发明人： Hideki Hayashi
IPC分类号： H01L29/15 , H01L21/8238
CPC分类号： H01L27/088 , H01L21/8213
摘要： First, second, fourth, and fifth impurity regions have a first conductivity type, and a third impurity region has a second conductivity type. The first to third impurity regions reach a first layer having the first conductivity type. The fourth and fifth impurity regions are provided on a second layer. First to fifth electrodes are provided on the first to fifth impurity regions, respectively. Electrical connection is established between the first and fifth electrodes, and between the third and fourth electrodes. A sixth electrode is provided on a gate insulating film covering a portion between the fourth and fifth impurity regions.
摘要翻译：第一，第二，第四和第五杂质区具有第一导电类型，第三杂质区具有第二导电类型。第一至第三杂质区域到达具有第一导电类型的第一层。第四和第五杂质区设置在第二层上。第一至第五电极分别设置在第一至第五杂质区上。在第一和第五电极之间以及第三和第四电极之间建立电连接。第六电极设置在覆盖第四和第五杂质区域之间的部分的栅极绝缘膜上。

8. 发明授权

US08618823B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US08618823B2
公开(公告)日：2013-12-31
申请号：US13006325
申请日：2011-01-13
申请人： Kenichi Tada , Koki Tsutsumida , Masatoshi Kawashima , Hideki Hayashi , Tsutomu Sato , Koichi Sugimoto
发明人： Kenichi Tada , Koki Tsutsumida , Masatoshi Kawashima , Hideki Hayashi , Tsutomu Sato , Koichi Sugimoto
IPC分类号： G01R31/28
CPC分类号： G01R31/318594 , G01R31/318552
摘要： A semiconductor device is designed to facilitate analyzing a position and a cause of the failure of an integrated circuit adopting a polyphase clock. To this end, the semiconductor device is provided with an error detecting unit that detects that a problem of the operation occurs in the integrated circuit, a clock state holding unit that holds the information of phases in a predetermined term of a two- or more-phase clock and an output unit that outputs the information of the phases in the predetermined term of the two- or more-phase clock when the error detecting unit detects that the problem of the operation occurs in the integrated circuit.
摘要翻译：半导体器件被设计为便于分析采用多相时钟的集成电路的故障的位置和原因。为此，半导体器件设置有检测在集成电路中发生操作问题的错误检测单元，时钟状态保持单元，其保持预定项中的相位信息为两维或多次，相位时钟和输出单元，当错误检测单元检测到集成电路中发生操作的问题时，输出两相或更多相位时钟的预定项中的相位的信息。

9. 外观设计

USD693497S1 Combination lamp for an automobile 有权
公开(公告)号：USD693497S1
公开(公告)日：2013-11-12
申请号：US29429216
申请日：2012-08-08
申请人： Hideki Hayashi
设计人： Hideki Hayashi

10. 发明授权

US08424839B2 Direct-current motor control device and method for detecting state of direct-current motor 失效
标题翻译：直流马达控制装置及直流马达状态检测方法
公开(公告)号：US08424839B2
公开(公告)日：2013-04-23
申请号：US13020207
申请日：2011-02-03
申请人： Hideki Hayashi , Satoru Hiramoto
发明人： Hideki Hayashi , Satoru Hiramoto
IPC分类号： F16K31/02
CPC分类号： H02K23/66 , F02D41/005 , H02P7/03 , Y02T10/47
摘要： A current detection unit detects an electric current caused by superimposing a direct current from a direct-current power source on an alternating current from an alternating-current power source and supplied through a brush to a direct-current motor. An extracting unit extracts an alternating-current component of the detected electric current. An angle detection unit detects a rotation angle of the motor according to the extracted alternating-current component. A direction detection unit detects a rotative direction of the motor according to a change pattern of the extracted alternating-current component. A core of the motor has slots each defined between adjacent two of teeth. The slots respectively accommodate phase coils respectively wound around the teeth. Turns of the phase coils are different from each other.
摘要翻译：电流检测单元通过将来自直流电源的直流电叠加到来自交流电源的交流电并通过电刷提供给直流电动机而引起的电流。提取单元提取检测到的电流的交流分量。角度检测单元根据所提取的交流分量检测电动机的旋转角度。方向检测单元根据所提取的交流分量的变化模式来检测电动机的旋转方向。电动机的铁芯在相邻的两个齿之间具有槽。这些槽分别容纳分别缠绕在齿上的相位线圈。相位线圈的转数彼此不同。

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