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1. 发明授权

US5354710A Method of manufacturing semiconductor devices using an adsorption enhancement layer 失效
标题翻译：使用吸附增强层制造半导体器件的方法
公开(公告)号：US5354710A
公开(公告)日：1994-10-11
申请号：US17449
申请日：1993-02-12
申请人： Hideichi Kawaguchi , Yoshitaka Tsunashima , Kikuo Yamabe , Katsuya Okumura
发明人： Hideichi Kawaguchi , Yoshitaka Tsunashima , Kikuo Yamabe , Katsuya Okumura
IPC分类号： H01L21/225 , H01L21/334 , H01L21/8242 , H01L21/00 , H01L21/02 , H01L21/385
CPC分类号： H01L27/10861 , H01L21/2256 , H01L29/66181 , Y10S438/923
摘要： A method of manufacturing semiconductor devices comprises the steps of preparing a semiconductor substrate having a surface and a natural oxide film on the surface, forming an adsorption enhancement layer on the surface of the semiconductor substrate, forming an impurity adsorption layer containing impurities on the adsorption enhancement layer, and thermally diffusing the impurities through the adsorption enhancement layer and the natural oxide film into the substrate.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在表面上制备具有表面和自然氧化膜的半导体衬底，在半导体衬底的表面上形成吸附增强层，在吸附增强层上形成含有杂质的杂质吸附层并且通过吸附增强层和天然氧化物膜将杂质热扩散到基底中。

2. 发明授权

US5297956A Method and apparatus for heat treating 失效
标题翻译：热处理方法和装置
公开(公告)号：US5297956A
公开(公告)日：1994-03-29
申请号：US799931
申请日：1991-11-29
申请人： Kikuo Yamabe , Keitaro Imai , Katsuya Okumura , Ken Nakao , Seikou Ueno
发明人： Kikuo Yamabe , Keitaro Imai , Katsuya Okumura , Ken Nakao , Seikou Ueno
IPC分类号： H01L21/324 , C30B31/12 , C30B31/14 , H01L21/22 , H01L21/31 , H01L21/673 , H01L21/683 , F23D5/00
CPC分类号： C30B31/12 , C30B31/14
摘要： A method and an apparatus for heat treating in a heat treating apparatus having a heating chamber to be introduced with predetermined gas, a heater disposed around the heating chamber, and jigs disposed in the heating chamber for supporting wafers of a plurality of substrates to be treated in parallel with each other, wherein in order to make the temperature distribution of the wafers of the substrates to be treated in the radial direction uniform in the heat treatment, the jigs are formed to determine the sizes and the shape thereof in predetermined ranges having a gradient according to the heat treating method having a predetermined shape determining procedure so that the jigs are formed in ring-shaped trays (i.e. support-ring) for holding at the peripheries the substrates to be treated and the thickness of the tray is constant or such that the outer peripheral side thereof is thicker than the inner peripheral side thereof.
摘要翻译：一种热处理装置中的热处理方法和装置，其特征在于，具有要加入预定气体的加热室，设置在所述加热室周围的加热器和设置在所述加热室中的夹具，用于支撑待处理的多个基板的晶片彼此并联，其中为了使热处理中要处理的基板的晶片的温度分布均匀，形成夹具以确定其尺寸和形状，其具有在根据具有预定形状确定步骤的热处理方法的梯度，使得夹具形成为环状托盘（即，支撑环），用于在周边保持要处理的基板，并且托盘的厚度等于或等于其外周侧比其内周侧厚。

3. 发明授权

US5543334A Method of screening semiconductor device 失效
标题翻译：半导体器件的筛选方法
公开(公告)号：US5543334A
公开(公告)日：1996-08-06
申请号：US356419
申请日：1994-12-15
申请人： Ichiro Yoshii , Hiroyuki Kamijoh , Yoshio Ozawa , Kikuo Yamabe , Kazuhiko Hashimoto , Katsuya Okumura , Kaoru Hama
发明人： Ichiro Yoshii , Hiroyuki Kamijoh , Yoshio Ozawa , Kikuo Yamabe , Kazuhiko Hashimoto , Katsuya Okumura , Kaoru Hama
IPC分类号： H01L21/66
CPC分类号： H01L22/14 , H01L2924/0002
摘要： A method of screening a semiconductor device. A silicon wafer having gate electrodes formed on the gate oxide film is prepared. An insulating layer is deposited on the silicon wafer. Gate electrode portions of a group of transistors to be tested are exposed. A conductive layer is deposited on the silicon wafer having exposed gate electrodes. The conductive layer is patterned to be a wiring layer so that the gate electrodes of a group of the transistors can be electrically connected to each other. The chip area to be tested is irradiated with light having intensity enough to generate a required quantity of carriers in a depletion layer between a well and a substrate. A predetermined test voltage is applied between the wiring layer and the substrate of the silicon wafer during irradiation of the light to measure current flowing through the wiring layer and the gate oxide film. An abnormality of the gate oxide film can be detected on the basis of the measured current value. The screening method may be conducted before the completion of forming the gate electrodes. Further, gate electrode portions not to be used by a user may not be electrically connected to the gate electrode portions to be used.
摘要翻译：一种半导体器件的屏蔽方法。制备在栅氧化膜上形成栅电极的硅晶片。绝缘层沉积在硅晶片上。待测试的一组晶体管的栅电极部分露出。在具有暴露的栅电极的硅晶片上沉积导电层。导电层被图案化为布线层，使得一组晶体管的栅电极可以彼此电连接。用足够强度的光照射要测试的芯片面积，以在阱和衬底之间的耗尽层中产生所需量的载流子。在光照射期间，在布线层和硅晶片的基板之间施加预定的测试电压，以测量流过布线层和栅氧化膜的电流。可以基于测量的电流值来检测栅氧化膜的异常。筛选方法可以在形成栅电极的完成之前进行。此外，用户不使用的栅电极部分可以不与要使用的栅电极部分电连接。

4. 发明授权

US5431561A Method and apparatus for heat treating 失效
标题翻译：热处理方法和装置
公开(公告)号：US5431561A
公开(公告)日：1995-07-11
申请号：US166014
申请日：1993-12-14
申请人： Kikuo Yamabe , Keitaro Imai , Katsuya Okumura , Ken Nakao , Seikou Ueno
发明人： Kikuo Yamabe , Keitaro Imai , Katsuya Okumura , Ken Nakao , Seikou Ueno
IPC分类号： H01L21/324 , C30B31/12 , C30B31/14 , H01L21/22 , H01L21/31 , H01L21/673 , H01L21/683 , F27D5/00
CPC分类号： C30B31/12 , C30B31/14
摘要： A method and an apparatus for heat treating in a heat treating apparatus having a heating chamber to be introduced with predetermined gas, a heater disposed around the heating chamber, and jigs disposed in the heating chamber for supporting wafers of a plurality of substrates to be treated in parallel with each other, wherein in order to make the temperature distribution of the wafers of the substrates to be treated in the radial direction uniform in the heat treatment, the jigs are formed to determine the sizes and the shape thereof in predetermined ranges having a gradient according to the heat treating method having a predetermined shape determining procedure so that the jigs are formed in ring-shaped trays (i.e. support-ring) for holding at the peripheries the substrates to be treated and the thickness of the tray is constant or such that the outer peripheral side thereof is thicker than the inner peripheral side thereof.
摘要翻译：一种热处理装置中的热处理方法和装置，其特征在于，具有要加入预定气体的加热室，设置在所述加热室周围的加热器和设置在所述加热室中的夹具，用于支撑待处理的多个基板的晶片彼此并联，其中为了使热处理中要处理的基板的晶片的温度分布均匀，形成夹具以确定其尺寸和形状，其具有在根据具有预定形状确定步骤的热处理方法的梯度，使得夹具形成为环状托盘（即，支撑环），用于在周边保持要处理的基板，并且托盘的厚度等于或等于其外周侧比其内周侧厚。

5. 发明授权

US5259883A Method of thermally processing semiconductor wafers and an apparatus therefor 失效
标题翻译：半导体晶片的热处理方法及其装置
公开(公告)号：US5259883A
公开(公告)日：1993-11-09
申请号：US27575
申请日：1993-03-05
申请人： Kikuo Yamabe , Katsuya Okumura
发明人： Kikuo Yamabe , Katsuya Okumura
IPC分类号： C23C16/46 , C30B33/00 , F27D15/02 , H01L21/00 , C23C16/00
CPC分类号： H01L21/67115 , C23C16/46 , C30B33/00 , F27D15/02
摘要： An apparatus for thermally processing semiconductor wafers within a reaction tube in which the wafers are thermally processed in a higher temperature region within the reaction tube. The thermally processed semiconductor waters are moved into a lower temperature region within the reaction tube. The rate of heat radiated from the thermally processed semiconductor waters is reduced in the lower temperature region within the reaction tube.
摘要翻译：一种用于在反应管内热处理半导体晶片的装置，其中晶片在反应管内的较高温度区域被热处理。热处理的半导体水被移动到反应管内的较低温度区域。在热处理的半导体水中辐射的热量在反应管内的较低温度区域内降低。

6. 发明授权

US06326658B1 Semiconductor device including an interface layer containing chlorine 失效
标题翻译：包括含有氯的界面层的半导体装置
公开(公告)号：US06326658B1
公开(公告)日：2001-12-04
申请号：US09404594
申请日：1999-09-24
申请人： Yoshitaka Tsunashima , Katsuya Okumura , Masayuki Tanaka , Shigehiko Saida , Hirofumi Inoue , Takeshi Hamamoto
发明人： Yoshitaka Tsunashima , Katsuya Okumura , Masayuki Tanaka , Shigehiko Saida , Hirofumi Inoue , Takeshi Hamamoto
IPC分类号： H01L27108
CPC分类号： H01L27/10867
摘要： A buried strap is formed after forming an SiC layer on the side surface of a trench in order to suppress the epitaxial growth of Si from the side surface (single crystal Si) of the trench to the buried strap (polycrystalline Si) without causing an increase in the contact resistance in the post process accompanied by high temperature after formation of the buried strap.
摘要翻译：在沟槽侧面上形成SiC层之后形成掩埋带，以抑制从沟槽的侧表面（单晶Si）到掩埋带（多晶Si）的Si的外延生长而不会增加在后处理中的接触电阻伴随着形成埋藏带的高温。

7. 发明授权

US06133121A Apparatus for supporting semiconductor wafers and semiconductor wafer processing method using supporting apparatus 失效
标题翻译：用于支撑半导体晶片的装置和使用支撑装置的半导体晶片处理方法
公开(公告)号：US06133121A
公开(公告)日：2000-10-17
申请号：US950913
申请日：1997-10-15
申请人： Yoshitaka Tsunashima , Katsuya Okumura , Shigeru Yonemoto
发明人： Yoshitaka Tsunashima , Katsuya Okumura , Shigeru Yonemoto
IPC分类号： C23C16/458 , H01L21/31 , H01L21/324 , H01L21/673 , C23C16/00
CPC分类号： H01L21/67303 , C23C16/4583 , H01L21/67306 , H01L21/67309
摘要： A plurality of rods are arranged between first and second plates. A plurality of support members formed of heat-resistant strings, for example, SiC are stretched between the rods and wafers are supported by the support members. The wafers are separated from the rods while they are supported on the support members.
摘要翻译：多个杆布置在第一和第二板之间。由耐热线圈例如SiC形成的多个支撑构件在杆之间拉伸，并且晶片由支撑构件支撑。当晶片被支撑在支撑构件上时，晶片与棒分离。

8. 发明授权

US6091117A Field effect transistor having elevated source and drain regions and methods of manufacturing the same 失效
标题翻译：具有升高的源极和漏极区域的场效应晶体管及其制造方法
公开(公告)号：US6091117A
公开(公告)日：2000-07-18
申请号：US373558
申请日：1999-08-13
申请人： Jun-ichi Shiozawa , Yoshitaka Tsunashima , Katsuya Okumura
发明人： Jun-ichi Shiozawa , Yoshitaka Tsunashima , Katsuya Okumura
IPC分类号： H01L29/78 , H01L21/28 , H01L21/285 , H01L21/336 , H01L21/768 , H01L29/08
CPC分类号： H01L29/66628 , H01L21/76895 , H01L29/0847
摘要： A field effect transistor is manufactured by forming an isolating structure on a semiconductor substrate to define an active area. A gate structure is formed which is insulated from a surface of the active area of the semiconductor substrate. An amorphous silicon film is formed on the gate structure, on the surface of the semiconductor substrate, and on the isolating structure. A first portion of the amorphous silicon film is converted to an epitaxial film and a second portion of the amorphous silicon film is converted to a polysilicon film. Impurities are diffused throughout the polysilicon film and into an upper surface portion of said epitaxial film. The impurity doped polysilicon film and the upper surface portion of the epitaxial film are oxidized to form oxide films and the oxide films are removed so that the epitaxial film remains at least on the active area of the semiconductor substrate. Source and drain regions of the transistor are formed in the active area of the semiconductor substrate.
摘要翻译：通过在半导体衬底上形成隔离结构来限定有源区域来制造场效应晶体管。形成与半导体衬底的有源区的表面绝缘的栅极结构。在栅极结构，半导体衬底的表面和隔离结构上形成非晶硅膜。将非晶硅膜的第一部分转变为外延膜，将非晶硅膜的第二部分转换为多晶硅膜。杂质扩散到整个多晶硅膜并进入所述外延膜的上表面部分。杂质掺杂多晶硅膜和外延膜的上表面部分被氧化以形成氧化物膜，并且去除氧化物膜，使得外延膜至少保留在半导体衬底的有源区上。晶体管的源区和漏区形成在半导体衬底的有源区中。

9. 发明授权

US5970352A Field effect transistor having elevated source and drain regions and methods for manufacturing the same 失效
标题翻译：形成具有升高的源极和漏极区域的场效应晶体管的方法
公开(公告)号：US5970352A
公开(公告)日：1999-10-19
申请号：US64716
申请日：1998-04-23
申请人： Jun-ichi Shiozawa , Yoshitaka Tsunashima , Katsuya Okumura
发明人： Jun-ichi Shiozawa , Yoshitaka Tsunashima , Katsuya Okumura
IPC分类号： H01L29/78 , H01L21/28 , H01L21/285 , H01L21/336 , H01L21/768 , H01L29/08
CPC分类号： H01L29/66628 , H01L21/76895 , H01L29/0847
摘要： A field effect transistor is manufactured by forming an isolating structure on a semiconductor substrate to define an active area. A gate structure is formed which is insulated from a surface of the active area of the semiconductor substrate. An amorphous silicon film is formed on the gate structure, on the surface of the semiconductor substrate, and on the isolating structure. A first portion of the amorphous silicon film is converted to an epitaxial film and a second portion of the amorphous silicon film is converted to a polysilicon film. Impurities are diffused throughout the polysilicon film and into an upper surface portion of said epitaxial film. The impurity doped polysilicon film and the upper surface portion of the epitaxial film are oxidized to form oxide films and the oxide films are removed so that the epitaxial film remains at least on the active area of the semiconductor substrate. Source and drain regions of the transistor are formed in the active area of the semiconductor substrate.
摘要翻译：通过在半导体衬底上形成隔离结构来限定有源区域来制造场效应晶体管。形成与半导体衬底的有源区的表面绝缘的栅极结构。在栅极结构，半导体衬底的表面和隔离结构上形成非晶硅膜。将非晶硅膜的第一部分转变为外延膜，将非晶硅膜的第二部分转换为多晶硅膜。杂质扩散到整个多晶硅膜并进入所述外延膜的上表面部分。杂质掺杂多晶硅膜和外延膜的上表面部分被氧化以形成氧化物膜，并且去除氧化物膜，使得外延膜至少保留在半导体衬底的有源区上。晶体管的源区和漏区形成在半导体衬底的有源区中。

10. 发明授权

US5605574A Semiconductor wafer support apparatus and method 失效
标题翻译：半导体晶片支撑装置及方法
公开(公告)号：US5605574A
公开(公告)日：1997-02-25
申请号：US530641
申请日：1995-09-20
申请人： Yoshitaka Tsunashima , Katsuya Okumura
发明人： Yoshitaka Tsunashima , Katsuya Okumura
IPC分类号： H01L21/683 , C01B31/36 , C23C16/458 , C30B25/12 , C30B31/14 , F16F1/02 , H01L21/673 , C23C16/00
CPC分类号： H01L21/67309 , C23C16/4583 , C30B25/12 , C30B31/14
摘要： The wafer support apparatus and method provide a plurality of elastic supports having a smooth curvature for contacting a wafer at a respective plurality of support points. Each elastic support directly contacts the wafer at a support point and expands and/or compresses independently of the other elastic supports to accommodate the bending of the wafer during processing.A wafer support apparatus includes a plurality of flexible elastic supports onto which a wafer is directly positioned, wherein each of the plurality of elastic supports holds the wafer during processing by compressing or expanding in response to bending of the wafer during processing to provide continuous even support for the wafer during processing. A wafer support method includes the steps of providing a plurality of flexible elastic supports and positioning a wafer to be processed directly on the plurality of elastic supports, wherein each of the plurality of elastic supports holds the wafer during processing by compressing or expanding in response to bending of the wafer during processing to provide continuous even support for the wafer during processing.The elastic supports may be manufactured using a method including the steps of providing a mold in the shape of a wafer elastic support; depositing a layer of an elastic material having low thermal expansion coefficient on the mold; forming a hole in the deposited layer of elastic material at the base of the mold; and burning out the mold.
摘要翻译：晶片支撑装置和方法提供了多个具有平滑曲率的弹性支撑件，用于在相应的多个支撑点处接触晶片。每个弹性支撑件在支撑点处直接接触晶片并且独立于其它弹性支撑件膨胀和/或压缩以适应处理期间晶片的弯曲。晶片支撑装置包括多个柔性弹性支撑件，晶片直接定位在该多个柔性弹性支撑件上，其中多个弹性支撑件中的每一个在处理期间通过在处理期间响应于晶片的弯曲而压缩或膨胀来保持晶片以提供连续的均匀支撑用于处理过程中的晶圆。一种晶片支撑方法包括以下步骤：提供多个柔性弹性支撑件并将待加工的晶片直接定位在所述多个弹性支撑件上，其中所述多个弹性支撑件中的每个弹性支撑件在处理期间通过压缩或扩张来响应于在处理期间晶片的弯曲以在处理期间为晶片提供连续的均匀支撑。可以使用包括以下步骤的方法制造弹性支撑件：提供具有晶片弹性支撑件形状的模具; 在模具上沉积具有低热膨胀系数的弹性材料层; 在模具底部的弹性材料的沉积层中形成孔; 并焚烧模具。

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