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1. 发明授权

US5656535A Storage node process for deep trench-based DRAM 失效
标题翻译：深沟槽DRAM的存储节点处理
公开(公告)号：US5656535A
公开(公告)日：1997-08-12
申请号：US610912
申请日：1996-03-04
申请人： Herbert Ho , Radhika Srinivasan , Scott D. Halle , Erwin Hammerl , David M. Dobuzinsky , Jack A. Mandelman , Mark Anthony Jaso
发明人： Herbert Ho , Radhika Srinivasan , Scott D. Halle , Erwin Hammerl , David M. Dobuzinsky , Jack A. Mandelman , Mark Anthony Jaso
IPC分类号： H01L27/04 , H01L21/02 , H01L21/762 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L21/70
CPC分类号： H01L27/10861 , H01L21/76232 , H01L27/10832 , H01L28/82 , Y10S438/973
摘要： A simplified method of fabricating a storage node for a deep trench-based DRAM on a semiconductor substrate. The method involves the etching a trench in a surface of the substrate and then forming a layer of dielectric material on a sidewall of the trench the top portion of which is subsequently removed from the sidewall. Next, a layer of oxide is grown on the exposed portion of the sidewall. A portion of this layer of oxide is then removed from the sidewall in order to orient the layer of oxide a predetermined distance from the surface of the substrate. Finally, the trench is filled with a semiconductive material.
摘要翻译：一种在半导体衬底上制造用于深沟槽DRAM的存储节点的简化方法。该方法包括在衬底的表面中蚀刻沟槽，然后在沟槽的侧壁上形成介电材料层，其顶部部分随后从侧壁去除。接下来，在侧壁的暴露部分上生长一层氧化物。然后从侧壁去除该层氧化物的一部分，以便将氧化层定向到距衬底表面预定的距离。最后，沟槽填充有半导体材料。

2. 发明授权

US6153474A Method of controllably forming a LOCOS oxide layer over a portion of a vertically extending sidewall of a trench extending into a semiconductor substrate 失效
标题翻译：在延伸到半导体衬底的沟槽的垂直延伸的侧壁的一部分上可控地形成LOCOS氧化物层的方法
公开(公告)号：US6153474A
公开(公告)日：2000-11-28
申请号：US108619
申请日：1998-07-01
申请人： Herbert Lei Ho , Radhika Srinivasan , Scott D. Halle , Erwin Hammerl , David M. Dobuzinsky , Jack Allan Mandelman , Mark Anthony Jaso
发明人： Herbert Lei Ho , Radhika Srinivasan , Scott D. Halle , Erwin Hammerl , David M. Dobuzinsky , Jack Allan Mandelman , Mark Anthony Jaso
IPC分类号： H01L27/04 , H01L21/02 , H01L21/762 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L21/336
CPC分类号： H01L27/10861 , H01L21/76232 , H01L27/10832 , H01L28/82 , Y10S438/973
摘要： The present invention includes a method and system to increase the deep trench sidewall surface area in a storage node on a DRAM chip. By tilting the trenches the capacitance is increased without taking up more space on the semiconductor chip.
摘要翻译：本发明包括一种用于增加DRAM芯片上的存储节点中的深沟槽侧壁表面积的方法和系统。通过倾斜沟槽，电容增加，而不占用半导体芯片上的更多空间。

3. 发明授权

US08507346B2 Method of forming a semiconductor device having a cut-way hole to expose a portion of a hardmask layer 有权
标题翻译：形成具有切割孔以暴露硬掩模层的一部分的半导体器件的方法
公开(公告)号：US08507346B2
公开(公告)日：2013-08-13
申请号：US12949148
申请日：2010-11-18
申请人： Martin Burkhardt , Matthew E. Colburn , Allen H. Gabor , Oleg Gluschenkov , Scott D. Halle , Howard S. Landis , Helen Wang
发明人： Martin Burkhardt , Matthew E. Colburn , Allen H. Gabor , Oleg Gluschenkov , Scott D. Halle , Howard S. Landis , Helen Wang
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/84 , H01L21/338 , H01L21/3205 , H01L21/4763 , H01L21/311 , H01L21/302 , H01L21/461
CPC分类号： H01L29/78 , H01L21/28123 , H01L21/32139 , H01L22/12 , H01L22/26
摘要： A method of forming a semiconductor device having a substrate, an active region and an inactive region includes: forming a hardmask layer over the substrate; transferring a first pattern into the hardmask layer in the active region of the semiconductor device; forming one or more fills in the inactive region; forming a cut-away hole within, covering, or partially covering, the one or more fills to expose a portion of the hardmask layer, the exposed portion being within the one or more fills; and exposing the hardmask layer to an etchant to divide the first pattern into a second pattern including at least two separate elements.
摘要翻译：一种形成具有衬底，有源区和非活性区的半导体器件的方法包括：在衬底上形成硬掩模层; 将第一图案转移到半导体器件的有源区中的硬掩模层中; 在非活性区域中形成一个或多个填充物; 在所述一个或多个填充物内部，覆盖或部分地覆盖所述硬掩模层的一部分以暴露所述硬掩模层的一部分内的切除孔，所述暴露部分在所述一个或多个填充物内; 以及将所述硬掩模层暴露于蚀刻剂以将所述第一图案划分成包括至少两个分离元件的第二图案。

4. 发明授权

US07993815B2 Line ends forming 有权
标题翻译：线端成型
公开(公告)号：US07993815B2
公开(公告)日：2011-08-09
申请号：US11853353
申请日：2007-09-11
申请人： Matthew E. Colburn , Allen H. Gabor , Scott D. Halle , Donald J. Samuels
发明人： Matthew E. Colburn , Allen H. Gabor , Scott D. Halle , Donald J. Samuels
IPC分类号： H01L21/8229
CPC分类号： G11C11/412 , H01L27/0207 , H01L27/105 , H01L27/1052 , H01L27/11 , H01L27/115
摘要： Methods of forming line ends and a related memory cell including the line ends are disclosed. In one embodiment, the method includes forming a first device element and a second device element separated from the first device element by a space; and forming a first line extending from the first device element, the first line including a bulbous line end over the space and distanced from the first device element, and a second line extending from the second device element, the second line including a bulbous line end over the space and distanced from the second device element.
摘要翻译：公开了形成线端的方法和包括线端的相关存储单元。在一个实施例中，该方法包括通过空间形成与第一器件元件分离的第一器件元件和第二器件元件; 以及形成从所述第一装置元件延伸的第一线，所述第一线包括在所述空间上并与所述第一装置元件间隔开的球形线端，以及从所述第二装置元件延伸的第二线，所述第二线包括球根线端并且与第二设备元件分开。

5. 发明申请

US20090181330A1 METHODS FOR FORMING A COMPOSITE PATTERN INCLUDING PRINTED RESOLUTION ASSIST FEATURES 有权
标题翻译：用于形成复合图案的方法，包括印刷分辨率辅助特征
公开(公告)号：US20090181330A1
公开(公告)日：2009-07-16
申请号：US12013627
申请日：2008-01-14
申请人： Allen H. Gabor , Scott D. Halle , Helen Wang
发明人： Allen H. Gabor , Scott D. Halle , Helen Wang
IPC分类号： G03F7/20
CPC分类号： H01L21/0337 , G03F7/70433 , G03F7/70466
摘要： An underlayer to be patterned with a composite pattern is formed on a substrate. The composite pattern is decomposed into a first pattern and a second pattern, each having reduced complexity than the composite pattern. A hard mask layer is formed directly on the underlying layer. A first photoresist is applied over the hard mask layer and lithographically patterned with the first pattern, which is transferred into the hard mask layer by a first etch. A second photoresist is applied over the hard mask layer. The second photoresist is patterned with the second pattern to expose portions of the underlying layer. The exposed portions of the underlying layer are etched employing the second photoresist and the hard mask layer, which contains the first pattern so that the composite pattern is transferred into the underlying layer.
摘要翻译：在基板上形成图案化复合图案的底层。复合图案被分解为第一图案和第二图案，每个图案具有比复合图案更低的复杂度。硬掩模层直接形成在下层上。将第一光致抗蚀剂施加在硬掩模层上并用第一图案进行光刻图案化，其通过第一蚀刻转移到硬掩模层中。在硬掩模层上施加第二光致抗蚀剂。用第二图案对第二光致抗蚀剂进行图案化以暴露下层的部分。使用包含第一图案的第二光致抗蚀剂和硬掩模层来蚀刻下层的暴露部分，使得复合图案被转移到下层中。

6. 发明授权

US06649531B2 Process for forming a damascene structure 有权
标题翻译：形成镶嵌结构的方法
公开(公告)号：US06649531B2
公开(公告)日：2003-11-18
申请号：US09994340
申请日：2001-11-26
申请人： William J. Cote , Timothy J. Dalton , Prakash Chimanlal Dev , Daniel C. Edelstein , Scott D. Halle , Gill Yong Lee , Arpan P. Mahorowala
发明人： William J. Cote , Timothy J. Dalton , Prakash Chimanlal Dev , Daniel C. Edelstein , Scott D. Halle , Gill Yong Lee , Arpan P. Mahorowala
IPC分类号： H01L21302
CPC分类号： H01L21/76808 , H01L21/31633
摘要： A process for forming a damascene structure includes depositing a bilayer comprising a first dielectric layer and a second dielectric layer onto a substrate, wherein the first layer has a dielectric constant higher than the second layer, and wherein the second layer is selected from a low k dielectric material comprising Si, C, O and H. The multi-step damascene structure is patterned into the dielectric bilayer using highly selective anisotropic reactive ion etching. Photoresist, polymers and post etch residues are removed from the substrate using a plasma ashing process without damaging the underlying dielectric layers.
摘要翻译：用于形成镶嵌结构的方法包括将包括第一介电层和第二介电层的双层沉积到基板上，其中第一层具有高于第二层的介电常数，并且其中第二层选自低k 包含Si，C，O和H的介电材料。使用高选择性各向异性反应离子蚀刻，将多步镶嵌结构图案化成电介质双层。使用等离子体灰化处理从基板去除光致抗蚀剂，聚合物和后蚀刻残留物，而不损坏下面的介电层。

7. 发明申请

US20130017486A1 PROCESS OF MAKING A LITHOGRAPHIC STRUCTURE USING ANTIREFLECTIVE MATERIALS 有权
标题翻译：使用抗反射材料制作光刻结构的方法
公开(公告)号：US20130017486A1
公开(公告)日：2013-01-17
申请号：US13617634
申请日：2012-09-14
申请人： Marie Angelopoulos , Katherina E. Babich , Sean D. Burns , Allen H. Gabor , Scott D. Halle , Arpan P. Mahorowala , Dirk Pfeiffer
发明人： Marie Angelopoulos , Katherina E. Babich , Sean D. Burns , Allen H. Gabor , Scott D. Halle , Arpan P. Mahorowala , Dirk Pfeiffer
IPC分类号： G03F7/004 , B32B7/02 , B32B27/06 , G03F7/20
CPC分类号： G03F7/091 , G03F7/0757 , Y10T428/24942 , Y10T428/31663
摘要： A lithographic structure comprising: an organic antireflective material disposed on a substrate, and a silicon antireflective material disposed on the organic antireflective material. The silicon antireflective material comprises a crosslinked polymer with a SiOx backbone, a chromophore, and a transparent organic group that is substantially transparent to 193 nm or 157 nm radiation. In combination, the organic antireflective material and the silicon antireflective material provide an antireflective material suitable for deep ultraviolet lithography. The invention is also directed to a process of making the lithographic structure.
摘要翻译：一种光刻结构，包括：设置在基板上的有机抗反射材料和设置在有机抗反射材料上的硅抗反射材料。硅抗反射材料包括具有SiO x主链，发色团和对193nm或157nm辐射基本上透明的透明有机基团的交联聚合物。组合地，有机抗反射材料和硅抗反射材料提供适用于深紫外光刻的抗反射材料。本发明还涉及制备光刻结构的方法。

8. 发明授权

US08293454B2 Process of making a lithographic structure using antireflective materials 有权
标题翻译：使用抗反射材料制作平版印刷结构的工艺
公开(公告)号：US08293454B2
公开(公告)日：2012-10-23
申请号：US12199253
申请日：2008-11-18
申请人： Marie Angelopoulos , Katherina E. Babich , Sean D. Burns , Allen H. Gabor , Scott D. Halle , Arpan P. Mahorowala , Dirk Pfeiffer
发明人： Marie Angelopoulos , Katherina E. Babich , Sean D. Burns , Allen H. Gabor , Scott D. Halle , Arpan P. Mahorowala , Dirk Pfeiffer
IPC分类号： B32B9/04 , G03F7/075
CPC分类号： G03F7/091 , G03F7/0757 , Y10T428/24942 , Y10T428/31663
摘要： A lithographic structure comprising: an organic antireflective material disposed on a substrate; and a silicon antireflective material disposed on the organic antireflective material. The silicon antireflective material comprises a crosslinked polymer with a SiOx backbone, a chromophore, and a transparent organic group that is substantially transparent to 193 nm or 157 nm radiation. In combination, the organic antireflective material and the silicon antireflective material provide an antireflective material suitable for deep ultraviolet lithography. The invention is also directed to a process of making the lithographic structure.
摘要翻译：一种光刻结构，包括：设置在基板上的有机抗反射材料; 以及设置在有机抗反射材料上的硅抗反射材料。硅抗反射材料包括具有SiO x主链，发色团和对193nm或157nm辐射基本透明的透明有机基团的交联聚合物。组合地，有机抗反射材料和硅抗反射材料提供适用于深紫外光刻的抗反射材料。本发明还涉及制备光刻结构的方法。

9. 发明授权

US06355567B1 Retrograde openings in thin films 失效
标题翻译：薄膜逆行开口
公开(公告)号：US06355567B1
公开(公告)日：2002-03-12
申请号：US09345646
申请日：1999-06-30
申请人： Scott D. Halle , Paul C. Jamison , David E. Kotecki , Richard S. Wise
发明人： Scott D. Halle , Paul C. Jamison , David E. Kotecki , Richard S. Wise
IPC分类号： H01L21311
CPC分类号： H01L21/76879 , H01L21/31116 , H01L21/76804 , H01L21/7682 , H01L21/76885
摘要： Retrograde openings in thin films and the process for forming the same. The openings may include conductive materials formed within the openings to serve as a wiring pattern which includes wires having tapered cross sections. The process involves a two-step etching procedure for forming a retrograde opening within a film having a gradient of a characteristic that influences the etch rate for a chosen etchant species. An opening is first formed within the film by an anisotropic etch process. The opening is then converted to an opening including retrograde features by an isotropic etch process which is selective to the characteristic. Thereafter, the retrograde opening is filled with a conductive material, in one case, by electroplating or other deposition techniques.
摘要翻译：薄膜中的逆行开口及其形成方法。开口可以包括形成在开口内的导电材料，以用作包括具有锥形横截面的导线的布线图案。该方法涉及用于在膜内形成具有影响所选择的蚀刻剂物质的蚀刻速率的特性梯度的逆向开口的两步蚀刻方法。首先通过各向异性蚀刻工艺在膜内形成开口。然后通过对特性有选择性的各向同性蚀刻工艺将开口转换成包括逆行特征的开口。此后，逆行开口填充有导电材料，在一种情况下，通过电镀或其它沉积技术。

10. 发明授权

US5691540A Assembly for measuring a trench depth parameter of a workpiece 失效
标题翻译：用于测量工件的沟槽深度参数的组件
公开(公告)号：US5691540A
公开(公告)日：1997-11-25
申请号：US643090
申请日：1996-04-30
申请人： Scott D. Halle , Philip Charles Danby Hobbs , Tadashi Mitsui , Theodore G. van Kessel , Hemantha Kumar Wickramasinghe
发明人： Scott D. Halle , Philip Charles Danby Hobbs , Tadashi Mitsui , Theodore G. van Kessel , Hemantha Kumar Wickramasinghe
IPC分类号： G01B11/22
CPC分类号： G01B11/22
摘要： An assembly for measuring a trench depth parameter of a workpiece is disclosed. The assembly has an ultra-violet radiation source; a split fiber bundle having a first branch for propagating the ultra-violet radiation from the radiation source to a lens, and a second branch; a lens for focusing the UV radiation to the workpiece and refocusing an ultra-violet interference signal to the second branch; and a detector responsive to the ultra-violet interference signal received through the second branch. The detector transforms the ultra-violet interference signal to an electrical signal which is a measure of a trench depth of the workpiece. The ultra-violet interference signal is developed when ultra-violet radiation propagates through the workpiece and reflects from its base region to thereby interfere with ultra-violet radiation that is directly reflected by a workpiece surface which is different from the base region.
摘要翻译：公开了一种用于测量工件的沟槽深度参数的组件。该组件具有紫外辐射源; 具有用于将紫外辐射从辐射源传播到透镜的第一分支的分裂光纤束和第二分支; 用于将UV辐射聚焦到工件并将紫外干涉信号重新聚焦到第二分支的透镜; 以及响应于通过第二分支接收的紫外干涉信号的检测器。检测器将紫外线干涉信号转换成电信号，该电信号是工件的沟槽深度的量度。当紫外线辐射传播通过工件并从其底部区域反射时，紫外线干涉信号被开发，从而干扰由与基底区域不同的工件表面直接反射的紫外辐射。

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