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    • 9. 发明授权
    • X-ray analysis apparatus with a graded multilayer mirror
    • 具有渐变多层镜的X射线分析装置
    • US06226349B1
    • 2001-05-01
    • US09356346
    • 1999-07-19
    • Manfred SchusterHerbert GoebelCarsten MichaelsenRuediger Bormann
    • Manfred SchusterHerbert GoebelCarsten MichaelsenRuediger Bormann
    • G01N23207
    • G01N23/201G01N23/20G21K1/062
    • An X-ray analysis apparatus having a curved paraboloid-shaped curved graded multilayer Bragg reflector (5) is characterized in that the layers of the reflector (5) are directly introduced onto a concave curved surface of a paraboloid-shaped hollow substrate and a maximum allowable shape deviation for the concave substrate surface facing the reflector is &Dgr;p={square root over (2px)} &Dgr;&thgr;R, and having a maximum allowable waviness Δ ⁢   ⁢ y Δ ⁢   ⁢ x = 1 2 ⁢ Δθ R and a maximum allowable roughness &Dgr;y=d/2&pgr;, preferentially &Dgr;y≦0.3 nm, wherein the X radiation (7) impinges on the curved surface of the reflector (5) at an angle of incidence 0°
    • 具有弯曲抛物面形弯曲多层布拉格反射体(5)的X射线分析装置的特征在于,将反射器(5)的各层直接导入抛物面形中空基板的凹曲面上, 面向反射器的凹面基板表面的允许形状偏差为DELTAp = {平方根超过(2px)} DELTAthetaR,并且具有最大允许波纹度和最大允许粗糙度DELTAy = d / 2pi,优选为DELTAy <= 0.3nm,其中X 辐射(7)以入射角0°<= 5°撞击反射器(5)的弯曲表面,随着反射器层朝向抛物面开口的周期厚度d在x方向上增加, 偏差DELTAd / DELTAx小于d /(2x)。 以这种方式,在可靠性和寿命方面,分析装置的传输被显着地提高,同时降低了制造难度和费用。
    • 10. 发明授权
    • Process for manufacturing semiconductor components
    • 制造半导体元件的工艺
    • US5393711A
    • 1995-02-28
    • US211670
    • 1994-04-12
    • Vesna BiallasHerbert GoebelRichard Spitz
    • Vesna BiallasHerbert GoebelRichard Spitz
    • H01L21/02H01L21/18H01L21/304H01L21/306H01L21/329H01L21/78H01L21/469
    • H01L21/02052H01L21/187H01L21/3043H01L21/78Y10S148/135
    • A process for manufacturing semiconductor components, especially diodes. The process entails first bonding two semiconductor wafers of different conducting types (p and n), according to a silicon-fusion bonding process (SFB), thereby forming a bonded wafer assembly with a p-n junction. The bonded wafers are then partitioned into a plurality of semiconductor elements by the cutting of grooves into the bonded wafers to a depth which extends at least to the p-n junction. Each of the plurality of semiconductor elements thus formed has an individual p-n junction with sides exposed by the grooves. The sides of the semiconductor elements are then subjected to etching and passivation. The upper and lower surfaces of the bonded wafer assembly are then metal-coated. Finally, the semiconductor elements are separated from each other by a sawing operation.
    • PCT No.PCT / DE92 / 00792 Sec。 371日期1994年04月12日 102(e)日期1994年4月12日PCT提交1992年9月17日PCT公布。 公开号WO93 / 08592 日期:1993年04月29日。一种制造半导体元件,特别是二极管的工艺。 该工艺需要根据硅熔接工艺(SFB)首先接合不同导电类型(p和n)的两个半导体晶片,由此形成具有p-n结的键合晶片组件。 然后通过将沟槽切割成键合的晶片至至少延伸到p-n结的深度,将结合的晶片分隔成多个半导体元件。 如此形成的多个半导体元件中的每一个具有由凹槽暴露的侧面的单独的p-n结。 然后对半导体元件的侧面进行蚀刻和钝化。 然后将接合的晶片组件的上表面和下表面金属涂覆。 最后,半导体元件通过锯切操作彼此分离。