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    • 1. 发明授权
    • Arrangement of plural micro-cooling devices with electronic components
    • 具有电子部件的多个微型冷却装置的布置
    • US5737186A
    • 1998-04-07
    • US639102
    • 1996-04-22
    • Hans-Juergen FuesserReinhard ZachaiWolfram MuenchTim Gutheit
    • Hans-Juergen FuesserReinhard ZachaiWolfram MuenchTim Gutheit
    • F28F3/12H01C1/082H01L23/473H05K7/20
    • H01C1/082F28F3/12H01L23/473H01L2924/0002
    • An arrangement of a plurality of microcooling devices provided with electrical components, each microcooling device having a closed channel structure for a coolant to flow through, and being provided with electrical conductors for the electronic components and with externally carried fluid ducts for a coolant which flows through the channel structures. A covering layer which forms one of at least two flat sides of the microcooling device is made from an electrically insulating material with good heat conductivity. The electronic components are arrayed on this cover layer and on the opposite flat side of each microcooling device. Adjacent microcooling devices which are provided with electronic components on confronting flat sides are arranged with their components spaced apart or staggered with respect to one another, and the components of one microcooling device preferably are in contact with the cover layer of the adjacent microcooling device.
    • 设置有多个具有电气部件的微冷却装置的布置,每个微冷装置具有用于冷却剂流过的封闭通道结构,并且设置有用于电子部件的电导体和用于流过冷却剂的外部承载流体管道 渠道结构。 形成微冷装置的至少两个平坦侧面之一的覆盖层由具有良好导热性的电绝缘材料制成。 电子部件排列在该覆盖层上并且排列在每个显微冷却装置的相对的平坦侧上。 在相对的平坦侧面上设置有电子部件的相邻的微冷装置被布置成其部件相对于彼此分开或交错,并且一个微冷装置的部件优选地与相邻的微冷装置的覆盖层接触。
    • 6. 发明授权
    • Process of producing diamond composite structure for electronic
components
    • 生产电子元器件金刚石复合结构的工艺
    • US5525537A
    • 1996-06-11
    • US432853
    • 1995-05-02
    • Reinhard ZachaiHans-Juergen FuesserTim Gutheit
    • Reinhard ZachaiHans-Juergen FuesserTim Gutheit
    • C30B25/18H01L21/20H01L29/16H01L29/267C30B29/04
    • H01L29/16C30B25/18H01L21/02381H01L21/02439H01L21/02447H01L21/02505H01L21/0251H01L21/02527H01L21/0262H01L21/02631H01L29/1602Y10S438/938
    • The invention relates to a composite structure for electronic components comprising a growth substrate, an intermediate layer having substantially a crystallographic lattice structure arranged on the growth substrate, and a diamond layer applied on top of the intermediate layer, and to a process for producing a composite structure of this type. In order to obtain a diamond layer of highest quality, the intermediate layer has substantially a zinc blende or diamond or a calcium fluoride structure, in which at the outset of the intermediate layer the difference between the lattice constant of the intermediate layer and the lattice constant of the growth substrate, relative to the lattice constant of the growth substrate, is less than 20%, in particular less than 10%, and in which at the transition from the intermediate layer to the diamond layer for the lattice constant of the intermediate layer and the lattice constant of the diamond layer the value of the expression.vertline.(n*a.sub.ZS -m*a.sub.D).vertline./n*a.sub.ZSis less than 0.2, in particular less than 0.1, whereinn and m are natural numbers,a.sub.D is the lattice constant of the diamond layer, anda.sub.ZS is the lattice constant of the intermediate layer at the transition to the diamond layer.
    • 本发明涉及一种用于电子部件的复合结构体,其包括生长衬底,具有布置在生长衬底上的基本上晶格结构的中间层和施加在中间层顶部上的金刚石层,以及用于制备复合材料的方法 这种结构。 为获得最高质量的金刚石层,中间层基本上具有闪锌矿或金刚石或氟化钙结构,其中在中间层的一开始,中间层的晶格常数与晶格常数之间的差异 的生长衬底相对于生长衬底的晶格常数小于20%,特别是小于10%,并且其中在从中间层到金刚石层的中间层的晶格常数的转变 并且金刚石层的晶格常数表达式|(n * aZS-m * aD)| / n * aZS的值小于0.2,特别是小于0.1,其中n和m是自然数,aD是 金刚石层的晶格常数,aZS是过渡到金刚石层的中间层的晶格常数。
    • 7. 发明授权
    • Composite structure comprising a semiconductor layer arranged on a
diamond or diamond-like layer and process for its production
    • 复合结构包括布置在金刚石或类金刚石层上的半导体层及其生产方法
    • US5843224A
    • 1998-12-01
    • US512080
    • 1995-08-07
    • Reinhard ZachaiTim GutheitKenneth Goodson
    • Reinhard ZachaiTim GutheitKenneth Goodson
    • C30B29/04C30B29/06H01L21/02H01L21/20
    • H01L21/02532H01L21/02381H01L21/02444H01L21/02447H01L21/02502H01L21/0251H01L21/02639
    • The invention relates to a composite structure including a semiconductor layer arranged on a diamond layer and/or a diamond-like layer, for subsequent processing to produce electronic components and/or groups of components and to a process for producing such a composite structure. In order to improve the quality of the subsequent components, the diamond layer is deposited underneath the component source zones from which the components are subsequently produced, and the diamond or diamond-like layer is provided at the margins of the component source zones and/or outside of the component source zones with edges where the thickness of the layer changes abruptly such that the edges have an edge height amounting to at least 1O%, preferably at least 50%, of the layer thickness of the diamond layer. Imperfections such as dislocations or other discontinuities in the semiconductor layer tend to collect at these edges outside of the component source zones, thereby decreasing the density of discontinuities in the component source zones and improving the quality of electronic components produced of material from the component source zones.
    • 本发明涉及一种复合结构,其包括布置在金刚石层和/或类金刚石层上的半导体层,用于随后的生产电子部件和/或组件组的处理以及用于生产这种复合结构的方法。 为了提高随后的组分的质量,将金刚石层沉积在组分源区域的下方,随后从其中产生组分,并且在组分源区域的边缘处提供金刚石或类金刚石层,和/或 在具有边缘厚度的边缘的组分源区域外部突然变化,使得边缘具有相当于金刚石层的层厚度的至少10%,优选至少50%的边缘高度。 在半导体层中的位错或其他不连续性的缺陷倾向于在这些边缘处收集在部件源区域外部,从而降低部件源区域中的不连续密度,并且提高从部件源区域产生的材料的电子部件的质量 。
    • 9. 发明授权
    • Composite structure of an electronic component
    • 电子元件的复合结构
    • US6054719A
    • 2000-04-25
    • US639104
    • 1996-04-22
    • Hans-Jurgen FusserReinhard ZachaiTim Gutheit
    • Hans-Jurgen FusserReinhard ZachaiTim Gutheit
    • H01L21/04H01L29/16H01L29/267H01L29/06
    • H01L29/1602H01L21/0405H01L29/16H01L29/267
    • The invention relates to a composite structure for an electronic component with an undoped diamond layer, at least one side of which is covered by a doped non-diamond layer, arranged on a growth substrate. The diamond layer has a thickness of less than 0.5 .mu.m. In addition, the conduction and/or valence bands of the diamond layer and the nondiamond layer exhibit such a band discontinuity that charge carries from the doped non-diamond layer which are excited optically and/or thermally, for example, can be drawn, with a reduction of their potential energy, into the valence and/or conduction band of the undoped diamond layer. This configuration causes a potential well to exist in the area of the diamond layer, at least in one direction, with a quantizing effect for the charge carriers drawn into the diamond layer.
    • 本发明涉及一种具有未掺杂金刚石层的电子部件的复合结构,该金刚石层的至少一侧由掺杂的非金刚石层覆盖,布置在生长衬底上。 金刚石层的厚度小于0.5μm。 此外,金刚石层和非金刚石层的导电带和/或价带表现出这样的带状不连续性,即电荷从掺杂的非金刚石层进行光学和/或热激发,例如可以用 将它们的势能降低到未掺杂的金刚石层的价态和/或导带。 这种配置使得在金刚石层的区域中至少在一个方向上存在潜在的阱,并且对于载入金刚石层的电荷载流子具有量化效应。
    • 10. 发明授权
    • Method of producing a transistor structure
    • 晶体管结构的制造方法
    • US06262457B1
    • 2001-07-17
    • US09038638
    • 1998-03-10
    • Matthias StecherTim GutheitWerner Schwetlick
    • Matthias StecherTim GutheitWerner Schwetlick
    • H01L718232
    • H01L21/74H01L21/823493H01L29/1079
    • Additional degrees of freedom are provided for optimizing the component properties by combining two doping profiles. The threshold voltage of NMOS or DMOS transistors can be set through the process parameters involved in the introduction and outward diffusion of the further dopant of the second conductivity type, independently of the deep concentration, since the dopant concentration at the surface can be chosen independently of the dopant concentration at depth. A low film resistance results from the great penetration depth of the semiconductor region through the combination of the two dopant profiles. The low film resistance leads to reduced pinching of the substrate current in an NMOS transistor, and to greater stability against “latch-up”, without substantially increasing the concentration of the dopants in the region of source/drain diffusions, and therefore without unfavorably affecting drain/bulk capacitance. In addition, the concentration of the further dopant of the second conductivity type can be kept low. A semiconductor region of a second conductivity type is thus attained which exhibits little outward lateral diffusion. Further, when the components are given the conventional polarity, the semiconductor region is insulated from the p-substrate by the buried zone.
    • 提供了额外的自由度,用于通过组合两个掺杂分布来优化组件特性。 NMOS或DMOS晶体管的阈值电压可以通过与第二导电类型的另外的掺杂剂的引入和向外扩散相关的工艺参数来设置,与深度浓度无关,因为表面上的掺杂剂浓度可独立于 掺杂浓度在深度。 通过两种掺杂剂轮廓的组合,半导体区域的穿透深度很大导致低电阻。 低电阻电阻导致NMOS晶体管中衬底电流的压缩减少,并且对于“闭锁”而言具有更大的稳定性,而基本上不增加源极/漏极扩散区域中的掺杂剂的浓度,因此不会不利地影响 漏极/体电容。 此外,第二导电类型的另外的掺杂剂的浓度可以保持较低。 从而获得第二导电类型的半导体区域,其表现出很小的向外侧向扩散。 此外,当组件被赋予常规极性时,半导体区域通过掩埋区与p衬底绝缘。