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1. 发明申请

US20130082322A1 SEMICONDUCTOR DEVICE WITH SELF-CHARGING FIELD ELECTRODES 有权
标题翻译：具有自充电现场电极的半导体器件
公开(公告)号：US20130082322A1
公开(公告)日：2013-04-04
申请号：US13250013
申请日：2011-09-30
申请人： Hans Weber , Franz Hirler , Stefan Gamerith
发明人： Hans Weber , Franz Hirler , Stefan Gamerith
IPC分类号： H01L21/336 , H01L21/28
CPC分类号： H01L29/872 , H01L29/0653 , H01L29/407 , H01L29/7813 , H01L29/868
摘要： Disclosed is a semiconductor device including a drift region of a first doping type, a junction between the drift region and a device region, and at least one field electrode structure in the drift region. The field electrode structure includes a field electrode, a field electrode dielectric adjoining the field electrode and arranged between the field electrode and the drift region, and having an opening, at least one of a field stop region and a generation region.
摘要翻译：公开了一种半导体器件，其包括第一掺杂类型的漂移区域，漂移区域和器件区域之间的结以及漂移区域中的至少一个场电极结构。场电极结构包括场电极，与场电极相邻并且设置在场电极和漂移区之间的场电极电介质，并且具有开场，场停止区和发生区中的至少一个。

2. 发明授权

US09112053B2 Method for producing a semiconductor device including a dielectric layer 有权
标题翻译：用于制造包括电介质层的半导体器件的方法
公开(公告)号：US09112053B2
公开(公告)日：2015-08-18
申请号：US13537374
申请日：2012-06-29
申请人： Hans Weber , Franz Hirler , Andreas Meiser , Anton Mauder , Kurt Sorschag , Stefan Gamerith , Roman Knoefler
发明人： Hans Weber , Franz Hirler , Andreas Meiser , Anton Mauder , Kurt Sorschag , Stefan Gamerith , Roman Knoefler
IPC分类号： H01L21/8234 , H01L27/06 , H01L29/40 , H01L29/66 , H01L29/78 , H01L29/06
CPC分类号： H01L29/7802 , H01L21/823437 , H01L21/823481 , H01L21/823487 , H01L27/0629 , H01L29/0653 , H01L29/407 , H01L29/66734 , H01L29/7828
摘要： A semiconductor device with a dielectric layer is produced by providing a semiconductor body with a first trench extending into the semiconductor body, the first trench having a bottom and a sidewall. A first dielectric layer is formed on the sidewall in a lower portion of the first trench and a first plug is formed in the lower portion of the first trench so as to cover the first dielectric layer. The first plug leaves an upper portion of the sidewall uncovered. A sacrificial layer is formed on the sidewall in the upper portion of the first trench and a second plug is formed in the upper portion of the first trench. The sacrificial layer is removed so as to form a second trench having sidewalls and a bottom. A second dielectric layer is formed in the second trench and extends to the first dielectric layer.
摘要翻译：具有电介质层的半导体器件通过向半导体本体提供延伸到半导体本体中的第一沟槽，第一沟槽具有底部和侧壁来制造。第一电介质层形成在第一沟槽的下部的侧壁上，第一插塞形成在第一沟槽的下部，以覆盖第一电介质层。第一个塞子留下未覆盖的侧壁的上部。牺牲层形成在第一沟槽的上部的侧壁上，第二插塞形成在第一沟槽的上部。除去牺牲层以形成具有侧壁和底部的第二沟槽。第二介电层形成在第二沟槽中并延伸到第一介电层。

3. 发明授权

US08716788B2 Semiconductor device with self-charging field electrodes 有权
标题翻译：具有自带场电极的半导体器件
公开(公告)号：US08716788B2
公开(公告)日：2014-05-06
申请号：US13250013
申请日：2011-09-30
申请人： Hans Weber , Franz Hirler , Stefan Gamerith
发明人： Hans Weber , Franz Hirler , Stefan Gamerith
IPC分类号： H01L29/66
CPC分类号： H01L29/872 , H01L29/0653 , H01L29/407 , H01L29/7813 , H01L29/868
摘要： Disclosed is a semiconductor device including a drift region of a first doping type, a junction between the drift region and a device region, and at least one field electrode structure in the drift region. The field electrode structure includes a field electrode, a field electrode dielectric adjoining the field electrode and arranged between the field electrode and the drift region, and having an opening, at least one of a field stop region and a generation region.
摘要翻译：公开了一种半导体器件，其包括第一掺杂类型的漂移区域，漂移区域和器件区域之间的结以及漂移区域中的至少一个场电极结构。场电极结构包括场电极，与场电极相邻并且设置在场电极和漂移区之间的场电极电介质，并且具有开场，场停止区和发生区中的至少一个。

4. 发明申请

US20130005099A1 METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE INCLUDING A DIELECTRIC LAYER 有权
标题翻译：用于生产包括介电层的半导体器件的方法
公开(公告)号：US20130005099A1
公开(公告)日：2013-01-03
申请号：US13537374
申请日：2012-06-29
申请人： Hans Weber , Franz Hirler , Andreas Meiser , Anton Mauder , Kurt Sorschag , Stefan Gamerith , Roman Knoefler
发明人： Hans Weber , Franz Hirler , Andreas Meiser , Anton Mauder , Kurt Sorschag , Stefan Gamerith , Roman Knoefler
IPC分类号： H01L21/336 , H01L21/20
CPC分类号： H01L29/7802 , H01L21/823437 , H01L21/823481 , H01L21/823487 , H01L27/0629 , H01L29/0653 , H01L29/407 , H01L29/66734 , H01L29/7828
摘要： A semiconductor device with a dielectric layer is produced by providing a semiconductor body with a first trench extending into the semiconductor body, the first trench having a bottom and a sidewall. A first dielectric layer is formed on the sidewall in a lower portion of the first trench and a first plug is formed in the lower portion of the first trench so as to cover the first dielectric layer. The first plug leaves an upper portion of the sidewall uncovered. A sacrificial layer is formed on the sidewall in the upper portion of the first trench and a second plug is formed in the upper portion of the first trench. The sacrificial layer is removed so as to form a second trench having sidewalls and a bottom. A second dielectric layer is formed in the second trench and extends to the first dielectric layer.
摘要翻译：具有电介质层的半导体器件通过向半导体本体提供延伸到半导体本体中的第一沟槽，第一沟槽具有底部和侧壁来制造。第一电介质层形成在第一沟槽的下部的侧壁上，第一插塞形成在第一沟槽的下部，以覆盖第一电介质层。第一个塞子留下未覆盖的侧壁的上部。牺牲层形成在第一沟槽的上部的侧壁上，第二插塞形成在第一沟槽的上部。除去牺牲层以形成具有侧壁和底部的第二沟槽。第二介电层形成在第二沟槽中并延伸到第一介电层。

5. 发明申请

US20120083081A1 METHOD FOR PRODUCING A GATE ELECTRODE STRUCTURE 有权
标题翻译：生产门电极结构的方法
公开(公告)号：US20120083081A1
公开(公告)日：2012-04-05
申请号：US12894141
申请日：2010-09-30
申请人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
发明人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0653 , H01L29/1095 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/66734 , H01L29/7803
摘要： A transistor with a gate electrode structure is produced by providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface. A first trench extending from the first surface into the semiconductor body is formed by removing the sacrificial layer in a section adjacent the first surface. A second trench is formed by isotropically etching the semiconductor body in the first trench. A third trench is formed below the second trench by removing at least a part of the first sacrificial layer below the second trench. A dielectric layer is formed which at least covers sidewalls of the third trench and which only covers sidewalls of the second trench. A gate electrode is formed on the dielectric layer in the second trench. The gate electrode and dielectric layer in the second trench form the gate electrode structure.
摘要翻译：具有栅电极结构的晶体管通过提供具有第一表面的半导体本体和从第一表面沿半导体本体的垂直方向延伸的第一牺牲层来制造。通过在与第一表面相邻的部分中去除牺牲层来形成从第一表面延伸到半导体本体的第一沟槽。通过在第一沟槽中各向同性蚀刻半导体本体来形成第二沟槽。通过去除第二沟槽下方的第一牺牲层的至少一部分，在第二沟槽下方形成第三沟槽。形成介电层，其至少覆盖第三沟槽的侧壁并仅覆盖第二沟槽的侧壁。栅电极形成在第二沟槽中的电介质层上。第二沟槽中的栅电极和电介质层形成栅电极结构。

6. 发明授权

US08288230B2 Method for producing a gate electrode structure 有权
标题翻译：栅电极结构的制造方法
公开(公告)号：US08288230B2
公开(公告)日：2012-10-16
申请号：US12894141
申请日：2010-09-30
申请人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
发明人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0653 , H01L29/1095 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/66734 , H01L29/7803
摘要： A transistor with a gate electrode structure is produced by providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface. A first trench extending from the first surface into the semiconductor body is formed by removing the sacrificial layer in a section adjacent the first surface. A second trench is formed by isotropically etching the semiconductor body in the first trench. A third trench is formed below the second trench by removing at least a part of the first sacrificial layer below the second trench. A dielectric layer is formed which at least covers sidewalls of the third trench and which only covers sidewalls of the second trench. A gate electrode is formed on the dielectric layer in the second trench. The gate electrode and dielectric layer in the second trench form the gate electrode structure.
摘要翻译：具有栅电极结构的晶体管通过提供具有第一表面的半导体本体和从第一表面沿半导体本体的垂直方向延伸的第一牺牲层来制造。通过在与第一表面相邻的部分中去除牺牲层来形成从第一表面延伸到半导体本体的第一沟槽。通过在第一沟槽中各向同性蚀刻半导体本体来形成第二沟槽。通过去除第二沟槽下方的第一牺牲层的至少一部分，在第二沟槽下方形成第三沟槽。形成介电层，其至少覆盖第三沟槽的侧壁并仅覆盖第二沟槽的侧壁。栅电极形成在第二沟槽中的电介质层上。第二沟槽中的栅电极和电介质层形成栅电极结构。

7. 发明授权

US08399325B2 Method for producing an electrode structure 有权
标题翻译：电极结构体的制造方法
公开(公告)号：US08399325B2
公开(公告)日：2013-03-19
申请号：US13240308
申请日：2011-09-22
申请人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
发明人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0653 , H01L29/1095 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/66734 , H01L29/7803
摘要： A method for producing a semiconductor device with an electrode structure includes providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface, and forming a first trench extending from the first surface into the semiconductor body. The first trench is formed at least by removing the sacrificial layer in a section adjacent to the first surface. The method further includes forming a second trench by isotropically etching the semiconductor body in the first trench, forming a dielectric layer which covers sidewalls of the second trench, and forming an electrode on the dielectric layer in the second trench, the electrode and the dielectric layer in the second trench forming the electrode structure.
摘要翻译：一种用于制造具有电极结构的半导体器件的方法，包括：提供具有第一表面的半导体本体，以及从所述第一表面沿着所述半导体本体的垂直方向延伸的第一牺牲层，以及形成从所述第一表面延伸的第一沟槽表面进入半导体体。至少通过在与第一表面相邻的部分中去除牺牲层来形成第一沟槽。该方法还包括通过在第一沟槽中各向同性蚀刻半导体本体来形成第二沟槽，形成覆盖第二沟槽侧壁的电介质层，以及在第二沟槽，电极和电介质层中的电介质层上形成电极在形成电极结构的第二沟槽中。

8. 发明申请

US20120083085A1 METHOD FOR PRODUCING AN ELECTRODE STRUCTURE 有权
标题翻译：生产电极结构的方法
公开(公告)号：US20120083085A1
公开(公告)日：2012-04-05
申请号：US13240308
申请日：2011-09-22
申请人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
发明人： Hans Weber , Stefan Gamerith , Roman Knoefler , Kurt Sorschag , Anton Mauder
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0653 , H01L29/1095 , H01L29/407 , H01L29/4236 , H01L29/4238 , H01L29/66734 , H01L29/7803
摘要： A method for producing a semiconductor device with an electrode structure includes providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface, and forming a first trench extending from the first surface into the semiconductor body. The first trench is formed at least by removing the sacrificial layer in a section adjacent to the first surface. The method further includes forming a second trench by isotropically etching the semiconductor body in the first trench, forming a dielectric layer which covers sidewalls of the second trench, and forming an electrode on the dielectric layer in the second trench, the electrode and the dielectric layer in the second trench forming the electrode structure.
摘要翻译：一种用于制造具有电极结构的半导体器件的方法，包括：提供具有第一表面的半导体本体，以及从所述第一表面沿着所述半导体本体的垂直方向延伸的第一牺牲层，以及形成从所述第一表面延伸的第一沟槽表面进入半导体体。至少通过在与第一表面相邻的部分中去除牺牲层来形成第一沟槽。该方法还包括通过在第一沟槽中各向同性蚀刻半导体本体来形成第二沟槽，形成覆盖第二沟槽侧壁的电介质层，以及在第二沟槽，电极和电介质层中的电介质层上形成电极在形成电极结构的第二沟槽中。

9. 发明授权

US08901642B2 Charge compensation semiconductor device 有权
标题翻译：充电补偿半导体器件
公开(公告)号：US08901642B2
公开(公告)日：2014-12-02
申请号：US13414037
申请日：2012-03-07
申请人： Hans Weber , Franz Hirler
发明人： Hans Weber , Franz Hirler
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/167 , H01L29/32 , H01L29/407 , H01L29/408 , H01L29/41766 , H01L29/66727
摘要： A semiconductor device includes a semiconductor body having a first surface defining a vertical direction and a source metallization arranged on the first surface. In a vertical cross-section the semiconductor body further includes: a drift region of a first conductivity type; at least two compensation regions of a second conductivity type each of which forms a pn-junction with the drift region and is in low resistive electric connection with the source metallization; a drain region of the first conductivity type having a maximum doping concentration higher than a maximum doping concentration of the drift region, and a third semiconductor layer of the first conductivity type arranged between the drift region and the drain region and includes at least one of a floating field plate and a floating semiconductor region of the second conductivity type forming a pn-junction with the third semiconductor layer.
摘要翻译：半导体器件包括具有限定垂直方向的第一表面和布置在第一表面上的源极金属化的半导体本体。在垂直横截面中，半导体主体还包括：第一导电类型的漂移区; 至少两个第二导电类型的补偿区域，每个补偿区域与漂移区域形成pn结并与源极金属化处于低电阻电连接; 具有高于漂移区的最大掺杂浓度的最大掺杂浓度的第一导电类型的漏极区和布置在漂移区和漏极区之间的第一导电类型的第三半导体层，并且包括以下中的至少一个：浮置场板和第二导电类型的浮置半导体区域形成与第三半导体层的pn结。

10. 发明申请

US20140001552A1 Super Junction Semiconductor Device Comprising a Cell Area and an Edge Area 有权
标题翻译：包括单元区域和边缘区域的超级结半导体器件
公开(公告)号：US20140001552A1
公开(公告)日：2014-01-02
申请号：US13539973
申请日：2012-07-02
申请人： Franz Hirler , Hans Weber , Hans-Joachim Schulze , Uwe Wahl
发明人： Franz Hirler , Hans Weber , Hans-Joachim Schulze , Uwe Wahl
IPC分类号： H01L29/772 , H01L21/20 , H01L29/02
CPC分类号： H01L29/66712 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/0696 , H01L29/1095 , H01L29/161 , H01L29/167 , H01L29/408 , H01L29/7395 , H01L29/7811 , H01L29/8611
摘要： A drift layer of a super junction semiconductor device includes first portions of a first conductivity type and second portions of a second conductivity type opposite to the first conductivity type. The first and second portions are formed both in a cell area and in an edge area surrounding the cell area, wherein an on-state or forward current through the drift layer flows through the first portions in the cell area. At least one of the first and second portions other than the first portions in the cell area includes an auxiliary structure or contains auxiliary impurities to locally reduce the avalanche rate. Locally reducing the avalanche rate increases the total voltage blocking capability of the super junction semiconductor device.
摘要翻译：超结半导体器件的漂移层包括第一导电类型的第一部分和与第一导电类型相反的第二导电类型的第二部分。第一和第二部分在单元区域和围绕单元区域的边缘区域中形成，其中通过漂移层的导通状态或正向电流流过单元区域中的第一部分。电池区域中除了第一部分之外的第一和第二部分中的至少一个包括辅助结构或包含辅助杂质以局部降低雪崩率。本地降低雪崩率提高了超结半导体器件的总电压阻断能力。

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