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    • 1. 发明授权
    • Orientation-optimized PFETS in CMOS devices employing dual stress liners
    • 采用双重应力衬垫的CMOS器件中的取向优化PFETS
    • US07525162B2
    • 2009-04-28
    • US11850933
    • 2007-09-06
    • Haizhou YinKatherine L. SaengerChun-Yung SungKai Xiu
    • Haizhou YinKatherine L. SaengerChun-Yung SungKai Xiu
    • H01L21/00
    • H01L21/823807H01L29/045H01L29/7843
    • A PFET is provided on a silicon layer having a (110) surface orientation and located in a substrate. A compressive stress liner disposed on the gate and source/drain regions of the PFET generates a primary longitudinal compressive strain along the direction of the PFET channel. A tensile stress liner disposed on at least one NFET located transversely adjacent to the PFET generates a primary longitudinal tensile strain along the direction of the NFET channel. A secondary stress field from the at least one NFET tensile liner generates a beneficial transverse tensile stress in the PFET channel. The net benefits of the primary compressive longitudinal strain and the secondary tensile transverse stress are maximized when the azimuthal angle between the direction of the PFET channel and an in-plane [1 1 0] crystallographic direction in the (110) silicon layer is from about 25° to about 55.
    • 在具有(110)表面取向且位于衬底中的硅层上提供PFET。 设置在PFET的栅极和源极/漏极区域上的压应力衬垫沿着PFET沟道的方向产生初级纵向压缩应变。 设置在横向邻近PFET的至少一个NFET上的拉伸应力衬垫沿着NFET通道的方向产生初级纵向拉伸应变。 来自至少一个NFET拉伸衬套的二次应力场在PFET通道中产生有益的横向拉伸应力。 当PFET通道的方向与平面内[1 10]晶体方向的方位角之间时,主压缩纵向应变和次级拉伸横向应力的净效益最大化 (110)硅层为约25°至约55°。
    • 2. 发明申请
    • ORIENTATION-OPTIMIZED PFETS IN CMOS DEVICES EMPLOYING DUAL STRESS LINERS
    • 使用双应力衬片的CMOS器件中的方位优化PFET
    • US20090065867A1
    • 2009-03-12
    • US11850933
    • 2007-09-06
    • Haizhou YinKatherine L. SaengerChun-Yung SungKai Xiu
    • Haizhou YinKatherine L. SaengerChun-Yung SungKai Xiu
    • H01L27/12
    • H01L21/823807H01L29/045H01L29/7843
    • A PFET is provided on a silicon layer having a (110) surface orientation and located in a substrate. A compressive stress liner disposed on the gate and source/drain regions of the PFET generates a primary longitudinal compressive strain along the direction of the PFET channel. A tensile stress liner disposed on at least one NFET located transversely adjacent to the PFET generates a primary longitudinal tensile strain along the direction of the NFET channel. A secondary stress field from the at least one NFET tensile liner generates a beneficial transverse tensile stress in the PFET channel. The net benefits of the primary compressive longitudinal strain and the secondary tensile transverse stress are maximized when the azimuthal angle between the direction of the PFET channel and an in-plane [1 10] crystallographic direction in the (110) silicon layer is from about 25° to about 55.
    • 在具有(110)表面取向且位于衬底中的硅层上提供PFET。 设置在PFET的栅极和源极/漏极区域上的压应力衬垫沿着PFET沟道的方向产生初级纵向压缩应变。 设置在横向邻近PFET的至少一个NFET上的拉伸应力衬垫沿着NFET通道的方向产生初级纵向拉伸应变。 来自至少一个NFET拉伸衬套的二次应力场在PFET通道中产生有益的横向拉伸应力。 当PFET通道的方向和平面内[1 10]晶体方向的方位角在(())时,主压缩纵向应变和次拉伸横向应力的最大优点是最大化, 110)硅层为约25°至约55°。
    • 3. 发明授权
    • Amorphization/templated recrystallization method for hybrid orientation substrates
    • 混合取向基板的非晶化/模板重结晶方法
    • US07960263B2
    • 2011-06-14
    • US12767261
    • 2010-04-26
    • Keith Edward FogelKatherine L. SaengerChun-Yung SungHaizhou Yin
    • Keith Edward FogelKatherine L. SaengerChun-Yung SungHaizhou Yin
    • H01L21/20
    • H01L21/02675H01L21/02532H01L21/2022H01L21/76224H01L21/823807
    • The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. The process flow of the present invention solves two major difficulties not disclosed by prior art ATR methods: the creation of “corner defects” at the edges of amorphized Si regions bounded by trenches, and undesired orientation changes during a high temperature post-recrystallization defect-removal annealing of non-ATR'd regions not bounded by trenches. In particular, this invention provides a process flow comprising the steps of (i) amorphization and low-temperature recrystallization performed in substrate regions free of trenches, (ii) formation of trench isolation regions that subsume the defective regions at the edge of the ATR'd regions, and (iii) a high-temperature defect-removal anneal performed with the trench isolation regions in place.
    • 本发明提供了用于制造低缺陷密度混合取向基材的改进的非晶化/模板重结晶(ATR)方法。 用于混合取向衬底制造的ATR方法通常从具有第一取向键合到具有第二取向的第二Si层或衬底的Si层开始。 第一Si层的选定区域是非晶化的,然后通过使用第二Si层作为模板将其再结晶成第二Si层的取向。 本发明的工艺流程解决了现有技术ATR方法未公开的两个主要困难:在由沟槽限定的非晶化Si区域的边缘产生“角部缺陷”,以及在高温后再结晶缺陷 - 未被沟槽限定的非ATR区域的去除退火。 特别地,本发明提供了一种工艺流程,其包括以下步骤:(i)在没有沟槽的衬底区域中进行非晶化和低温重结晶,(ii)形成在ATR'边缘处的缺陷区域的沟槽隔离区域的形成, d区域,以及(iii)在沟槽隔离区域中进行的高温缺陷去除退火。
    • 4. 发明授权
    • Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same
    • 具有减少边界缺陷的混合取向半导体结构及其形成方法
    • US08236636B2
    • 2012-08-07
    • US12972771
    • 2010-12-20
    • Haizhou YinJohn A. OttKatherine L. SaengerChun-Yung Sung
    • Haizhou YinJohn A. OttKatherine L. SaengerChun-Yung Sung
    • H01L21/336
    • H01L21/02694H01L21/02532H01L21/76264Y10S438/973
    • The present invention provides an improved amorphization/templated recrystallization (ATR) method for forming hybrid orientation substrates and semiconductor device structures. A direct-silicon-bonded (DSB) silicon layer having a (011) surface crystal orientation is bonded to a base silicon substrate having a (001) surface crystal orientation to form a DSB wafer in which the in-plane direction of the (011) DSB layer is aligned with an in-plane direction of the (001) base substrate. Selected regions of the DSB layer are amorphized down to the base substrate to form amorphized regions aligned with the mutually orthogonal in-plane directions of the (001) base substrate, followed by recrystallization using the base substrate as a template. This optimal arrangement of DSB layer, base substrate, and amorphized region orientation provides a near-vertical, essentially defect-free boundary between original-orientation and changed-orientation silicon regions, thus enabling complete boundary region removal with smaller footprint shallow trench isolation than possible with ATR methods not so optimized.
    • 本发明提供用于形成混合取向基板和半导体器件结构的改进的非晶化/模板重结晶(ATR)方法。 具有(011)表面晶体取向的直接硅键合(DSB)硅层被结合到具有(001)表面晶体取向的基底硅基板上,以形成其中面内<110>方向的DSB晶片 (011)DSB层与(001)基底的面内<110>方向对准。 DSB层的选定区域被非晶化到底部基板以形成与(001)基底基板的相互正交的平面内100°方向对准的非晶形区域,然后使用基底基板作为模板进行重结晶。 DSB层,基底和非晶区域取向的这种最佳布置提供了原始取向和改变取向硅区域之间近似垂直的,基本上无缺陷的边界,因此可以实现完整的边界区域移除,并且可以实现更小的占地面积的浅沟槽隔离 ATR方法没有如此优化。
    • 5. 发明申请
    • AMORPHIZATION/TEMPLATED RECRYSTALLIZATION METHOD FOR HYBRID ORIENTATION SUBSTRATES
    • 用于混合定向衬底的拟合/调制再结晶方法
    • US20100203708A1
    • 2010-08-12
    • US12767261
    • 2010-04-26
    • Keith Edward FogelKatherine L. SaengerChun-Yung SungHaizhou Yin
    • Keith Edward FogelKatherine L. SaengerChun-Yung SungHaizhou Yin
    • H01L21/26H01L21/322
    • H01L21/02675H01L21/02532H01L21/2022H01L21/76224H01L21/823807
    • The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. The process flow of the present invention solves two major difficulties not disclosed by prior art ATR methods: the creation of “corner defects” at the edges of amorphized Si regions bounded by trenches, and undesired orientation changes during a high temperature post-recrystallization defect-removal annealing of non-ATR'd regions not bounded by trenches. In particular, this invention provides a process flow comprising the steps of (i) amorphization and low-temperature recrystallization performed in substrate regions free of trenches, (ii) formation of trench isolation regions that subsume the defective regions at the edge of the ATR'd regions, and (iii) a high-temperature defect-removal anneal performed with the trench isolation regions in place.
    • 本发明提供了用于制造低缺陷密度混合取向基材的改进的非晶化/模板重结晶(ATR)方法。 用于混合取向衬底制造的ATR方法通常从具有第一取向键合到具有第二取向的第二Si层或衬底的Si层开始。 第一Si层的选定区域是非晶化的,然后通过使用第二Si层作为模板将其再结晶成第二Si层的取向。 本发明的工艺流程解决了现有技术ATR方法未公开的两个主要困难:在由沟槽界定的非晶化Si区域的边缘产生“角缺陷”,以及在高温后再结晶缺陷 - 未被沟槽限定的非ATR区域的去除退火。 特别地,本发明提供了一种工艺流程,其包括以下步骤:(i)在没有沟槽的衬底区域中进行非晶化和低温重结晶,(ii)形成在ATR'边缘处的缺陷区域的沟槽隔离区域的形成, d区域,以及(iii)在沟槽隔离区域中进行的高温缺陷去除退火。
    • 6. 发明授权
    • Amorphization/templated recrystallization method for hybrid orientation substrates
    • 混合取向基板的非晶化/模板重结晶方法
    • US07704852B2
    • 2010-04-27
    • US11871694
    • 2007-10-12
    • Keith E. FogelKatherine L. SaengerChun-Yung SungHaizhou Yin
    • Keith E. FogelKatherine L. SaengerChun-Yung SungHaizhou Yin
    • H01L21/76
    • H01L21/02675H01L21/02532H01L21/2022H01L21/76224H01L21/823807
    • The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. The process flow of the present invention solves two major difficulties not disclosed by prior art ATR methods: the creation of “corner defects” at the edges of amorphized Si regions bounded by trenches, and undesired orientation changes during a high temperature post-recrystallization defect-removal annealing of non-ATR'd regions not bounded by trenches. In particular, this invention provides a process flow comprising the steps of (i) amorphization and low-temperature recrystallization performed in substrate regions free of trenches, (ii) formation of trench isolation regions that subsume the defective regions at the edge of the ATR'd regions, and (iii) a high-temperature defect-removal anneal performed with the trench isolation regions in place.
    • 本发明提供了用于制造低缺陷密度混合取向基材的改进的非晶化/模板重结晶(ATR)方法。 用于混合取向衬底制造的ATR方法通常从具有第一取向键合到具有第二取向的第二Si层或衬底的Si层开始。 第一Si层的选定区域是非晶化的,然后通过使用第二Si层作为模板将其再结晶成第二Si层的取向。 本发明的工艺流程解决了现有技术ATR方法未公开的两个主要困难:在由沟槽界定的非晶化Si区域的边缘产生“角缺陷”,以及在高温后再结晶缺陷 - 未被沟槽限定的非ATR区域的去除退火。 特别地,本发明提供了一种工艺流程,其包括以下步骤:(i)在没有沟槽的衬底区域中进行非晶化和低温重结晶,(ii)形成在ATR'边缘处的缺陷区域的沟槽隔离区域的形成, d区域,以及(iii)在沟槽隔离区域中进行的高温缺陷去除退火。
    • 8. 发明授权
    • Hybrid orientation semiconductor structure with reduced boundary defects and method of forming same
    • 具有减少边界缺陷的混合取向半导体结构及其形成方法
    • US07863712B2
    • 2011-01-04
    • US11928395
    • 2007-10-30
    • Haizhou YinJohn A. OttKatherine L. SaengerChun-Yung Sung
    • Haizhou YinJohn A. OttKatherine L. SaengerChun-Yung Sung
    • H01L29/04
    • H01L21/02694H01L21/02532H01L21/76264Y10S438/973
    • The present invention provides an improved amorphization/templated recrystallization (ATR) method for forming hybrid orientation substrates and semiconductor device structures. A direct-silicon-bonded (DSB) silicon layer having a (011) surface crystal orientation is bonded to a base silicon substrate having a (001) surface crystal orientation to form a DSB wafer in which the in-plane direction of the (011) DSB layer is aligned with an in-plane direction of the (001) base substrate. Selected regions of the DSB layer are amorphized down to the base substrate to form amorphized regions aligned with the mutually orthogonal in-plane directions of the (001) base substrate, followed by recrystallization using the base substrate as a template. This optimal arrangement of DSB layer, base substrate, and amorphized region orientation provides a near-vertical, essentially defect-free boundary between original-orientation and changed-orientation silicon regions, thus enabling complete boundary region removal with smaller footprint shallow trench isolation than possible with ATR methods not so optimized.
    • 本发明提供用于形成混合取向基板和半导体器件结构的改进的非晶化/模板重结晶(ATR)方法。 具有(011)表面晶体取向的直接硅键合(DSB)硅层被结合到具有(001)表面晶体取向的基底硅基板上,以形成其中面内<110>方向的DSB晶片 (011)DSB层与(001)基底的面内<110>方向对准。 DSB层的选定区域被非晶化到底部基板以形成与(001)基底基板的相互正交的平面内100°方向对准的非晶形区域,然后使用基底基板作为模板进行重结晶。 DSB层,基底和非晶区域取向的这种最佳布置提供了原始取向和改变取向硅区域之间近似垂直的,基本上无缺陷的边界,因此可以实现完整的边界区域移除,并且可以实现更小的占地面积的浅沟槽隔离 ATR方法没有如此优化。
    • 10. 发明申请
    • HYBRID ORIENTATION SEMICONDUCTOR STRUCTURE WITH REDUCED BOUNDARY DEFECTS AND METHOD OF FORMING SAME
    • 具有减少边界缺陷的混合方向半导体结构及其形成方法
    • US20090108301A1
    • 2009-04-30
    • US11928395
    • 2007-10-30
    • Haizhou YinJohn A. OttKatherine L. SaengerChun-Yung Sung
    • Haizhou YinJohn A. OttKatherine L. SaengerChun-Yung Sung
    • H01L29/04H01L21/265
    • H01L21/02694H01L21/02532H01L21/76264Y10S438/973
    • The present invention provides an improved amorphization/templated recrystallization (ATR) method for forming hybrid orientation substrates and semiconductor device structures. A direct-silicon-bonded (DSB) silicon layer having a (011) surface crystal orientation is bonded to a base silicon substrate having a (001) surface crystal orientation to form a DSB wafer in which the in-plane direction of the (011) DSB layer is aligned with an in-plane direction of the (001) base substrate. Selected regions of the DSB layer are amorphized down to the base substrate to form amorphized regions aligned with the mutually orthogonal in-plane directions of the (001) base substrate, followed by recrystallization using the base substrate as a template. This optimal arrangement of DSB layer, base substrate, and amorphized region orientation provides a near-vertical, essentially defect-free boundary between original-orientation and changed-orientation silicon regions, thus enabling complete boundary region removal with smaller footprint shallow trench isolation than possible with ATR methods not so optimized.
    • 本发明提供用于形成混合取向基板和半导体器件结构的改进的非晶化/模板重结晶(ATR)方法。 具有(011)表面晶体取向的直接硅键合(DSB)硅层被结合到具有(001)表面晶体取向的基底硅基板上,以形成其中面内<110>方向的DSB晶片 (011)DSB层与(001)基底的面内<110>方向对准。 DSB层的选定区域被非晶化到底部基板以形成与(001)基底基板的相互正交的平面内100°方向对准的非晶形区域,然后使用基底基板作为模板进行重结晶。 DSB层,基底和非晶区域取向的这种最佳布置提供了原始取向和改变取向硅区域之间近似垂直的,基本上无缺陷的边界,因此可以实现完整的边界区域移除,并且可以实现更小的占地面积的浅沟槽隔离 ATR方法没有如此优化。