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1. 发明授权

US5629891A Writable analog reference voltage storage device 失效
标题翻译：可写模拟参考电压存储器件
公开(公告)号：US5629891A
公开(公告)日：1997-05-13
申请号：US622763
申请日：1996-03-25
申请人： John LeMoncheck , Timothy P. Allen , Gunter Steinbach , Carver A. Mead
发明人： John LeMoncheck , Timothy P. Allen , Gunter Steinbach , Carver A. Mead
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/56 , G11C27/00 , B11C16/04
CPC分类号： G05F3/247 , G05F1/468 , G05F3/24 , G11C11/56 , G11C11/5621 , G11C27/005 , G11C5/147 , G11C16/30 , G11C2211/5634 , G11C7/16
摘要： A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Circuitry is provided so that all floating gate storage devices can be programmed to their target voltages individually or in parallel. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A transistor structure with a lightly doped drain is provided for control of the tunneling structure. A capacitor is connected to each floating gate node to provide control of the injection structure. A dynamic analog storage element is provided to store the target voltage for the floating gate storage device. A comparator is provided to monitor the floating gate voltage and target voltage and control tunneling and injection. A digital storage device is provided to statically store the output of the comparator. During normal operation of the voltage reference circuit, the voltage comparator is configured as a follower amplifier to buffer the analog voltage output. During normal operation of the bias reference circuit, the current comparator is configured as a current mirror to buffer the analog current output.
摘要翻译：用于产生用于参考或偏置使用的N个模拟电压信号的电路使用N个模拟浮动栅极存储装置。提供电路，使得所有浮动栅极存储装置可以单独地或并行地编程到它们的目标电压。提供电子注入电路用于将电子注入到上面，并且提供隧道结构用于从每个浮动栅极存储装置的浮动栅极去除电子。提供了具有轻掺杂漏极的晶体管结构，用于控制隧道结构。电容器连接到每个浮动栅极节点以提供对注入结构的控制。提供动态模拟存储元件以存储浮动栅极存储装置的目标电压。提供比较器来监控浮栅电压和目标电压，并控制隧道和注入。提供数字存储设备以静态存储比较器的输出。在电压基准电路正常工作期间，电压比较器被配置为跟随放大器以缓冲模拟电压输出。在偏置参考电路的正常工作期间，电流比较器被配置为电流镜来缓冲模拟电流输出。

2. 发明授权

US5408194A Adaptive analog minimum/maximum selector and subtractor circuit 失效
标题翻译：自适应模拟最小/最大选择器和减法器电路
公开(公告)号：US5408194A
公开(公告)日：1995-04-18
申请号：US83905
申请日：1993-06-25
申请人： Gunter Steinbach , Timothy P. Allen , Carver A. Mead
发明人： Gunter Steinbach , Timothy P. Allen , Carver A. Mead
IPC分类号： G01R19/30 , G06G7/14 , H03K5/24
CPC分类号： H03K5/24 , G01R19/30 , G06G7/14
摘要： A circuit for use as a channel of a minimum selector and subtractor circuit includes a P-Channel MOS transistor having a gate connected to an input node, a source connected to the output of a current source, and a drain connected to a fixed voltage source. The source of the P-Channel transistor is connectable to a common conductive line through a first switch. The source of the P-Channel transistor is also connected to the non-inverting input of a transconductance amplifier. The inverting input of the transconductance amplifier is connected to a first plate of a capacitor. The second plate of the capacitor is connected to a fixed voltage source such as ground. The output of the transconductance amplifier is connectable to its inverting input through a second switch. The output of the transconductance amplifier forms the output of the minimum selector and subtractor circuit. A plurality of individual channel circuits may all be connected to the common conductive line. The input nodes of the individual channel circuits are each individually connected to a different one of a plurality of analog input lines. The minimum selector and subtractor circuit determines the minimum analog value appearing on the plurality of lines and subtracts that value from the input values on all of the input lines. A maximum selector and subtractor circuit is formed by reversing transistor types.
摘要翻译：用作最小选择器和减法器电路的通道的电路包括具有连接到输入节点的栅极的P沟道MOS晶体管，连接到电流源的输出的源极和连接到固定电压源的漏极。 P沟道晶体管的源极可通过第一开关连接到公共导线。 P沟道晶体管的源极也连接到跨导放大器的非反相输入端。跨导放大器的反相输入连接到电容器的第一板。电容器的第二板连接到诸如地之间的固定电压源。跨导放大器的输出可通过第二个开关连接到其反相输入端。跨导放大器的输出形成最小选择器和减法器电路的输出。多个单独的通道电路都可以连接到公共导线。各个通道电路的输入节点各自分别连接到多个模拟输入线中的不同的一个。最小选择器和减法器电路确定出现在多行上的最小模拟值，并从所有输入行的输入值中减去该值。通过反转晶体管类型形成最大选择器和减法器电路。

3. 发明授权

US5541878A Writable analog reference voltage storage device 失效
标题翻译：可写模拟参考电压存储器件
公开(公告)号：US5541878A
公开(公告)日：1996-07-30
申请号：US267595
申请日：1994-06-27
申请人： John LeMoncheck , Timothy P. Allen , Gunter Steinbach , Carver A. Mead
发明人： John LeMoncheck , Timothy P. Allen , Gunter Steinbach , Carver A. Mead
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/56 , G11C27/00 , G11C16/04
CPC分类号： G05F3/247 , G05F1/468 , G05F3/24 , G11C11/56 , G11C11/5621 , G11C27/005 , G11C5/147 , G11C16/30 , G11C2211/5634 , G11C7/16
摘要： A circuit for generating N analog voltage signals for reference or bias use employs N analog floating gate storage devices. Circuitry is provided so that all floating gate storage devices can be programmed to their target voltages individually or in parallel. Electron injection circuitry is provided for injecting electrons on to and a tunneling structure is provided for removing electrons from the floating gate of each floating gate storage device. A transistor structure with a lightly doped drain is provided for control of the tunneling structure. A capacitor is connected to each floating gate node to provide control of the injection structure. A dynamic analog storage element is provided to store the target voltage for the floating gate storage device. A comparator is provided to monitor the floating gate voltage and target voltage and control tunneling and injection. A digital storage device is provided to statically store the output of the comparator. During normal operation of the voltage reference circuit, the voltage comparator is configured as a follower amplifier to buffer the analog voltage output. During normal operation of the bias reference circuit, the current comparator is configured as a current mirror to buffer the analog current output.
摘要翻译：用于产生用于参考或偏置使用的N个模拟电压信号的电路使用N个模拟浮动栅极存储装置。提供电路，使得所有浮动栅极存储装置可以单独地或并行地编程到它们的目标电压。提供电子注入电路用于将电子注入到上面，并且提供隧道结构用于从每个浮动栅极存储装置的浮动栅极去除电子。提供了具有轻掺杂漏极的晶体管结构，用于控制隧道结构。电容器连接到每个浮动栅极节点以提供对注入结构的控制。提供动态模拟存储元件以存储浮动栅极存储装置的目标电压。提供一个比较器来监控浮动栅极电压和目标电压，并控制隧道和注入。提供数字存储设备以静态存储比较器的输出。在电压基准电路正常工作期间，电压比较器被配置为跟随放大器以缓冲模拟电压输出。在偏置参考电路的正常工作期间，电流比较器被配置为电流镜以缓冲模拟电流输出。

4. 发明授权

US5374787A Object position detector 失效
标题翻译：对象位置检测器
公开(公告)号：US5374787A
公开(公告)日：1994-12-20
申请号：US115743
申请日：1993-08-31
申请人： Robert J. Miller , Stephen Bisset , Timothy P. Allen , Gunter Steinbach
发明人： Robert J. Miller , Stephen Bisset , Timothy P. Allen , Gunter Steinbach
IPC分类号： G06F1/16 , G06F3/033 , G06F3/041 , G06F3/044 , G06F3/048 , G08C21/00 , H03M11/00
CPC分类号： G06F3/041 , G06F1/1626 , G06F3/03547 , G06F3/044 , G06F2203/04101
摘要： A proximity sensor system includes a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by analog circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e., its position in the X and Y dimensions. The profile of position may also be integrated to provide Z-axis (pressure) information.
摘要翻译：接近传感器系统包括具有连接到传感器焊盘的水平和垂直导体上的特征电容的传感器矩阵阵列。电容根据物体或传感器矩阵的接近度而变化。由于物体的接近，矩阵的X和Y方向上的每个节点的电容的变化被转换成在X和Y方向上的一组电压。这些电压由模拟电路处理以产生表示物体轮廓的质心的电信号，即其在X和Y尺寸中的位置。位置的轮廓也可以被集成以提供Z轴（压力）信息。

5. 发明授权

US5914465A Object position detector 失效
标题翻译：对象位置检测器
公开(公告)号：US5914465A
公开(公告)日：1999-06-22
申请号：US300387
申请日：1994-09-02
申请人： Timothy P. Allen , David Gillespie , Robert J. Miller , Gunter Steinbach
发明人： Timothy P. Allen , David Gillespie , Robert J. Miller , Gunter Steinbach
IPC分类号： G06F3/044 , G06F1/16 , G06F3/033 , G06F3/041 , G06F3/048 , G08C21/00 , H03M11/00
CPC分类号： G06F3/044 , G06F1/1626 , G06F3/03547 , G06F3/041
摘要： A proximity sensor system includes a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by digital circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. Noise reduction and background level setting techniques inherently available in the architecture are employed.
摘要翻译：接近传感器系统包括具有连接到传感器焊盘的水平和垂直导体上的特征电容的传感器矩阵阵列。电容根据物体或传感器矩阵的接近度而变化。由于物体的接近，矩阵的X和Y方向上的每个节点的电容的变化被转换成在X和Y方向上的一组电压。这些电压由数字电路处理，以形成表示物体轮廓的质心的电信号，即其在X和Y尺寸中的位置。采用本构架中固有可用的降噪和背景设置技术。

6. 发明授权

US5543588A Touch pad driven handheld computing device 失效
标题翻译：触摸板驱动的手持式计算设备
公开(公告)号：US5543588A
公开(公告)日：1996-08-06
申请号：US161671
申请日：1993-12-03
申请人： Stephen Bisset , Robert J. Miller , Timothy P. Allen , Gunter Steinbach
发明人： Stephen Bisset , Robert J. Miller , Timothy P. Allen , Gunter Steinbach
IPC分类号： G06F3/044 , G06F1/16 , G06F3/033 , G06F3/041 , G06F3/048 , G08C21/00 , G09G5/00
CPC分类号： G06F3/044 , G06F1/1626 , G06F1/169 , G06F3/03547 , G06F3/041 , G06F3/04883
摘要： A handheld computing device comprises a thin enclosure having two opposing major faces. A display screen is disposed on a first one of the major opposing faces of the enclosure and a touch-sensitive object position detector input device is disposed on a second one of the major opposing faces of the enclosure. Computing device circuitry, circuitry for interfacing the touch-sensitive object position detector to the computing device circuitry, and circuitry for driving the display screen are all disposed within the enclosure.
摘要翻译：手持计算设备包括具有两个相对的主面的薄外壳。显示屏布置在外壳的主要相对面的第一个上，并且触敏物体位置检测器输入装置设置在外壳的主要相对面的第二个上。计算设备电路，用于将触敏物体位置检测器连接到计算设备电路的电路以及用于驱动显示屏的电路都被设置在外壳内。

7. 发明授权

US5495077A Object position and proximity detector 失效
标题翻译：物体位置和接近检测器
公开(公告)号：US5495077A
公开(公告)日：1996-02-27
申请号：US252969
申请日：1994-06-02
申请人： Robert J. Miller , Stephen Bisset , Timothy P. Allen , Gunter Steinbach
发明人： Robert J. Miller , Stephen Bisset , Timothy P. Allen , Gunter Steinbach
IPC分类号： G06F1/16 , G06F3/033 , G06F3/041 , G06F3/044 , G06F3/048 , G08C21/00 , H03M11/00
CPC分类号： G06F3/041 , G06F1/1626 , G06F3/03547 , G06F3/044 , G06F2203/04101
摘要： A proximity sensor system includes a sensor matrix array having a characteristic capacitance on horizontal and vertical conductors connected to sensor pads. The capacitance changes as a function of the proximity of an object or objects to the sensor matrix. The change in capacitance of each node in both the X and Y directions of the matrix due to the approach of an object is converted to a set of voltages in the X and Y directions. These voltages are processed by analog circuitry to develop electrical signals representative of the centroid of the profile of the object, i.e, its position in the X and Y dimensions. The profile of position may also be integrated to provide Z-axis (pressure) information.
摘要翻译：接近传感器系统包括具有连接到传感器焊盘的水平和垂直导体上的特征电容的传感器矩阵阵列。电容根据物体或传感器矩阵的接近度而变化。由于物体的接近，矩阵的X和Y方向上的每个节点的电容的变化被转换成在X和Y方向上的一组电压。这些电压由模拟电路处理，以开发代表物体轮廓的质心的电信号，即其在X和Y尺寸中的位置。位置的轮廓也可以被集成以提供Z轴（压力）信息。

8. 发明申请

US20090003501A1 Offset Error Mitigation in a Phase-Locked Loop Circuit with a Digital Loop Filter 审中-公开
标题翻译：具有数字环路滤波器的锁相环电路中的偏移误差减轻
公开(公告)号：US20090003501A1
公开(公告)日：2009-01-01
申请号：US11771540
申请日：2007-06-29
申请人： Gunter Steinbach , John Patrick Keane
发明人： Gunter Steinbach , John Patrick Keane
IPC分类号： H03D3/24
CPC分类号： H03L7/085 , H03L7/0991
摘要： A phase-locked loop circuit comprises an analog section, a digital section and a digital offset mitigation circuit. The analog section is subject to offset error and comprises an analog phase comparator and an analog-to-digital converter. The digital section comprises a digital loop filter and a digitally-controlled frequency-generating circuit. The digital loop filter is connected to receive a digital difference signal from the analog-to-digital converter. The digital offset mitigation circuit is operable in response to the digital difference signal to mitigate the offset error of the analog section.
摘要翻译：锁相环电路包括模拟部分，数字部分和数字偏移缓冲电路。模拟部分经受偏移误差，包括模拟相位比较器和模数转换器。数字部分包括数字环路滤波器和数字控制的频率发生电路。数字环路滤波器被连接以接收来自模数转换器的数字差分信号。数字偏移减轻电路响应于数字差分信号而可操作以减轻模拟部分的偏移误差。

9. 发明申请

US20060208805A1 Linear phase-locked loop with dual tuning elements 有权
标题翻译：具有双调谐元件的线性锁相环
公开(公告)号：US20060208805A1
公开(公告)日：2006-09-21
申请号：US11084376
申请日：2005-03-18
申请人： Brian Galloway , Gunter Steinbach , Charles Moore
发明人： Brian Galloway , Gunter Steinbach , Charles Moore
IPC分类号： H03L7/00
CPC分类号： H03L7/085 , H03L7/093 , H03L7/099 , H03L2207/06
摘要： A linear PLL includes a VCO with first and second tuning elements. The first tuning element is adjusted in proportion to the phase error between an input signal and a VCO signal and the second tuning element is adjusted by an integral function of the phase error. By configuring the VCO with separate tuning elements that are separately adjusted in proportion to the phase error and by an integral function of the phase error, the 3 dB bandwidth frequency of the linear PLL depends primarily on the phase detector gain and the VCO gain that is contributed from the proportional adjustment. A linear PLL with separate proportional and integral tuning elements can be designed to exhibit a relatively constant gain over a relatively large frequency range.
摘要翻译：线性PLL包括具有第一和第二调谐元件的VCO。第一调谐元件与输入信号和VCO信号之间的相位误差成比例地调整，并且通过相位误差的积分函数来调整第二调谐元件。通过使用单独的调谐元件配置VCO，该调谐元件与相位误差成比例地分别调整，并通过相位误差的积分函数，线性PLL的3 dB带宽频率主要取决于相位检测器增益和VCO增益由比例调整贡献。具有分开的比例和积分调谐元件的线性PLL可以设计成在相对大的频率范围内呈现相对恒定的增益。

10. 发明申请

US20060158262A1 Offset correction in a feedback system for a voltage controlled oscillator 失效
标题翻译：用于压控振荡器的反馈系统中的偏移校正
公开(公告)号：US20060158262A1
公开(公告)日：2006-07-20
申请号：US11039114
申请日：2005-01-20
申请人： Michael Robinson , Gunter Steinbach , Brian Galloway
发明人： Michael Robinson , Gunter Steinbach , Brian Galloway
IPC分类号： H03L7/00
CPC分类号： H03L7/087 , H03L7/0891 , H03L7/0895 , H03L7/0898 , H03L7/091 , H03L7/107 , H04L7/033
摘要： An offset related to a feedback system for a VCO is quantified and then a parameter of the feedback system is adjusted in response to the quantified offset to correct for the offset. Correcting for offset in a feedback system can improve the performance of a PLL by reducing phase drift between the input signal and the VCO signal. The reduced phase drift can have benefits such as, for example, reduced bit errors and/or improved phase tracking accuracy.
摘要翻译：与VCO的反馈系统相关的偏移被量化，然后响应于量化偏移来调整反馈系统的参数以校正偏移。纠正反馈系统中的偏移可以通过减少输入信号和VCO信号之间的相位漂移来提高PLL的性能。减小的相位漂移可以具有诸如例如减小的位错误和/或改进的相位跟踪精度的益处。

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