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1. 发明授权

US07868424B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07868424B2
公开(公告)日：2011-01-11
申请号：US11658227
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
IPC分类号： H01L21/02
CPC分类号： H01L29/0821 , B82Y10/00 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/08 , H01L29/423 , H01L29/42304 , H01L29/66242 , H01L29/737 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted. According to the invention the collector region (3) borders the surface of the semiconductor body (12), while the emitter region (1) is recessed in the semiconductor body (12), and the collector region (3) forms part of a mesa structure (6) formed at the surface of the semiconductor body (12). Such a device (10) has very favorable properties at high frequencies and high voltages and, moreover, is easy to manufacture. In a preferred embodiment the collector (3) comprises a nanowire (30) forming the mesa structure (6).
摘要翻译：本发明涉及一种具有衬底（11）和半导体本体（12）的半导体器件（10），该半导体器件包括分别具有发射极区，基极区和集电极区（1,2,3）的垂直双极晶体管，第一导电类型，与第一导电类型和第一导电类型相反的第二导电类型，其中集电极区域（3）包括与基极区域（2）接壤的第一子区域（3A）与第二子区域（3A）接合的第一子区域（3A）的区域（3B），其具有比第二子区域（3B）低的掺杂浓度，并且晶体管设置有与第一子区域横向相邻的栅电极（5） 3A），并且借助于此可以使第一子区域（3A）耗尽。根据本发明，集电极区域（3）与半导体本体（12）的表面相接触，而发射极区域（1）凹入半导体本体（12）中，并且集电极区域（3）形成台面的一部分结构（6）形成在半导体本体（12）的表面。这种装置（10）在高频和高电压下具有非常有利的特性，而且易于制造。在优选实施例中，收集器（3）包括形成台面结构（6）的纳米线（30）。

2. 发明申请

US20080315361A1 Semiconductor Device and Method of Manufacturing the Same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080315361A1
公开(公告)日：2008-12-25
申请号：US11658227
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Erwin Hijzen , Raymond Josephus Engelbart Hueting
IPC分类号： H01L27/00 , H01L21/331
CPC分类号： H01L29/0821 , B82Y10/00 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/08 , H01L29/423 , H01L29/42304 , H01L29/66242 , H01L29/737 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted. According to the invention the collector region (3) borders the surface of the semiconductor body (12), while the emitter region (1) is recessed in the semiconductor body (12), and the collector region (3) forms part of a mesa structure (6) formed at the surface of the semiconductor body (12). Such a device (10) has very favorable properties at high frequencies and high voltages and, moreover, is easy to manufacture. In a preferred embodiment the collector (3) comprises a nanowire (30) forming the mesa structure (6).
摘要翻译：本发明涉及一种具有衬底（11）和半导体本体（12）的半导体器件（10），该半导体器件包括分别具有发射极区，基极区和集电极区（1,2,3）的垂直双极晶体管，第一导电类型，与第一导电类型和第一导电类型相反的第二导电类型，其中集电极区域（3）包括与基极区域（2）接壤的第一子区域（3A）与第二子区域（3A）接合的第一子区域（3A）的区域（3B），其具有比第二子区域（3B）低的掺杂浓度，并且晶体管设置有与第一子区域横向相邻的栅电极（5） 3A），并且借助于此可以使第一子区域（3A）耗尽。根据本发明，集电极区域（3）与半导体本体（12）的表面相接触，而发射极区域（1）凹入半导体本体（12）中，并且集电极区域（3）形成台面的一部分结构（6）形成在半导体本体（12）的表面。这种装置（10）在高频和高电压下具有非常有利的特性，而且易于制造。在优选实施例中，收集器（3）包括形成台面结构（6）的纳米线（30）。

3. 发明授权

US07915709B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07915709B2
公开(公告)日：2011-03-29
申请号：US11658228
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
IPC分类号： H01L29/66 , H01L21/8222
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

4. 发明申请

US20090200641A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090200641A1
公开(公告)日：2009-08-13
申请号：US11658228
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
IPC分类号： H01L29/73 , H01L21/331
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

5. 发明申请

US20090008630A1 TUNNELING TRANSISTOR WITH BARRIER 有权
标题翻译：具有障碍物的隧道式晶体管
公开(公告)号：US20090008630A1
公开(公告)日：2009-01-08
申请号：US12161571
申请日：2007-01-24
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/47 , H01L29/66666 , H01L29/78 , H01L29/7827 , Y10S977/762 , Y10S977/938
摘要： The invention suggests a transistor (21) comprising a source (24) and a drain (29) as well as a barrier region (27) located between the source and the drain. The barrier region is separated from the source and the drain by intrinsic or lowly doped regions (26, 28) of a semiconductor material. Potential barriers are formed at the interfaces of the barrier region and the intrinsic or lowly doped regions. A gate electrode (32) is provided in the vicinity of the potential barriers such that the effective height and/or width of the potential barriers can be modulated by applying an appropriate voltage to the gate electrode.
摘要翻译：本发明提出了一种包括源极（24）和漏极（29）的晶体管（21）以及位于源极和漏极之间的阻挡区域（27）。通过半导体材料的本征或低掺杂区域（26,28）将势垒区域与源极和漏极分离。在屏障区域和本征或低掺杂区域的界面处形成势垒。栅电极（32）设置在势垒附近，使得可以通过向栅电极施加适当的电压来调制势垒的有效高度和/或宽度。

6. 发明申请

US20100155685A1 ELECTRONIC COMPONENT, AND A METHOD OF MANUFACTURING AN ELECTRONIC COMPONENT 有权
标题翻译：电子元件，以及制造电子元件的方法
公开(公告)号：US20100155685A1
公开(公告)日：2010-06-24
申请号：US12663746
申请日：2008-06-18
申请人： Godefridus Adrianus Maria Hurkx
发明人： Godefridus Adrianus Maria Hurkx
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L45/1226 , H01L45/143 , H01L45/144
摘要： An electronic component (100), a first electrode (101), a second electrode (102), and a convertible structure (103) electrically coupled between the first electrode (101) and the second electrode (102), being convertible between at least two states by heating and having different electrical properties in different ones of the at least two states, wherein the convertible structure (103) comprises terminal portions (104, 105) connected to the first electrode (101) and to the second electrode (102), respectively, and comprises a line portion (106) between the terminal portions (104, 105), the line portion (106) having a smaller width or thickness than the terminal portions (104, 105), and wherein the convertible structure (103) is arranged with respect to the first electrode (101) and the second electrode (102) so that, in one of the at least two states, the line portion (106) has an amorphous ‘Spot (107) extending along only a part of the line portion (106).
摘要翻译：电耦合在第一电极（101）和第二电极（102）之间的电子部件（100），第一电极（101），第二电极（102）和可转换结构（103）两个状态通过加热而在不同的至少两个状态下具有不同的电特性，其中可转换结构（103）包括连接到第一电极（101）和第二电极（102）的端子部分（104,105），并且包括在端子部分（104,105）之间的线部分（106），线部分（106）具有比端子部分（104,105）更小的宽度或厚度，并且其中可转换结构（103））相对于第一电极（101）和第二电极（102）布置，使得在至少两个状态中的一个状态下，线部分（106）具有仅沿着一部分延伸的无定形“点（107）的线部分（106）。

7. 发明授权

US06597052B2 Punch-through diode having an inverted structure 失效
标题翻译：具有倒置结构的穿通二极管
公开(公告)号：US06597052B2
公开(公告)日：2003-07-22
申请号：US09782663
申请日：2001-02-13
申请人： Godefridus Adrianus Maria Hurkx , Erwin Adolf Hijzen
发明人： Godefridus Adrianus Maria Hurkx , Erwin Adolf Hijzen
IPC分类号： H01L29861
CPC分类号： H01L29/8618
摘要： The invention relates to a so-called punch-through diode comprising a stack of, for example, an n++, p−, p+, n++ region (1, 2, 3, 4). In the known diode, these regions (1, 2, 3, 4) are arranged on a substrate (11) in said order. The diode is provided with connection conductors (5, 6). Such a diode does not have a steep I-V characteristic and hence is less suitable as a TVSD (=Transient Voltage Suppression Device). Particularly at voltages below 5 volts, a punch-through diode could form an attractive alternative for use as a TVSD. A punch-through diode according to the invention has an inverted structure, which means that the regions (1, 2, 3, 4) are positioned in reverse order on the substrate (11) and thus, the first region (1) adjoins the surface, and the fourth region (4) adjoins the substrate (11). Such a diode has a very steep I-V characteristic, is very suitable as a TVSD and functions very well at an operating voltage below 5 volts. Preferably, the diode is provided with a field plate (6) and, also preferably, the first region (1) comprises a mixed crystal of silicon and germanium.
摘要翻译：本发明涉及一种所谓的穿通二极管，其包括例如n ++，p-，p +，n + +区域（1,2,3,4）的堆叠。在已知的二极管中，这些区域（1,2,3,4）按照该顺序排列在基板（11）上。二极管设有连接导体（5,6）。这样的二极管不具有陡峭的I-V特性，因此不太适合作为TVSD（=瞬态电压抑制装置）。特别是在低于5伏的电压下，穿通二极管可以形成用作TVSD的有吸引力的替代方案。根据本发明的穿通二极管具有倒置结构，这意味着区域（1,2,3,4 ）在衬底（11）上以相反的顺序定位，因此第一区域（1）与表面相邻，并且第四区域（4）与衬底（11）相邻。这种二极管具有非常陡峭的I-V特性，非常适合作为TVSD，并且在低于5伏特的工作电压下功能非常好。优选地，二极管设置有场板（6），并且还优选地，第一区域（1）包括硅和锗的混合晶体。

8. 发明授权

US09142763B2 Electronic component, and a method of manufacturing an electronic component 有权
标题翻译：电子部件，以及电子部件的制造方法
公开(公告)号：US09142763B2
公开(公告)日：2015-09-22
申请号：US12663746
申请日：2008-06-18
申请人： Godefridus Adrianus Maria Hurkx
发明人： Godefridus Adrianus Maria Hurkx
IPC分类号： H01L47/00 , H01L45/00
CPC分类号： H01L45/06 , H01L45/1226 , H01L45/143 , H01L45/144
摘要： An electronic component (100), a first electrode (101), a second electrode (102), and a convertible structure (103) electrically coupled between the first electrode (101) and the second electrode (102), being convertible between at least two states by heating and having different electrical properties in different ones of the at least two states, wherein the convertible structure (103) comprises terminal portions (104, 105) connected to the first electrode (101) and to the second electrode (102), respectively, and comprises a line portion (106) between the terminal portions (104, 105), the line portion (106) having a smaller width or thickness than the terminal portions (104, 105), and wherein the convertible structure (103) is arranged with respect to the first electrode (101) and the second electrode (102) so that, in one of the at least two states, the line portion (106) has an amorphous ‘Spot (107) extending along only a part of the line portion (106).
摘要翻译：电耦合在第一电极（101）和第二电极（102）之间的电子部件（100），第一电极（101），第二电极（102）和可转换结构（103）两个状态通过加热而在不同的至少两个状态下具有不同的电特性，其中可转换结构（103）包括连接到第一电极（101）和第二电极（102）的端子部分（104,105），并且包括在端子部分（104,105）之间的线部分（106），线部分（106）具有比端子部分（104,105）更小的宽度或厚度，并且其中可转换结构（103））相对于第一电极（101）和第二电极（102）布置，使得在至少两个状态中的一个状态下，线部分（106）具有仅沿着一部分延伸的无定形“点（107）的线部分（106）。

9. 发明授权

US08114774B2 Semiconductor device, and semiconductor device obtained by such a method 有权
标题翻译：半导体器件和通过这种方法获得的半导体器件
公开(公告)号：US08114774B2
公开(公告)日：2012-02-14
申请号：US12304332
申请日：2007-06-06
申请人： Godefridus Adrianus Maria Hurkx , Johannes Josephus Theodorus Marinus Donkers
发明人： Godefridus Adrianus Maria Hurkx , Johannes Josephus Theodorus Marinus Donkers
IPC分类号： H01L21/302
CPC分类号： H01L29/0665 , B82Y10/00 , B82Y40/00 , H01L21/31053 , H01L29/0673 , H01L29/0676 , H01L29/66439 , H01L29/66666 , H01L29/775
摘要： The invention relates to a method of manufacturing a semiconductor device with a substrate and a semiconductor body, whereby in the semiconductor body a semiconductor element is formed by means of a mesa-shaped protrusion of the semiconductor body, which is formed on the surface of the semiconductor device as a nano wire, whereupon a layer of a material is deposited over the semiconductor body and the resulting structure is subsequently planarized in a chemical-mechanical polishing process such that an upper side of the nano wire becomes exposed. According to the invention, a further layer of a further material is deposited over the semiconductor body with the nano wire before the layer of the material is deposited, which further layer is given a thickness smaller than the height of the nano wire, and a material is chosen for the further material such that, viewed in projection, the transition between the layer and the further layer is discernible before the nano wire is reached. In this way the nano wire can be exposed more accurately in the device. This increases the yield of useful devices.
摘要翻译：本发明涉及一种制造具有衬底和半导体本体的半导体器件的方法，由此在半导体本体中，半导体元件通过形成在半导体本体的表面上的半导体本体的台面状突起形成半导体器件作为纳米线，由此在半导体本体上沉积材料层，并且随后在化学机械抛光工艺中使所得结构平坦化，使得纳米线的上侧暴露。根据本发明，在沉积材料层之前，在纳米线之前，在半导体主体上沉积另外一层另外的材料，该另一层的厚度小于纳米线的高度，并且材料被选择用于进一步的材料，使得从投影中观察到，在达到纳米线之前，层与另外的层之间的转变是可辨别的。以这种方式，可以在器件中更准确地暴露纳米线。这增加了有用装置的产量。

10. 发明申请

US20120250401A1 PHASE CHANGE MEMORY (PCM) ARCHITECTURE AND A METHOD FOR WRITING INTO PCM ARCHITECTURE 有权
标题翻译：相位改变记忆体（PCM）架构和写入PCM体系结构的方法
公开(公告)号：US20120250401A1
公开(公告)日：2012-10-04
申请号：US13075037
申请日：2011-03-29
申请人： Maurits Mario Nicolaas Storms , Erik Maria van Bussel , Godefridus Adrianus Maria Hurkx , Michiel Jos van Duuren
发明人： Maurits Mario Nicolaas Storms , Erik Maria van Bussel , Godefridus Adrianus Maria Hurkx , Michiel Jos van Duuren
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/0026 , G11C13/0028 , G11C13/0069 , G11C2213/79 , G11C2213/82
摘要： A phase change memory (PCM) architecture and a method for writing a PCM architecture are described. In one embodiment, a PCM architecture includes a PCM array, word line driver circuits, bit line driver circuits, a source driver circuit and a voltage supply circuit. The bit line driver circuits are connected to the PCM array and the electrical ground. Other embodiments are also described.
摘要翻译：描述了相变存储器（PCM）架构和用于写入PCM架构的方法。在一个实施例中，PCM架构包括PCM阵列，字线驱动电路，位线驱动电路，源极驱动电路和电压供给电路。位线驱动电路连接到PCM阵列和电接地。还描述了其它实施例。

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