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1. 发明授权

US08421169B2 Gap control for die or layer bonding using intermediate layers 有权
标题翻译：使用中间层进行管芯或层接合的间隙控制
公开(公告)号：US08421169B2
公开(公告)日：2013-04-16
申请号：US12800727
申请日：2010-05-21
申请人： Gjermund Kittilsland , Anders Elfving
发明人： Gjermund Kittilsland , Anders Elfving
IPC分类号： H01L21/00
CPC分类号： G01C19/56 , B81B2201/0235 , B81B2201/0242 , B81C1/00269 , G01P15/0802 , G01P15/125 , G01P2015/0828 , H01L23/10 , H01L2924/0002 , H01L2924/01079 , H01L2924/00
摘要： A structure having a gap provided between a portion of two layers that are joined together is disclosed. The structure includes a first layer having an element formed within a first surface and a second layer having a second surface, adjacent to and in direct contact with at least a portion of the first surface on all sides of the element such that the element is completely enclosed. A recess of predetermined depth is arranged to provide the gap between the element and the second surface, and a groove formed in one of the first surface or second surface, the groove defining a boundary around the element. Sealing material is deformedly retained completely within the groove to form a seal around the element, such that the recess defines the gap.
摘要翻译：公开了一种在两层结合在一起的部分之间具有间隙的结构。该结构包括具有形成在第一表面内的元件的第一层和具有第二表面的第二层，邻近并与元件的所有侧面上的第一表面的至少一部分直接接触，使得元件完全封闭布置预定深度的凹槽以提供元件和第二表面之间的间隙，以及形成在第一表面或第二表面中的一个中的凹槽，凹槽限定元件周围的边界。密封材料完全变形地保持在凹槽内，以形成围绕元件的密封，使得凹部限定间隙。

2. 发明申请

US20100301432A1 Gap control for die or layer bonding using intermediate layers 有权
标题翻译：使用中间层进行管芯或层接合的间隙控制
公开(公告)号：US20100301432A1
公开(公告)日：2010-12-02
申请号：US12800727
申请日：2010-05-21
申请人： Gjermund Kittilsland , Anders Elfving
发明人： Gjermund Kittilsland , Anders Elfving
IPC分类号： H01L29/84 , H01L21/50
CPC分类号： G01C19/56 , B81B2201/0235 , B81B2201/0242 , B81C1/00269 , G01P15/0802 , G01P15/125 , G01P2015/0828 , H01L23/10 , H01L2924/0002 , H01L2924/01079 , H01L2924/00
摘要： A structure having a gap provided between a portion of two layers that are joined together is disclosed. The structure includes a first layer having an element formed within a first surface and a second layer having a second surface, adjacent to and in direct contact with at least a portion of the first surface on all sides of the element such that the element is completely enclosed. A recess of predetermined depth is arranged to provide the gap between the element and the second surface, and a groove formed in one of the first surface or second surface, the groove defining a boundary around the element. Sealing material is deformedly retained completely within the groove to form a seal around the element, such that the recess defines the gap.
摘要翻译：公开了一种在两层结合在一起的部分之间具有间隙的结构。该结构包括具有形成在第一表面内的元件的第一层和具有第二表面的第二层，邻近并与元件的所有侧面上的第一表面的至少一部分直接接触，使得元件完全封闭布置预定深度的凹槽以提供元件和第二表面之间的间隙，以及形成在第一表面或第二表面中的一个中的凹槽，凹槽限定元件周围的边界。密封材料完全变形地保持在凹槽内，以形成围绕元件的密封，使得凹部限定间隙。

3. 发明授权

US09080870B2 MEMS structure for an angular rate sensor 有权
标题翻译：用于角速率传感器的MEMS结构
公开(公告)号：US09080870B2
公开(公告)日：2015-07-14
申请号：US13639376
申请日：2011-04-15
申请人： Gjermund Kittilsland , Daniel Lapadatu , Sissel Jacobsen
发明人： Gjermund Kittilsland , Daniel Lapadatu , Sissel Jacobsen
IPC分类号： G01C19/56 , G01C19/5712
CPC分类号： G01C19/5712
摘要： A micro-electromechanical system (MEMS) structure for an angular rate sensor includes seismic masses arranged to have a first degree of rotational freedom about an axis that is substantially perpendicular to the plane of a silicon substrate, and a second degree of rotational freedom about an axis substantially coincident with the longitudinal axis of driving beams to which the seismic masses are attached. A sensing system is arranged such that, when the structure is subjected to an angular velocity around a third axis that is substantially in the plane of the silicon substrate and perpendicular to the longitudinal axis of the beams, a Coriolis force arises which causes the secondary oscillation of the seismic masses.
摘要翻译：用于角速率传感器的微机电系统（MEMS）结构包括被布置为具有围绕基本上垂直于硅衬底的平面的轴线的第一旋转自由度的地震质量，以及关于硅衬底的第二旋转自由度基本上与地震质量块所附着的驱动梁的纵向轴线重合。感测系统被布置成使得当结构受到围绕基本上在硅衬底的平面中并且垂直于梁的纵向轴线的第三轴线的角速度时，产生导致次级振荡的科里奥利力的地震质量。

4. 发明申请

US20130026592A1 FOCAL PLANE ARRAY AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20130026592A1
公开(公告)日：2013-01-31
申请号：US13582120
申请日：2011-03-01
申请人： Adriana Lapadatu , Gjermund Kittilsland
发明人： Adriana Lapadatu , Gjermund Kittilsland
IPC分类号： H01L31/02
CPC分类号： H01L27/1467 , H01L27/14629 , H01L27/14634 , H01L27/1469
摘要： A method of forming a focal plane array by: forming a first wafer having sensing material provided on a surface, which is covered by a sacrificial layer, the sensing material being a thermistor material defining at least one pixel; providing supporting legs for the pixel within the sacrificial layer, covering them with a further sacrificial layer and forming first conductive portions in the surface of the sacrificial layer that are in contact with the supporting legs; forming a second wafer having read-out integrated circuit (ROIC), the second wafer being covered by another sacrificial layer, into which is formed second conductive portions in contact with the ROIC; bringing the sacrificial oxide layers of the first wafer and second wafer together such that the first and second conductive portions are aligned and bonding them together such that the sensing material is transferred from the first wafer to the second wafer when a sacrificial bulk layer of the first wafer is removed; and removing the sacrificial layers to release the pixel, with the supporting legs underneath it.
摘要翻译：一种通过以下方式形成焦平面阵列的方法：形成具有设置在由牺牲层覆盖的表面上的感测材料的第一晶片，所述感测材料是限定至少一个像素的热敏电阻材料; 为牺牲层中的像素提供支撑腿，用另外的牺牲层覆盖它们并在牺牲层的与支撑腿接触的表面中形成第一导电部分; 形成具有读出集成电路（ROIC）的第二晶片，所述第二晶片被另一牺牲层覆盖，所述第二晶片形成与所述ROIC接触的第二导电部分; 使第一晶片和第二晶片的牺牲氧化物层在一起，使得第一和第二导电部分对准并将它们结合在一起，使得当第一晶片和第二晶片的牺牲体积层第一晶片被去除; 并且移除牺牲层以释放像素，其中支撑腿在其下方。

5. 发明申请

US20150206908A1 FOCAL PLANE ARRAY AND METHOD FOR MANUFACTURING THE SAME 审中-公开
公开(公告)号：US20150206908A1
公开(公告)日：2015-07-23
申请号：US14595003
申请日：2015-01-12
申请人： Adriana Lapadatu , Gjermund Kittilsland
发明人： Adriana Lapadatu , Gjermund Kittilsland
IPC分类号： H01L27/146
CPC分类号： H01L27/1467 , H01L27/14625 , H01L27/14632 , H01L27/14636 , H01L27/14683 , H01L27/14685 , H01L27/14687
摘要： A method of forming a focal plane array by: preparing a first wafer having sensing material provided on a surface, which is covered by a sacrificial layer; preparing a second wafer including read-out integrated circuit and a contact pad, which is covered by another sacrificial layer into which are formed support legs in contact with the contact pad, the support legs being covered with a further sacrificial layer; bonding the sacrificial layers of the first and second wafers together such that the sensing material is transferred from the first wafer to the second wafer when a sacrificial bulk layer of the first wafer is removed; defining a pixel in the sensing material and forming a conductive via through the pixel for providing a connection between an uppermost surface of the pixel and the supporting legs; and removing the sacrificial layers to release the pixel, with the supporting legs underneath it.
摘要翻译：一种通过以下步骤形成焦平面阵列的方法：制备具有设置在由牺牲层覆盖的表面上的感测材料的第一晶片; 制备包括读出集成电路和接触焊盘的第二晶片，其被另一牺牲层覆盖，其中形成有与接触焊盘接触的支撑腿，所述支撑腿被另外的牺牲层覆盖; 将第一和第二晶片的牺牲层结合在一起，使得当去除第一晶片的牺牲体层时，感测材料从第一晶片转移到第二晶片; 在所述感测材料中限定像素并形成通过所述像素的导电通孔，以提供所述像素的最上表面与所述支撑腿之间的连接; 并且移除牺牲层以释放像素，其中支撑腿在其下方。

6. 发明申请

US20130146994A1 METHOD FOR MANUFACTURING A HERMETICALLY SEALED STRUCTURE 有权
标题翻译：制造密封密封结构的方法
公开(公告)号：US20130146994A1
公开(公告)日：2013-06-13
申请号：US13639423
申请日：2011-04-15
申请人： Gjermund Kittilsland , Daniel Lapadatu , Sissel Jacobsen , Trond Westgaard
发明人： Gjermund Kittilsland , Daniel Lapadatu , Sissel Jacobsen , Trond Westgaard
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00269 , B81B7/0032 , B81B2201/0235 , B81B2201/0242 , B81C2201/019 , B81C2201/0191 , B81C2203/0118 , B81C2203/031 , B81C2203/058
摘要： A method for providing hermetic sealing within a silicon-insulator composite wafer for manufacturing a hermetically sealed structure, comprising the steps of: patterning a first silicon wafer to have one or more recesses that extend at least partially through the first silicon wafer; filling said recesses with an insulator material able to be anodically bonded to silicon to form a first composite wafer having a plurality of silicon-insulator interfaces and a first contacting surface consisting of insulator material; and using an anodic bonding technique on the first contacting surface and an opposing second contacting surface to create hermetic sealing between the silicon-insulator interfaces, wherein the second contacting surface consists of silicon.
摘要翻译：一种用于在用于制造密封结构的硅绝缘体复合晶片内提供气密密封的方法，包括以下步骤：将第一硅晶片图案化成具有至少部分延伸穿过第一硅晶片的一个或多个凹槽; 用能够与硅阳极结合的绝缘体材料填充所述凹槽，以形成具有多个硅 - 绝缘体界面的第一复合晶片和由绝缘体材料组成的第一接触表面; 以及在所述第一接触表面和相对的第二接触表面上使用阳极接合技术以在所述硅 - 绝缘体界面之间形成气密密封，其中所述第二接触表面由硅组成。

7. 发明授权

US08999813B2 Focal plane array and method for manufacturing the same 有权
标题翻译：焦平面阵列及其制造方法
公开(公告)号：US08999813B2
公开(公告)日：2015-04-07
申请号：US13582120
申请日：2011-03-01
申请人： Adriana Lapadatu , Gjermund Kittilsland
发明人： Adriana Lapadatu , Gjermund Kittilsland
IPC分类号： H01L21/30 , H01L27/146
CPC分类号： H01L27/1467 , H01L27/14629 , H01L27/14634 , H01L27/1469
摘要： A method of forming a focal plane array by: forming a first wafer having sensing material provided on a surface, which is covered by a sacrificial layer, the sensing material being a thermistor material defining at least one pixel; providing supporting legs for the pixel within the sacrificial layer, covering them with a further sacrificial layer and forming first conductive portions in the surface of the sacrificial layer that are in contact with the supporting legs; forming a second wafer having read-out integrated circuit (ROIC), the second wafer being covered by another sacrificial layer, into which is formed second conductive portions in contact with the ROIC; bringing the sacrificial oxide layers of the first wafer and second wafer together such that the first and second conductive portions are aligned and bonding them together such that the sensing material is transferred from the first wafer to the second wafer when a sacrificial bulk layer of the first wafer is removed; and removing the sacrificial layers to release the pixel, with the supporting legs underneath it.
摘要翻译：一种通过以下方式形成焦平面阵列的方法：形成具有设置在由牺牲层覆盖的表面上的感测材料的第一晶片，所述感测材料是限定至少一个像素的热敏电阻材料; 为牺牲层中的像素提供支撑腿，用另外的牺牲层覆盖它们并在牺牲层的与支撑腿接触的表面中形成第一导电部分; 形成具有读出集成电路（ROIC）的第二晶片，所述第二晶片被另一牺牲层覆盖，所述第二晶片形成与所述ROIC接触的第二导电部分; 使第一晶片和第二晶片的牺牲氧化物层在一起，使得第一和第二导电部分对准并将它们结合在一起，使得当第一晶片和第二晶片的牺牲体积层第一晶片被去除; 并且移除牺牲层以释放像素，其中支撑腿在其下方。

8. 发明授权

US08952479B2 Focal plane array and method for manufacturing the same 有权
标题翻译：焦平面阵列及其制造方法
公开(公告)号：US08952479B2
公开(公告)日：2015-02-10
申请号：US13582103
申请日：2011-03-01
申请人： Adriana Lapadatu , Gjermund Kittilsland
发明人： Adriana Lapadatu , Gjermund Kittilsland
IPC分类号： H01L31/058 , H01L27/146
CPC分类号： H01L27/1467 , H01L27/14625 , H01L27/14632 , H01L27/14636 , H01L27/14683 , H01L27/14685 , H01L27/14687
摘要： A method of forming a focal plane array by: preparing a first wafer having sensing material provided on a surface, which is covered by a sacrificial layer; preparing a second wafer including read-out integrated circuit and a contact pad, which is covered by another sacrificial layer into which are formed support legs in contact with the contact pad, the support legs being covered with a further sacrificial layer; bonding the sacrificial layers of the first and second wafers together such that the sensing material is transferred from the first wafer to the second wafer when a sacrificial bulk layer of the first wafer is removed; defining a pixel in the sensing material and forming a conductive via through the pixel for providing a connection between an uppermost surface of the pixel and the supporting legs; and removing the sacrificial layers to release the pixel, with the supporting legs underneath it.
摘要翻译：一种通过以下步骤形成焦平面阵列的方法：制备具有设置在由牺牲层覆盖的表面上的感测材料的第一晶片; 制备包括读出集成电路和接触焊盘的第二晶片，其被另一牺牲层覆盖，其中形成有与接触焊盘接触的支撑腿，所述支撑腿被另外的牺牲层覆盖; 将第一和第二晶片的牺牲层结合在一起，使得当去除第一晶片的牺牲体层时，感测材料从第一晶片转移到第二晶片; 在所述感测材料中限定像素并形成通过所述像素的导电通孔，以提供所述像素的最上表面与所述支撑腿之间的连接; 并且移除牺牲层以释放像素，其中支撑腿在其下方。

9. 发明授权

US09051172B2 Method for manufacturing a hermetically sealed structure 有权
标题翻译：密封结构的制造方法
公开(公告)号：US09051172B2
公开(公告)日：2015-06-09
申请号：US13639423
申请日：2011-04-15
申请人： Gjermund Kittilsland , Daniel Lapadatu , Sissel Jacobsen , Trond Westgaard
发明人： Gjermund Kittilsland , Daniel Lapadatu , Sissel Jacobsen , Trond Westgaard
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00269 , B81B7/0032 , B81B2201/0235 , B81B2201/0242 , B81C2201/019 , B81C2201/0191 , B81C2203/0118 , B81C2203/031 , B81C2203/058
摘要： A method for providing hermetic sealing within a silicon-insulator composite wafer for manufacturing a hermetically sealed structure, comprising the steps of: patterning a first silicon wafer to have one or more recesses that extend at least partially through the first silicon wafer; filling said recesses with an insulator material able to be anodically bonded to silicon to form a first composite wafer having a plurality of silicon-insulator interfaces and a first contacting surface consisting of insulator material; and using an anodic bonding technique on the first contacting surface and an opposing second contacting surface to create hermetic sealing between the silicon-insulator interfaces, wherein the second contacting surface consists of silicon.
摘要翻译：一种用于在用于制造密封结构的硅绝缘体复合晶片内提供气密密封的方法，包括以下步骤：将第一硅晶片图案化成具有至少部分延伸穿过第一硅晶片的一个或多个凹槽; 用能够与硅阳极结合的绝缘体材料填充所述凹槽，以形成具有多个硅 - 绝缘体界面的第一复合晶片和由绝缘体材料组成的第一接触表面; 以及在所述第一接触表面和相对的第二接触表面上使用阳极接合技术以在所述硅 - 绝缘体界面之间形成气密密封，其中所述第二接触表面由硅组成。

10. 发明申请

US20130026596A1 FOCAL PLANE ARRAY AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20130026596A1
公开(公告)日：2013-01-31
申请号：US13582103
申请日：2011-03-01
申请人： Adriana Lapadatu , Gjermund Kittilsland
发明人： Adriana Lapadatu , Gjermund Kittilsland
IPC分类号： H01L31/18 , H01L27/146 , H01L31/09
CPC分类号： H01L27/1467 , H01L27/14625 , H01L27/14632 , H01L27/14636 , H01L27/14683 , H01L27/14685 , H01L27/14687
摘要： A method of forming a focal plane array by: preparing a first wafer having sensing material provided on a surface, which is covered by a sacrificial layer; preparing a second wafer including read-out integrated circuit and a contact pad, which is covered by another sacrificial layer into which are formed support legs in contact with the contact pad, the support legs being covered with a further sacrificial layer; bonding the sacrificial layers of the first and second wafers together such that the sensing material is transferred from the first wafer to the second wafer when a sacrificial bulk layer of the first wafer is removed; defining a pixel in the sensing material and forming a conductive via through the pixel for providing a connection between an uppermost surface of the pixel and the supporting legs; and removing the sacrificial layers to release the pixel, with the supporting legs underneath it.

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