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1. 发明授权

US5491381A Discharge tube 失效
标题翻译：放电管具有圆柱形管。
公开(公告)号：US5491381A
公开(公告)日：1996-02-13
申请号：US375513
申请日：1995-01-18
申请人： Gijun Idei , Takuji Kinoshita , Kunio Hoshino
发明人： Gijun Idei , Takuji Kinoshita , Kunio Hoshino
IPC分类号： H01J1/30 , H01J17/04 , H01T1/22 , H01T4/12 , H01T2/02
CPC分类号： H01T4/12 , H01T1/22
摘要： A discharge tube which assures stabilized discharging, is reduced in overall size and easy to manufacture is disclosed. The discharge tube comprises a cylindrical envelope made of an insulating substance, discharge gas enclosed in the envelope, and a pair of discharge electrodes disposed in an opposing relationship to each other at the opposite ends of the envelope. The the discharge electrodes are formed as parallel plate electrodes wherein faces thereof facing the inside of the envelope extend flat and in parallel to each other. A pair of conductive layers formed on the envelope in an opposing relationship to and electrically connected to the discharge electrodes, and one of the conductive layers is opposed at least part thereof with the other conductive layer with a portion of the envelope interposed therebetween.
摘要翻译：公开了一种确保放电稳定的放电管，其总体尺寸减小并易于制造。放电管包括由绝缘物质制成的圆柱形封套，封装在封套中的放电气体和在封套的相对端彼此相对设置的一对放电电极。放电电极形成为平行平板电极，其面向封套内侧的面彼此平坦并平行。一对导电层，形成在与放电电极相对并电连接的封套上，其中一个导电层的至少一部分与另一导电层相对，其中一部分封套被插入其间。

2. 发明授权

US5337035A Discharge tube 失效
标题翻译：放电管
公开(公告)号：US5337035A
公开(公告)日：1994-08-09
申请号：US51669
申请日：1993-04-26
申请人： Gijun Idei , Takuji Kinoshita , Kunio Hoshino
发明人： Gijun Idei , Takuji Kinoshita , Kunio Hoshino
IPC分类号： H01T14/00 , H01J17/04 , H01J17/40 , H01T1/20 , H01T4/12 , H01T21/00 , H01H61/00
CPC分类号： H01T1/20 , H01J17/04 , H01J17/40 , H01T4/12
摘要： The discharge tube of this invention does not employ special shapes of electrodes that are difficult to manufacture, but can still provide a uniform electric field. The electrodes are disposed in the inwardly drawn portions of the cylindrical body in such a way that the opposing front end surfaces of the electrodes are recessed from the inner surfaces of the inwardly drawn portions in a direction that they move away from each other. The discharge electrodes therefore do not project into the inner space of the cylindrical body but are enclosed by the inwardly drawn portions so that they are protected against influences of external electric fields from outside the discharge tube, thus assuring stable and reliable discharges.
摘要翻译：本发明的放电管不使用难以制造的电极的特殊形状，而是能够提供均匀的电场。电极被设置在圆柱体的向内拉伸部分中，使得电极的相对的前端表面沿着它们彼此远离的方向从向内拉出部分的内表面凹陷。因此，放电电极不会突出到圆筒体的内部空间中，而是被向内拉出的部分包围，从而防止外部电场从放电管外部的影响，从而确保放电稳定可靠。

3. 发明授权

US06633184B2 Phase comparator and synchronizing signal extracting device 失效
标题翻译：相位比较器和同步信号提取装置
公开(公告)号：US06633184B2
公开(公告)日：2003-10-14
申请号：US09859505
申请日：2001-05-18
申请人： Gijun Idei , Kazuyoshi Unno
发明人： Gijun Idei , Kazuyoshi Unno
IPC分类号： G01R2500
CPC分类号： H03D13/004 , H03L7/0891 , H04L7/033 , Y10S331/02
摘要： While generating a correction pulse (E) based on a clock signal (Xck1) input into one input terminal (6), a frequency and a phase of a differentiated pulse train (Data_Dif) input into the other input terminal (5) are compared with a frequency and a phase of the clock signal input into the one input terminal, then a leading phase instructing pulse (U4) and an incomplete lagging phase instructing pulse (D4a) are generated based on this compared result, then false pulses contained in the incomplete lagging phase instructing pulse (d4a) are removed by using the correction pulse (E) when the differentiated pulse train (Data_Dif) input into the other input terminal is in the tooth missing state, and then the precise leading phase instructing pulse (U4) and the precise lagging phase instructing pulse (D4) are output from two output terminals (7, 8).
摘要翻译：在输入到一个输入端子（ 6 ）的时钟信号（Xck 1 ）产生校正脉冲（E）），将输入到另一个输入端子（ 5 ）的微分脉冲串（Data_Dif）的频率和相位与时钟信号输入的频率和相位进行比较（U 4 ）和不完全滞后相位指示脉冲（D 4 基于该比较结果生成HIL> a ），然后包含在不完全滞后阶段中的假脉冲指示脉冲（d 4 当输入到另一个输入端子的微分脉冲串（Data_Dif）处于缺牙状态时，通过使用校正脉冲（E），然后精确的前导相指令脉冲（E）去除PDAT> a ）（U 4 ）和精确的滞后阶段输出脉冲（D 4 ）从两个输出端子（ 7,8 ）输出

4. 发明授权

US4103248A Voltage follower circuit 失效
标题翻译：电压下降电路
公开(公告)号：US4103248A
公开(公告)日：1978-07-25
申请号：US713244
申请日：1976-08-10
申请人： Gijun Idei
发明人： Gijun Idei
IPC分类号： H03F3/18 , H03F3/34 , H03F3/50 , H03F1/34
CPC分类号： H03F3/50
摘要： A voltage follower circuit comprises an input terminal; an output terminal; first and second power supply terminals; a first transistor of one conductivity type having a base connected to the input terminal; a second transistor, opposite in conductivity type to the first transistor, having a base connected to the collector of the first transistor, a collector connected to the output terminal and an emitter connected to the first power supply terminal; a third transistor having a base and collector connected to the output terminal and an emitter connected to the emitter of the first transistor; a fourth transistor of the one conductivity type having an emitter connected to the second power supply terminal; and a fifth transistor of the one conductivity type having an emitter and base respectively connected to the emitter and base of the fourth transistor and a collector connected to the base of the fourth transistor and to the first power supply terminal through a resistor.

5. 发明授权

US4063120A Constant voltage circuit 失效
标题翻译：恒压电路
公开(公告)号：US4063120A
公开(公告)日：1977-12-13
申请号：US713243
申请日：1976-08-10
申请人： Gijun Idei
发明人： Gijun Idei
IPC分类号： G03B7/26 , G05F3/30 , H03K17/00
CPC分类号： G05F3/30
摘要： A constant voltage circuit comprises first and second circuit terminals; a current source connected to said first and second circuit terminals; a first npn transistor whose collector is connected to the first circuit terminal through a resistor; a second npn transistor having a collector connected to the emitter of the first npn transistor, a base connected to the collector of the first npn transistor, and an emitter connected to the second circuit terminal; a third npn transistor having a base connected to the base of the first npn transistor, an emitter connected to the emitter of the first npn transistor through a resistor and a collector connected to the first circuit terminal through a resistor; a fourth transistor having a base connected to the collector of the third transistor and a collector and emitter coupled to the first and second circuit terminals; a resistor connected between the first circuit terminal and a junction of the bases of the first and third transistors; and a resistor connected between the second circuit terminal and a junction between the bases of the first and third transistors.
摘要翻译：恒压电路包括第一和第二电路端子; 连接到所述第一和第二电路端子的电流源; 第一npn晶体管，其集电极通过电阻器连接到第一电路端子; 第二npn晶体管，其具有连接到第一npn晶体管的发射极的集电极，连接到第一npn晶体管的集电极的基极和连接到第二电路端子的发射极; 具有连接到第一npn晶体管的基极的基极的第三npn晶体管，通过电阻器连接到第一npn晶体管的发射极的发射极和通过电阻器连接到第一电路端子的集电极; 第四晶体管，其具有连接到第三晶体管的集电极的基极和耦合到第一和第二电路端子的集电极和发射极; 连接在第一电路端子和第一和第三晶体管的基极的结之间的电阻器; 以及连接在第二电路端子与第一和第三晶体管的基极之间的结之间的电阻器。

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