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1. 发明授权

US07644216B2 System and method for providing an adapter for re-use of legacy DIMMS in a fully buffered memory environment 失效
标题翻译：用于提供用于在完全缓冲的存储器环境中重复使用传统DIMMS的适配器的系统和方法
公开(公告)号：US07644216B2
公开(公告)日：2010-01-05
申请号：US11735677
申请日：2007-04-16
申请人： Gerald J. Fahr , Raymond J. Harrington , Roger A. Rippens , Donald J. Swietek
发明人： Gerald J. Fahr , Raymond J. Harrington , Roger A. Rippens , Donald J. Swietek
IPC分类号： H05K7/10
CPC分类号： G06F13/16 , G06F13/385
摘要： A system and method for providing an adapter for re-use of legacy DIMMS in a fully buffered memory environment. The system includes a memory adapter card having two rows of contacts along a leading edge of a length of the card. The rows of contacts are adapted to be inserted into a socket that is connected to a daisy chain high-speed memory bus via a packetized multi-transfer interface. The memory adapter card also includes a socket installed on the trailing edge of the card. In addition, the memory adapter card includes a hub device for converting the packetized multi-transfer interface into a parallel interface having timings and interface levels that are operable with a memory module having a parallel interface that is inserted into the socket. In addition, the hub device converts the packetized multi-transfer interface into a parallel interface having timings and interface levels that are operable with a memory module having a parallel interface that is inserted into the socket. The hub device also converts the parallel interface into the packetized multi-transfer interface.
摘要翻译：一种用于在完全缓冲的存储器环境中提供用于重新使用传统DIMMS的适配器的系统和方法。该系统包括具有沿着卡的长度的前缘的两行触点的存储器适配器卡。触点行适于插入通过分组化的多传输接口连接到菊花链高速存储器总线的插座中。存储器适配器卡还包括安装在卡尾部的插座。此外，存储器适配器卡包括用于将打包的多传输接口转换成具有定时和接口级别的并行接口的集线器设备，该定时和接口级别可与具有插入插座的并行接口的存储器模块一起操作。此外，集线器设备将打包的多传输接口转换成具有定时和接口级别的并行接口，该定时和接口级别可与具有插入插座的并行接口的存储器模块一起操作。集线器设备还将并行接口转换为打包的多传输接口。

2. 发明申请

US20080256281A1 SYSTEM AND METHOD FOR PROVIDING AN ADAPTER FOR RE-USE OF LEGACY DIMMS IN A FULLY BUFFERED MEMORY ENVIRONMENT 失效
标题翻译：提供适配器的系统和方法，用于在完全缓冲的存储器环境中重新使用代码
公开(公告)号：US20080256281A1
公开(公告)日：2008-10-16
申请号：US11735677
申请日：2007-04-16
申请人： Gerald J. Fahr , Raymond J. Harrington , Roger A. Rippens , Donald J. Swietek
发明人： Gerald J. Fahr , Raymond J. Harrington , Roger A. Rippens , Donald J. Swietek
IPC分类号： G06F13/14
CPC分类号： G06F13/16 , G06F13/385
摘要： A system and method for providing an adapter for re-use of legacy DIMMS in a fully buffered memory environment. The system includes a memory adapter card having two rows of contacts along a leading edge of a length of the card. The rows of contacts are adapted to be inserted into a socket that is connected to a daisy chain high-speed memory bus via a packetized multi-transfer interface. The memory adapter card also includes a socket installed on the trailing edge of the card. In addition, the memory adapter card includes a hub device for converting the packetized multi-transfer interface into a parallel interface having timings and interface levels that are operable with a memory module having a parallel interface that is inserted into the socket. In addition, the hub device converts the packetized multi-transfer interface into a parallel interface having timings and interface levels that are operable with a memory module having a parallel interface that is inserted into the socket. The hub device also converts the parallel interface into the packetized multi-transfer interface.
摘要翻译：一种用于在完全缓冲的存储器环境中提供用于重新使用传统DIMMS的适配器的系统和方法。该系统包括具有沿着卡的长度的前缘的两行触点的存储器适配器卡。触点行适于插入通过分组化的多传输接口连接到菊花链高速存储器总线的插座中。存储器适配器卡还包括安装在卡尾部的插座。此外，存储器适配器卡包括用于将打包的多传输接口转换成具有定时和接口级别的并行接口的集线器设备，该定时和接口级别可与具有插入插座的并行接口的存储器模块一起操作。此外，集线器设备将打包的多传输接口转换成具有定时和接口级别的并行接口，该定时和接口级别可与具有插入插座的并行接口的存储器模块一起操作。集线器设备还将并行接口转换为打包的多传输接口。

3. 发明授权

US07308527B2 System for indicating a plug position for a memory module in a memory system 有权
标题翻译：用于指示存储器系统中的存储器模块的插头位置的系统
公开(公告)号：US07308527B2
公开(公告)日：2007-12-11
申请号：US11041662
申请日：2005-01-24
申请人： Roger A. Rippens , Donald J. Swietek
发明人： Roger A. Rippens , Donald J. Swietek
IPC分类号： G06F12/10
CPC分类号： G11C5/04
摘要： A memory system including a first and second of set of socket pads adapted for connection to memory module continuity pins. The memory system also includes a first indicator corresponding to the first set of socket pads. The memory system also includes a second indicator corresponding to the second set of socket pads. The first indicator is active and the second indicator is inactive when the first and second set of socket pads are empty. The first indicator is inactive and the second indicator is inactive when then first and second set of socket pads contain the continuity pins. The first indicator is inactive and the second indicator is active when the first set of socket pads contain the continuity pins and the second set of socket pads is empty.
摘要翻译：存储器系统，包括适于连接到存储器模块连续性引脚的一组插座焊盘的第一和第二组。存储器系统还包括对应于第一组插座焊盘的第一指示器。存储器系统还包括对应于第二组插座垫的第二指示器。当第一组和第二组插座垫为空时，第一个指示器处于活动状态，第二个指示灯不起作用。当第一组和第二组插座垫包含连续性引脚时，第一个指示灯不起作用，第二个指示灯无效。当第一组插座垫包含连续性引脚并且第二组插座垫为空时，第一个指示器不起作用，第二个指示器有效。

4. 发明授权

US07441073B2 System for indicating a plug position for a memory module in a memory system 有权
标题翻译：用于指示存储器系统中的存储器模块的插头位置的系统
公开(公告)号：US07441073B2
公开(公告)日：2008-10-21
申请号：US11925210
申请日：2007-10-26
申请人： Roger A. Rippens , Donald J. Swietek
发明人： Roger A. Rippens , Donald J. Swietek
IPC分类号： G06F12/10
CPC分类号： G11C5/04
摘要： A memory system including a first and second of set of socket pads adapted for connection to memory module continuity pins. The memory system also includes a first indicator corresponding to the first set of socket pads. The memory system also includes a second indicator corresponding to the second set of socket pads. The first indicator is active and the second indicator is inactive when the first and second set of socket pads are empty. The first indicator is inactive and the second indicator is inactive when then first and second set of socket pads contain the continuity pins. The first indicator is inactive and the second indicator is active when the first set of socket pads contain the continuity pins and the second set of socket pads is empty.
摘要翻译：存储器系统，包括适于连接到存储器模块连续性引脚的一组插座焊盘的第一和第二组。存储器系统还包括对应于第一组插座焊盘的第一指示器。存储器系统还包括对应于第二组插座垫的第二指示器。当第一组和第二组插座垫为空时，第一个指示器处于活动状态，第二个指示灯不起作用。当第一组和第二组插座垫包含连续性引脚时，第一个指示灯不起作用，第二个指示灯无效。当第一组插座垫包含连续性引脚并且第二组插座垫为空时，第一个指示器不起作用，第二个指示器有效。

5. 发明授权

US07590899B2 Processor memory array having memory macros for relocatable store protect keys 失效
标题翻译：处理器存储器阵列具有用于可重定位存储保护键的存储器宏
公开(公告)号：US07590899B2
公开(公告)日：2009-09-15
申请号：US11532267
申请日：2006-09-15
申请人： Donald J. Swietek , Bruce G. Hazelzet , Roger A. Rippens , Carl B. Ford, III , Kevin W. Kark , Pak-kin Mak , Liyong Wang
发明人： Donald J. Swietek , Bruce G. Hazelzet , Roger A. Rippens , Carl B. Ford, III , Kevin W. Kark , Pak-kin Mak , Liyong Wang
IPC分类号： G11C29/00 , G06F11/00 , G06F13/00
CPC分类号： G06F12/1416
摘要： A DDR SDRAM DIMM for a mainframe main storage subsystem has a plurality of DDR SDRAMs on a rectangular printed circuit board having a first side and a second side, a length (152 MM=6 inch) between 149 and 153 millimeters and optimized at 149.15 mm or 151.35 mm in length and first and second ends having a width smaller than the length; a first plurality of connector locations on the first side extending along a first edge of the board that extends the length of the board, a second plurality of connector locations of the second side extending on the first edge of the board, a locating key having its center positioned on the first edge and located between 80 mm and 86 mm and optimized with a locating key 1.5 mm wide centered at 81.58 or 85.67 mm from the first end of the board and located between 64 and 70 mm and optimized with the locating key centered at 67.58 or 65.675 from the second end of the board. Each DIMM has memory regions comprising one of a plurality of physical entities hereafter referred to as memory macros which are relocatable regions which contain SP Keys and data set storage in the DIMM physical memory. These memory macros SP Key regions define an arbitrary logic structure for main storage which has a hard physical boundary.
摘要翻译：用于主机主存储子系统的DDR SDRAM DIMM具有在具有第一侧和第二侧的矩形印刷电路板上的多个DDR SDRAM，长度（152MM = 6英寸）在149和153毫米之间，并且在149.15mm处优化或151.35mm的长度，第一和第二端的宽度小于长度; 所述第一侧的第一多个连接器位置沿所述板的第一边缘延伸，所述第一边延伸所述板的长度，所述第二侧的第二多个连接器位置在所述板的第一边缘上延伸，定位键具有其中心位于第一个边缘，位于80 mm和86 mm之间，并使用1.5 mm宽的定位键进行优化，定位键距离板的第一端81.58或85.67 mm，位于64至70 mm之间，并以定位键为中心进行优化从板的第二端67.58或65.675。每个DIMM具有包括以下称为存储宏的多个物理实体中的一个的存储器区域，其是在DIMM物理存储器中包含SP密钥和数据集存储的可重定位区域。这些内存宏SP键区域为主存储器定义了一个具有硬物理边界的任意逻辑结构。

6. 发明申请

US20080072109A1 Processor memory array having memory macros for relocatable store protect keys 失效
标题翻译：处理器存储器阵列具有用于可重定位存储保护键的存储器宏
公开(公告)号：US20080072109A1
公开(公告)日：2008-03-20
申请号：US11532267
申请日：2006-09-15
申请人： Donald J. Swietek , Bruce G. Hazelzet , Roger A. Rippens , Carl B. Ford , Kevin W. Kark , Pak-kin Mak , Liyong Wang
发明人： Donald J. Swietek , Bruce G. Hazelzet , Roger A. Rippens , Carl B. Ford , Kevin W. Kark , Pak-kin Mak , Liyong Wang
IPC分类号： G06F12/16 , G06F11/07 , G06F11/22
CPC分类号： G06F12/1416
摘要： A DDR SDRAM DIMM for a mainframe main storage subsystem has a plurality of DDR SDRAMs on a rectangular printed circuit board having a first side and a second side, a length (152 MM=6 inch) between 149 and 153 millimeters and optimized at 149.15 mm or 151.35 mm in length and first and second ends having a width smaller than the length; a first plurality of connector locations on the first side extending along a first edge of the board that extends the length of the board, a second plurality of connector locations of the second side extending on the first edge of the board, a locating key having its center positioned on the first edge and located between 80 mm and 86 mm and optimized with a locating key 1.5 mm wide centered at 81.58 or 85.67 mm from the first end of the board and located between 64 and 70 mm and optimized with the locating key centered at 67.58 or 65.675 from the second end of the board. Each DIMM has memory regions comprising one of a plurality of physical entities hereafter referred to as memory macros which are relocatable regions which contain SP Keys and data set storage in the DIMM physical memory. These memory macros SP Key regions define an arbitrary logic structure for main storage which has a hard physical boundary.
摘要翻译：用于主机主存储子系统的DDR SDRAM DIMM具有在具有第一侧和第二侧的矩形印刷电路板上的多个DDR SDRAM，长度（152MM = 6英寸）在149和153毫米之间，并且在149.15mm处优化或151.35mm的长度，第一和第二端的宽度小于长度; 所述第一侧的第一多个连接器位置沿所述板的第一边缘延伸，所述第一边延伸所述板的长度，所述第二侧的第二多个连接器位置在所述板的第一边缘上延伸，定位键具有其中心位于第一个边缘，位于80 mm和86 mm之间，并使用1.5 mm宽的定位键进行优化，定位键距离板的第一端81.58或85.67 mm，位于64至70 mm之间，并以定位键为中心进行优化从板的第二端67.58或65.675。每个DIMM具有包括以下称为存储宏的多个物理实体中的一个的存储器区域，其是在DIMM物理存储器中包含SP密钥和数据集存储的可重定位区域。这些内存宏SP键区域为主存储器定义了一个具有硬物理边界的任意逻辑结构。

7. 发明申请

US20080183957A1 276-PIN BUFFERED MEMORY MODULE WITH ENHANCED FAULT TOLERANCE 失效
标题翻译： 276引脚缓冲存储器模块，具有增强的故障容限
公开(公告)号：US20080183957A1
公开(公告)日：2008-07-31
申请号：US12060992
申请日：2008-04-02
申请人： Daniel M. Dreps , Frank D. Ferraiolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
发明人： Daniel M. Dreps , Frank D. Ferraiolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
IPC分类号： G06F12/00 , G06F11/00
CPC分类号： G11C5/04
摘要： A dual inline memory module (DIMM) includes a card having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local memory devices attached to the card, and a buffer device attached to the card, the buffer device configured for converting a packetized memory interface. The card includes at least 276 pins configured thereon.
摘要翻译：双列直插式存储器模块（DIMM）包括具有大约151.2至大约151.5毫米的长度的卡，连接到卡的多个单独的本地存储器件以及连接到卡的缓冲器装置，缓冲器装置被配置为将打包内存界面。该卡片包括至少276个配置在其上的针脚。

8. 发明授权

US07551468B2 276-pin buffered memory module with enhanced fault tolerance 失效
标题翻译： 276引脚缓冲存储器模块，具有增强的容错能力
公开(公告)号：US07551468B2
公开(公告)日：2009-06-23
申请号：US12060992
申请日：2008-04-02
申请人： Daniel M. Dreps , Frank D. Ferraiolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
发明人： Daniel M. Dreps , Frank D. Ferraiolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
IPC分类号： G11C5/06 , G11C5/02
CPC分类号： G11C5/04
摘要： A dual inline memory module (DIMM) includes a card having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local memory devices attached to the card, and a buffer device attached to the card, the buffer device configured for converting a packetized memory interface. The card includes at least 276 pins configured thereon.
摘要翻译：双列直插式存储器模块（DIMM）包括具有大约151.2至大约151.5毫米的长度的卡，连接到卡的多个单独的本地存储器件以及连接到卡的缓冲器装置，缓冲器装置被配置为将打包内存界面。该卡片包括至少276个配置在其上的针脚。

9. 发明申请

US20080177942A1 276-PIN BUFFERED MEMORY MODULE WITH ENHANCED FAULT TOLERANCE 失效
公开(公告)号：US20080177942A1
公开(公告)日：2008-07-24
申请号：US12060998
申请日：2008-04-02
申请人： Daniel M. Dreps , Frank D. Ferraiolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
发明人： Daniel M. Dreps , Frank D. Ferraiolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
IPC分类号： G06F12/00
CPC分类号： G11C5/04
摘要： A dual inline memory module (DIMM) includes a card having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local memory devices attached to the card, and a buffer device attached to the card, the buffer device configured for converting a packetized memory interface. The card includes at least 276 pins configured thereon.

10. 发明授权

US07224595B2 276-Pin buffered memory module with enhanced fault tolerance 有权
标题翻译： 276针缓冲存储器模块，具有增强的容错能力
公开(公告)号：US07224595B2
公开(公告)日：2007-05-29
申请号：US10903371
申请日：2004-07-30
申请人： Daniel M. Dreps , Frank D. Ferriaolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
发明人： Daniel M. Dreps , Frank D. Ferriaolo , Kevin C. Gower , Mark W. Kellogg , Roger A. Rippens
IPC分类号： G11C5/06 , G11C5/02
CPC分类号： G11C5/04
摘要： A dual inline memory module (DIMM) includes a card having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local memory devices attached to the card, and a buffer device attached to the card, the buffer device configured for converting a packetized memory interface. The card includes at least 276 pins configured thereon.
摘要翻译：双列直插式存储器模块（DIMM）包括具有大约151.2至大约151.5毫米的长度的卡，连接到卡的多个单独的本地存储器件以及连接到卡的缓冲器装置，缓冲器装置被配置为将打包内存界面。该卡片包括至少276个配置在其上的针脚。

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