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1. 发明申请

US20080072109A1 Processor memory array having memory macros for relocatable store protect keys 失效
标题翻译：处理器存储器阵列具有用于可重定位存储保护键的存储器宏
公开(公告)号：US20080072109A1
公开(公告)日：2008-03-20
申请号：US11532267
申请日：2006-09-15
申请人： Donald J. Swietek , Bruce G. Hazelzet , Roger A. Rippens , Carl B. Ford , Kevin W. Kark , Pak-kin Mak , Liyong Wang
发明人： Donald J. Swietek , Bruce G. Hazelzet , Roger A. Rippens , Carl B. Ford , Kevin W. Kark , Pak-kin Mak , Liyong Wang
IPC分类号： G06F12/16 , G06F11/07 , G06F11/22
CPC分类号： G06F12/1416
摘要： A DDR SDRAM DIMM for a mainframe main storage subsystem has a plurality of DDR SDRAMs on a rectangular printed circuit board having a first side and a second side, a length (152 MM=6 inch) between 149 and 153 millimeters and optimized at 149.15 mm or 151.35 mm in length and first and second ends having a width smaller than the length; a first plurality of connector locations on the first side extending along a first edge of the board that extends the length of the board, a second plurality of connector locations of the second side extending on the first edge of the board, a locating key having its center positioned on the first edge and located between 80 mm and 86 mm and optimized with a locating key 1.5 mm wide centered at 81.58 or 85.67 mm from the first end of the board and located between 64 and 70 mm and optimized with the locating key centered at 67.58 or 65.675 from the second end of the board. Each DIMM has memory regions comprising one of a plurality of physical entities hereafter referred to as memory macros which are relocatable regions which contain SP Keys and data set storage in the DIMM physical memory. These memory macros SP Key regions define an arbitrary logic structure for main storage which has a hard physical boundary.
摘要翻译：用于主机主存储子系统的DDR SDRAM DIMM具有在具有第一侧和第二侧的矩形印刷电路板上的多个DDR SDRAM，长度（152MM = 6英寸）在149和153毫米之间，并且在149.15mm处优化或151.35mm的长度，第一和第二端的宽度小于长度; 所述第一侧的第一多个连接器位置沿所述板的第一边缘延伸，所述第一边延伸所述板的长度，所述第二侧的第二多个连接器位置在所述板的第一边缘上延伸，定位键具有其中心位于第一个边缘，位于80 mm和86 mm之间，并使用1.5 mm宽的定位键进行优化，定位键距离板的第一端81.58或85.67 mm，位于64至70 mm之间，并以定位键为中心进行优化从板的第二端67.58或65.675。每个DIMM具有包括以下称为存储宏的多个物理实体中的一个的存储器区域，其是在DIMM物理存储器中包含SP密钥和数据集存储的可重定位区域。这些内存宏SP键区域为主存储器定义了一个具有硬物理边界的任意逻辑结构。

2. 发明申请

US20080071964A1 Relocatable Storage Protect Keys for System Main Memory 有权
标题翻译：系统主存储器的可重新定位存储保护键
公开(公告)号：US20080071964A1
公开(公告)日：2008-03-20
申请号：US11532294
申请日：2006-09-15
申请人： Kevin W. Kark , Liyong Wang , Carl B. Ford , Pak-kin Mak
发明人： Kevin W. Kark , Liyong Wang , Carl B. Ford , Pak-kin Mak
IPC分类号： G06F12/14
CPC分类号： G06F12/1475 , G06F11/08
摘要： Storage protection keys and system data share the same physical storage. The key region is dynamically relocatable by firmware. A Configuration Array is used to map the absolute address of the key region in to its physical address. The absolute address of keys can be fixed even though the physical location of the keys is relocated into a different region. A triple-etect double correct ECC scheme is used to protect keys. The ECC scheme is different from regular data in the storage and can be used to detect illegal access. Extra firmware and hardware is also designed to restrain customer's applications from directly accessing keys. With the key region being relocatable, the firmware could move the key region away from a known faulty area in a memory to improve system RAS. We also achieved the commonality objective that key memory device can use the same memory devices with other server systems that do not use keys.
摘要翻译：存储保护密钥和系统数据共享相同的物理存储。关键区域是通过固件动态重新定位。配置阵列用于将关键区域的绝对地址映射到其物理地址。即使键的物理位置被重新定位到不同的区域，键的绝对地址也可以被固定。使用三重等效双重ECC方案来保护密钥。 ECC方案与存储中的常规数据不同，可用于检测非法访问。额外的固件和硬件也旨在限制客户的应用程序直接访问密钥。在可重新定位关键区域的情况下，固件可以将密钥区域从存储器中的已知故障区域移开，以改善系统RAS。我们还实现了共同目标，即密钥存储设备可以与不使用密钥的其他服务器系统使用相同的存储设备。

3. 发明授权

US07085897B2 Memory management for a symmetric multiprocessor computer system 失效
标题翻译：对称多处理器计算机系统的内存管理
公开(公告)号：US07085897B2
公开(公告)日：2006-08-01
申请号：US10436491
申请日：2003-05-12
申请人： Michael A. Blake , Carl B. Ford , Pak-kin Mak , Gary E. Strait
发明人： Michael A. Blake , Carl B. Ford , Pak-kin Mak , Gary E. Strait
IPC分类号： G06F12/00
CPC分类号： G06F9/5016 , G06F12/0822
摘要： A modular multiprocessor computer system having a plurality of nodes each being in communication with each other via communication links. The plurality of nodes each have local memory and local cache accessible by the other nodes. The plurality of nodes each also having a cache directory, one or more processing units, and a memory coherent directory to keep track of the scope of ownership of data within the modular multiprocessing computer system. The local memory and the local cache contain configurable regions of storage, wherein memory coherency traffic on the communication links between the nodes is controlled through the use of the memory coherent directory during a data request.
摘要翻译：一种具有多个节点的模块化多处理器计算机系统，每个节点通过通信链路相互通信。多个节点各自具有本地存储器和由其他节点访问的本地高速缓存。多个节点每个还具有高速缓存目录，一个或多个处理单元和存储器相干目录，以跟踪模块化多处理计算机系统内的数据的所有权范围。本地存储器和本地高速缓存包含可配置的存储区域，其中在数据请求期间通过使用存储器相干目录来控制节点之间的通信链路上的存储器一致性流量。

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