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1. 发明授权

US06281860B1 Cues for status information 失效
标题翻译：状态信息的提示
公开(公告)号：US06281860B1
公开(公告)日：2001-08-28
申请号：US09164133
申请日：1998-09-30
申请人： George Henry Ahrens, Jr. , Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Kurt Paul Szabo
发明人： George Henry Ahrens, Jr. , Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Kurt Paul Szabo
IPC分类号： G09G300
CPC分类号： G06F1/181
摘要： A method and implementing apparatus is provided which include a plurality of perceptible indicia devices which are mounted on an I/O drawer of a computer system server equipment rack. In the exemplary embodiment, the indicia devices include a light-emitting diode in combination with an alphanumeric display device. Various states of a system initialization process are indicated by different combinations of possible states of the LED and the display device such that the sequencing of a system initialization process can be traced by visual inspection of the status of the perceptible indicia devices.
摘要翻译：提供了一种方法和实现装置，其包括安装在计算机系统服务器设备机架的I / O抽屉上的多个可感知标记装置。在示例性实施例中，标记装置包括与字母数字显示装置组合的发光二极管。通过LED和显示设备的可能状态的不同组合来指示系统初始化过程的各种状态，使得系统初始化过程的顺序可以通过目视检查可感知标记设备的状态来跟踪。

2. 发明授权

US6148419A System diagnostic location codes 有权
标题翻译：系统诊断位置代码
公开(公告)号：US6148419A
公开(公告)日：2000-11-14
申请号：US164132
申请日：1998-09-30
申请人： George Henry Ahrens , Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Kurt Paul Szabo
发明人： George Henry Ahrens , Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Kurt Paul Szabo
IPC分类号： G06F11/00 , G06F11/32
CPC分类号： G06F11/327 , G06F11/006
摘要： A multitude of devices coupled to a processor are each given a location code, which is then displayed in proximity to each of the devices. Then, when the processor indicates an error within a particular device, the service person can easily find which device has the error by the displayed location code associated with the device.
摘要翻译：耦合到处理器的多个设备各自被给定位置代码，然后显示在每个设备附近。然后，当处理器指示特定设备内的错误时，服务人员可以通过与设备相关联的显示的位置代码来容易地找出哪个设备具有错误。

3. 发明授权

US06308289B1 Method and system for environmental sensing and control within a computer system 失效
标题翻译：计算机系统内环境感知和控制的方法和系统
公开(公告)号：US06308289B1
公开(公告)日：2001-10-23
申请号：US09165161
申请日：1998-10-01
申请人： George Henry Ahrens , Mike Conrad Duron , Robert Allan Faust , Charles Andrew McLaughlin , Craig Henry Shempert , Kurt Paul Szabo
发明人： George Henry Ahrens , Mike Conrad Duron , Robert Allan Faust , Charles Andrew McLaughlin , Craig Henry Shempert , Kurt Paul Szabo
IPC分类号： G06F1100
CPC分类号： G06F11/3058 , G06F1/206 , G06F1/30
摘要： In accordance with the method and system of the present invention, a local processor utilizes registers arranged in a fault/mask/cache fashion for environmental control and sensing within a data processing system. The local processor continuously reads input data from a variety of environmental sensors in order to determine if a threshold level has been reached and a fault condition exists. Cache registers allow the local processor to store/pass detailed sensor information to system firmware within system processor(s). The local processor sets a fault bit within a fault register designed to cause an interrupt to the system level firmware if any of its bits are non-zero, indicating that a fault condition has occurred. A mask register is designed to allow the interaction of both the local processor and system processor(s) when an interrupt is being serviced and help keeps track of which interrupts are being serviced and which are yet to be serviced in the case of multiple interrupt sources. The system firmware will service the interrupt and set the mask bit. The action will signal the local processor that the system has acknowledged the interrupt and will take the appropriate action. The local processor may now post another fault, exactly like the first fault, by clearing the mask bit and causing a subsequent interrupt to the system. The fault, mask, cache, and both local and system processor(s) work together to provide a positive interlock for synchronizing their actions with each other.
摘要翻译：根据本发明的方法和系统，本地处理器利用以故障/掩码/高速缓存方式排列的用于数据处理系统内的环境控制和感测的寄存器。本地处理器连续读取来自各种环境传感器的输入数据，以确定是否达到阈值水平并且存在故障状况。缓存寄存器允许本地处理器将详细的传感器信息存储/传递到系统处理器内的系统固件。本地处理器在故障寄存器内设置一个故障位，用于在系统级固件中的任一位非零时引起中断，表示发生了故障状态。掩码寄存器被设计为允许本地处理器和系统处理器在中断被服务时的交互，并帮助记录在多个中断源的情况下跟踪哪些中断被服务以及哪些中断服务。系统固件将为中断服务并设置掩码位。该操作将通知本地处理器系统已经确认中断，并采取适当的措施。本地处理器现在可以通过清除掩码位并导致系统的后续中断来发布完全像第一个故障的另一个故障。故障，掩码，缓存以及本地和系统处理器一起工作，为彼此的动作同步提供了一个积极的互锁。

4. 发明授权

US07711993B2 JTAGchain bus switching and configuring device 失效
标题翻译： JTAG串行总线切换和配置设备
公开(公告)号：US07711993B2
公开(公告)日：2010-05-04
申请号：US12251257
申请日：2008-10-14
申请人： Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Ajay Kumar Mahajan , Glenn Rueban Miles
发明人： Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Ajay Kumar Mahajan , Glenn Rueban Miles
IPC分类号： G06F11/00
CPC分类号： G01R31/318558 , G01R31/318544 , G01R31/318555 , G06F13/4022
摘要： A JTAG bus cross point switching device that is commanded by the same bus which it configures. In a preferred embodiment a JTAG chain includes a cross point switching device that is capable of adding, omitting, or rearranging devices on a JTAG bus. The switching device itself is controlled by commands on the JTAG bus which it configures.
摘要翻译：一个JTAG总线交叉点交换设备，由其配置的同一总线指令。在优选实施例中，JTAG链包括能够在JTAG总线上添加，省略或重新排列设备的交叉点交换设备。开关设备本身由配置的JTAG总线上的命令控制。

5. 发明授权

US07454664B2 JTAGchain bus switching and configuring device 失效
标题翻译： JTAG串行总线切换和配置设备
公开(公告)号：US07454664B2
公开(公告)日：2008-11-18
申请号：US10610170
申请日：2003-06-30
申请人： Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Ajay Kumar Mahajan , Glenn Rueban Miles
发明人： Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Ajay Kumar Mahajan , Glenn Rueban Miles
IPC分类号： G06F11/00
CPC分类号： G01R31/318558 , G01R31/318544 , G01R31/318555 , G06F13/4022
摘要： Commanding a JTAG bus cross point switching device by the same bus which it configures. Adding, omitting, or rearranging devices on a JTAG bus with a cross point switching device that is included in a JTAG chain. Controlling the switching device with commands on the JTAG bus which it configures.
摘要翻译：通过其配置的相同总线来命令JTAG总线交叉点交换设备。使用JTAG链中包含的交叉点切换设备在JTAG总线上添加，省略或重新布置设备。使用其配置的JTAG总线上的命令控制交换设备。

6. 发明申请

US20090037639A1 JTAGCHAIN Bus Switching and Configuring Device 失效
标题翻译： JTAGCHAIN总线切换和配置设备
公开(公告)号：US20090037639A1
公开(公告)日：2009-02-05
申请号：US12251257
申请日：2008-10-14
申请人： Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Ajay Kumar Mahajan , Glenn Rueban Miles
发明人： Mike Conrad Duron , Robert Allan Faust , Forrest Clifton Gray , Ajay Kumar Mahajan , Glenn Rueban Miles
IPC分类号： G06F13/00
CPC分类号： G01R31/318558 , G01R31/318544 , G01R31/318555 , G06F13/4022
摘要： A JTAG bus cross point switching device that is commanded by the same bus which it configures. In a preferred embodiment a JTAG chain includes a cross point switching device that is capable of adding, omitting, or rearranging devices on a JTAG bus. The switching device itself is controlled by commands on the JTAG bus which it configures.
摘要翻译：一个JTAG总线交叉点交换设备，由其配置的同一总线指令。在优选实施例中，JTAG链包括能够在JTAG总线上添加，省略或重新排列设备的交叉点交换设备。开关设备本身由配置的JTAG总线上的命令控制。

7. 发明授权

US07579896B2 Method and apparatus for generating multiple analog signals using a single microcontroller output pin 失效
公开(公告)号：US07579896B2
公开(公告)日：2009-08-25
申请号：US12131534
申请日：2008-06-02
申请人： Robert Allan Faust , John Daniel Upton
发明人： Robert Allan Faust , John Daniel Upton
IPC分类号： H03K17/00 , H03M1/00
CPC分类号： G06F1/025
摘要： A method and apparatus are disclosed for generating multiple separate analog signals using a single microcontroller output pin. The microcontroller generates a waveform that is used to concurrently generate multiple separate analog signals. The microcontroller outputs a waveform that includes a first signal from one of the microcontroller's output pins. The first signal is used to produce a first analog signal. The microcontroller then outputs a delineating signal, as part of the waveform, from the microcontroller's output pin. The delineating signal indicates the start of a next signal in the waveform. The microcontroller then outputs a second signal, as part of the waveform, from its output pin. The second signal is used to produce a second analog signal. The waveform includes the first signal that is followed by the delineating signal that is followed by the second signal.

8. 发明授权

US07010726B2 Method and apparatus for saving data used in error analysis 有权
公开(公告)号：US07010726B2
公开(公告)日：2006-03-07
申请号：US09798169
申请日：2001-03-01
申请人： Robert Allan Faust , Kevin Gene Kehne , Sayileela Nulu , Gary Lee Ruzek
发明人： Robert Allan Faust , Kevin Gene Kehne , Sayileela Nulu , Gary Lee Ruzek
IPC分类号： G06F11/00
CPC分类号： G06F11/0787 , G06F11/0712 , G06F11/0778
摘要： A method, apparatus, and computer implemented instructions for saving data in a logically partitioned data processing system. An error is detected in the logically partitioned data processing system. Data needed for error analysis of the error is saved in a power independent memory associated with a service processor.

9. 发明申请

US20080258777A1 Method and Apparatus for Generating Multiple Analog Signals Using a Single Microcontroller Output Pin 失效
标题翻译：使用单个微控制器输出引脚生成多个模拟信号的方法和装置
公开(公告)号：US20080258777A1
公开(公告)日：2008-10-23
申请号：US12131534
申请日：2008-06-02
申请人： Robert Allan Faust , John Daniel Upton
发明人： Robert Allan Faust , John Daniel Upton
IPC分类号： H03B21/00
CPC分类号： G06F1/025
摘要： A method and apparatus are disclosed for generating multiple separate analog signals using a single microcontroller output pin. The microcontroller generates a waveform that is used to concurrently generate multiple separate analog signals. The microcontroller outputs a waveform that includes a first signal from one of the microcontroller's output pins. The first signal is used to produce a first analog signal. The microcontroller then outputs a delineating signal, as part of the waveform, from the microcontroller's output pin. The delineating signal indicates the start of a next signal in the waveform. The microcontroller then outputs a second signal, as part of the waveform, from its output pin. The second signal is used to produce a second analog signal. The waveform includes the first signal that is followed by the delineating signal that is followed by the second signal.
摘要翻译：公开了一种用于使用单个微控制器输出引脚来产生多个单独模拟信号的方法和装置。微控制器产生用于同时产生多个分离的模拟信号的波形。微控制器输出包含微控制器输出引脚之一的第一个信号的波形。第一个信号用于产生第一个模拟信号。然后，微控制器从微控制器的输出引脚输出作为波形一部分的描绘信号。描绘信号表示波形中下一个信号的开始。然后，微控制器从其输出引脚输出第二个信号作为波形的一部分。第二信号用于产生第二模拟信号。该波形包括跟随着第二信号的描绘信号后面的第一信号。

10. 发明申请

US20080211487A1 APPARATUS, METHOD, AND COMPUTER PROGRAM PRODUCT FOR MONITORING AND CONTROLLING A MICROCOMPUTER USING A SINGLE EXISTING PIN 失效
标题翻译：装置，方法和计算机程序产品，用于使用一个现有的PIN来监控和控制微型计算机
公开(公告)号：US20080211487A1
公开(公告)日：2008-09-04
申请号：US12029913
申请日：2008-02-12
申请人： Robert Allan Faust
发明人： Robert Allan Faust
IPC分类号： G01R31/02
CPC分类号： H04L25/4902 , H04L5/1423 , H04L25/4906
摘要： A method, apparatus, and computer program product are disclosed for monitoring and controlling a device using only one input/output (I/O) communication pin of the device. The pin is configured to be used to both transmit and receive data. Logical ones are generated using pulses that are a first length and logical zeros are generated using pulses that are a second length. The device is communicated with utilizing the generated logical ones and generated logical zeros by transmitting the logical ones and zeros to the device, and receiving the logical ones and zeros from the device utilizing the single I/O pin.
摘要翻译：公开了用于仅使用该设备的一个输入/输出（I / O）通信引脚来监视和控制设备的方法，装置和计算机程序产品。引脚被配置为用于发送和接收数据。使用作为第一长度的脉冲生成逻辑1，并且使用作为第二长度的脉冲来生成逻辑0。通过将逻辑1和0发送到设备，并利用单个I / O引脚从设备接收逻辑1和0来传送利用生成的逻辑1和产生的逻辑0的设备。

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