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1. 发明授权

US07039692B2 Method and apparatus for maintaining profiles for terminals in a configurable data processing system 有权
公开(公告)号：US07039692B2
公开(公告)日：2006-05-02
申请号：US09798286
申请日：2001-03-01
申请人： Robert Kimberlin Foster , Walter Manfred Lipp , Charles Andrew McLaughlin , David R. Willoughby
发明人： Robert Kimberlin Foster , Walter Manfred Lipp , Charles Andrew McLaughlin , David R. Willoughby
IPC分类号： G06F15/177
CPC分类号： G06F9/5077
摘要： The present invention provides a method, apparatus, and computer implemented instructions for managing a set of objects for a plurality of terminals. The set of objects are stored in a memory, such as a nonvolatile random access memory in a data processing system. The set of objects are used to configure logical partitions within the data processing system. Access to the set of objects is provided to the plurality of terminals through a service processor.

2. 发明授权

US06883116B2 Method and apparatus for verifying hardware implementation of a processor architecture in a logically partitioned data processing system 失效
标题翻译：用于验证逻辑分区数据处理系统中的处理器架构的硬件实现的方法和装置
公开(公告)号：US06883116B2
公开(公告)日：2005-04-19
申请号：US09965000
申请日：2001-09-27
申请人： Van Hoa Lee , Charles Andrew McLaughlin , Stephen Joseph Schwinn
发明人： Van Hoa Lee , Charles Andrew McLaughlin , Stephen Joseph Schwinn
IPC分类号： G06F11/00 , G06F11/263 , G06F11/267 , H04L1/22
CPC分类号： G06F11/2236 , G06F11/263
摘要： A method, apparatus, and computer instructions for testing hardware in a data processing system having multiple partitions. A monitor process in a first partition assigned to a first processor is initialized. A random code generation process in a second partition associated with a second processor is initialized. The random code generation process generates instructions and executes the instructions to test the second processor. The monitor process monitors the random code generation process and resets the second processor if the random code generation process fails.
摘要翻译：一种用于在具有多个分区的数据处理系统中测试硬件的方法，装置和计算机指令。初始化分配给第一处理器的第一分区中的监视器进程。初始化与第二处理器相关联的第二分区中的随机代码生成处理。随机码产生过程产生指令并执行指令以测试第二处理器。监视进程监视随机码产生过程，如果随机码生成过程失败，则重置第二处理器。

3. 发明授权

US06832329B2 Cache thresholding method, apparatus, and program for predictive reporting of array bit line or driver failures 失效
标题翻译：用于阵列位线或驱动器故障预测报告的缓存阈值法，装置和程序
公开(公告)号：US06832329B2
公开(公告)日：2004-12-14
申请号：US09779365
申请日：2001-02-08
申请人： George Henry Ahrens , Alongkorn Kitamorn , Charles Andrew McLaughlin , Michael Thomas Vaden
发明人： George Henry Ahrens , Alongkorn Kitamorn , Charles Andrew McLaughlin , Michael Thomas Vaden
IPC分类号： G06F1100
CPC分类号： G06F11/0751 , G06F11/076
摘要： A mechanism is provided for predicting cache array bit line or driver failures. This mechanism checks for five consecutive errors at different addresses within the same syndrome on invocation of event scan polling to characterize the failure. Once the failure is characterized, it is reported to the system for corrective maintenance including dynamic and/or boot time processor deconfiguration or preventive processor replacement.
摘要翻译：提供了一种用于预测高速缓存阵列位线或驱动器故障的机制。该机制在事件扫描轮询调用的同一综合征中检查不同地址上的五个连续错误，以表征故障。一旦故障被表征，就向系统报告纠正性维护，包括动态和/或引导时间处理器解除配置或预防处理器更换。

4. 发明授权

US06308289B1 Method and system for environmental sensing and control within a computer system 失效
标题翻译：计算机系统内环境感知和控制的方法和系统
公开(公告)号：US06308289B1
公开(公告)日：2001-10-23
申请号：US09165161
申请日：1998-10-01
申请人： George Henry Ahrens , Mike Conrad Duron , Robert Allan Faust , Charles Andrew McLaughlin , Craig Henry Shempert , Kurt Paul Szabo
发明人： George Henry Ahrens , Mike Conrad Duron , Robert Allan Faust , Charles Andrew McLaughlin , Craig Henry Shempert , Kurt Paul Szabo
IPC分类号： G06F1100
CPC分类号： G06F11/3058 , G06F1/206 , G06F1/30
摘要： In accordance with the method and system of the present invention, a local processor utilizes registers arranged in a fault/mask/cache fashion for environmental control and sensing within a data processing system. The local processor continuously reads input data from a variety of environmental sensors in order to determine if a threshold level has been reached and a fault condition exists. Cache registers allow the local processor to store/pass detailed sensor information to system firmware within system processor(s). The local processor sets a fault bit within a fault register designed to cause an interrupt to the system level firmware if any of its bits are non-zero, indicating that a fault condition has occurred. A mask register is designed to allow the interaction of both the local processor and system processor(s) when an interrupt is being serviced and help keeps track of which interrupts are being serviced and which are yet to be serviced in the case of multiple interrupt sources. The system firmware will service the interrupt and set the mask bit. The action will signal the local processor that the system has acknowledged the interrupt and will take the appropriate action. The local processor may now post another fault, exactly like the first fault, by clearing the mask bit and causing a subsequent interrupt to the system. The fault, mask, cache, and both local and system processor(s) work together to provide a positive interlock for synchronizing their actions with each other.
摘要翻译：根据本发明的方法和系统，本地处理器利用以故障/掩码/高速缓存方式排列的用于数据处理系统内的环境控制和感测的寄存器。本地处理器连续读取来自各种环境传感器的输入数据，以确定是否达到阈值水平并且存在故障状况。缓存寄存器允许本地处理器将详细的传感器信息存储/传递到系统处理器内的系统固件。本地处理器在故障寄存器内设置一个故障位，用于在系统级固件中的任一位非零时引起中断，表示发生了故障状态。掩码寄存器被设计为允许本地处理器和系统处理器在中断被服务时的交互，并帮助记录在多个中断源的情况下跟踪哪些中断被服务以及哪些中断服务。系统固件将为中断服务并设置掩码位。该操作将通知本地处理器系统已经确认中断，并采取适当的措施。本地处理器现在可以通过清除掩码位并导致系统的后续中断来发布完全像第一个故障的另一个故障。故障，掩码，缓存以及本地和系统处理器一起工作，为彼此的动作同步提供了一个积极的互锁。

5. 发明授权

US06502208B1 Method and system for check stop error handling 失效
标题翻译：检查停止错误处理的方法和系统
公开(公告)号：US06502208B1
公开(公告)日：2002-12-31
申请号：US08829017
申请日：1997-03-31
申请人： Charles Andrew McLaughlin , Alongkorn Kitamorn
发明人： Charles Andrew McLaughlin , Alongkorn Kitamorn
IPC分类号： H02H305
CPC分类号： G06F11/0772 , G06F11/0787 , G06F11/0793 , G06F11/1417
摘要： Method and system aspects for check stop error handling are provided. A method aspect for check stop error handling in a computer system, the computer system comprising a plurality of components including a processor that supports an operating system and firmware, includes utilizing a service processor following a check stop error for error data retrieval and attempting a reboot of the computer system. The method further includes initiating firmware for failure reporting based on the error data retrieval when the reboot is successful.
摘要翻译：提供了检查停止错误处理的方法和系统方面。一种用于计算机系统中的检查停止错误处理的方法方面，所述计算机系统包括多个组件，所述多个组件包括支持操作系统和固件的处理器，所述计算机系统包括利用检查停止错误后的服务处理器进行错误数据检索并尝试重新启动的计算机系统。该方法还包括当重新引导成功时基于错误数据检索启动用于故障报告的固件。

6. 发明授权

US06233680B1 Method and system for boot-time deconfiguration of a processor in a symmetrical multi-processing system 失效
标题翻译：用于对称多处理系统中处理器引导时解体的方法和系统
公开(公告)号：US06233680B1
公开(公告)日：2001-05-15
申请号：US09165952
申请日：1998-10-02
申请人： Douglas Craig Bossen , Alongkorn Kitamorn , Charles Andrew McLaughlin
发明人： Douglas Craig Bossen , Alongkorn Kitamorn , Charles Andrew McLaughlin
IPC分类号： G06F15177
CPC分类号： G06F11/0772 , G06F11/0724 , G06F11/079 , G06F11/0793 , G06F15/177
摘要： A method and system for deconfiguring a CPU in a processing system is disclosed. In one aspect, a processing system is disclosed that comprises a central processing unit (CPU), and a memory coupled to the CPU. The error status register for capturing information concerning the status of the CPU. The processing system includes a service processor for gathering and analyzing status information from the CPU error register. The processing system also includes a nonvolatile device coupled to the service processor. The nonvolatile device includes a deconfiguration area. The deconfiguration area stores information concerning the status of the CPU from the service processor. The deconfiguration area also provides information for deconfiguring a CPU during a boot time of the processing system. Accordingly, through the present invention, CPU errors are detected during normal computer operations by error detection logic. This detection is utilized during any subsequent boot process by service processor firmware to deallocate the defective CPU. This is accomplished through the use of error status registers within the CPU and through the use of a deconfiguration area in the nonvolatile device which provides information directly to the service processor.
摘要翻译：公开了一种用于在处理系统中对CPU进行解配置的方法和系统。在一个方面，公开了一种包括中央处理单元（CPU）和耦合到CPU的存储器的处理系统。用于捕获有关CPU状态的信息的错误状态寄存器。处理系统包括用于从CPU错误寄存器收集和分析状态信息的服务处理器。处理系统还包括耦合到服务处理器的非易失性设备。非易失性器件包括解配置区域。解除配置区域从服务处理器存储关于CPU的状态的信息。解除配置区域还提供了在处理系统的引导时间期间对CPU进行解除配置的信息。因此，通过本发明，通过错误检测逻辑在通常的计算机操作期间检测到CPU错误。这种检测在服务处理器固件的任何后续启动过程中被利用以释放有缺陷的CPU。这是通过使用CPU内的错误状态寄存器并通过使用非易失性设备中的解配置区来实现的，该非配置区域直接向服务处理器提供信息。

7. 发明授权

US06223299B1 Enhanced error handling for I/O load/store operations to a PCI device via bad parity or zero byte enables 失效
标题翻译：通过坏的奇偶校验或零字节使I / O加载/存储操作到PCI设备的增强的错误处理能够实现
公开(公告)号：US06223299B1
公开(公告)日：2001-04-24
申请号：US09072418
申请日：1998-05-04
申请人： Douglas Craig Bossen , Charles Andrew McLaughlin , Danny Marvin Neal , James Otto Nicholson , Steven Mark Thurber
发明人： Douglas Craig Bossen , Charles Andrew McLaughlin , Danny Marvin Neal , James Otto Nicholson , Steven Mark Thurber
IPC分类号： G06F1100
CPC分类号： G06F11/0772 , G06F11/0745 , G06F11/0793
摘要： Device selects lines from each I/O device are brought into a PCI host bridge individually so that the device number of a failing device may be logged in an error register when an error is seen on the PCI bus. Until the error register is reset, subsequent load and store operations are delayed until the device number of the subject device may be checked against the error register. If the subject device is a previously failing device, the load/store operation to that device is prevented from completing, either by forcing bad parity or zeroing all byte enables. By forcing bad parity of zero byte enables, the I/O device will respond to the load or store request by activating its device select line, but will not accept store data. Operations to devices which are not logged in the error register are permitted to proceed normally, as are all load store operations when the error register is clear. Normal system operations are thus not impacted, and operations during error recovery are permitted to proceed if no further damage will be caused by such operations.
摘要翻译：设备选择每个I / O设备的线路分别插入PCI主机桥，以便在PCI总线上出现错误时，可能会将故障设备的设备号记录在错误寄存器中。在错误寄存器复位之前，后续的加载和存储操作将被延迟，直到可以针对错误寄存器检查主体设备的设备编号。如果主机设备是先前发生故障的设备，则通过强制坏的奇偶校验或归零所有字节使能来防止对该设备的加载/存储操作完成。通过强制零字节的不良奇偶使能，I / O设备将通过激活其设备选择行来响应加载或存储请求，但不接受存储数据。允许对未登录在错误寄存器中的设备进行操作，正常情况下，正常情况下进行加载存储操作。因此，正常的系统操作不会受到影响，并且如果这种操作不会造成进一步的损坏，则允许错误恢复期间的操作进行。

8. 发明授权

US06345369B1 Environmental and power error handling extension and analysis for systems with redundant components 有权
标题翻译：具有冗余组件的系统的环境和电源错误处理扩展和分析
公开(公告)号：US06345369B1
公开(公告)日：2002-02-05
申请号：US09190559
申请日：1998-11-12
申请人： Alongkorn Kitamorn , Charles Andrew McLaughlin , Kanisha Patel , Donald LeRoy Thorson
发明人： Alongkorn Kitamorn , Charles Andrew McLaughlin , Kanisha Patel , Donald LeRoy Thorson
IPC分类号： G06F1116
CPC分类号： G06F11/3058 , G06F11/2015 , G06F11/2268
摘要： Aspects for detecting environmental faults in redundant components of a computer system are described. In an exemplary method aspect, the method includes monitoring system environment conditions, including a status for redundant power supply and cooling components. The method further includes registering a failure condition with an appropriate error type when a monitored system environment condition exceeds a design threshold, and utilizing the registered failure condition as data in an architected error log.
摘要翻译：描述了用于检测计算机系统的冗余部件中的环境故障的方面。在示例性方法方面，该方法包括监视系统环境条件，包括冗余电源和冷却组件的状态。该方法还包括：当被监视的系统环境条件超过设计阈值时，使用适当的错误类型登记故障条件，并将登记的故障条件作为建筑错误日志中的数据。

9. 发明授权

US6119246A Error collection coordination for software-readable and non-software readable fault isolation registers in a computer system 失效
标题翻译：计算机系统中软件可读和非软件可读故障隔离寄存器的错误收集协调
公开(公告)号：US6119246A
公开(公告)日：2000-09-12
申请号：US829018
申请日：1997-03-31
申请人： Charles Andrew McLaughlin , Alongkorn Kitamorn , Sayileela Nulu
发明人： Charles Andrew McLaughlin , Alongkorn Kitamorn , Sayileela Nulu
IPC分类号： G06F11/00 , G06F11/273
CPC分类号： G06F11/2736 , G06F11/0775
摘要： The present invention provides method and system aspects for performing error data gathering from fault isolation registers of a computer system following a machine check occurrence. A method aspect includes utilizing firmware to perform failure information retrieval in software accessible registers and initiating a service processor (SP) for failure data retrieval in non-software accessible registers. The method further includes coordinating the combination of the failure information retrieved and the failure data retrieved in an error log for use in isolation of a fault source in the computer system.
摘要翻译：本发明提供了用于在机器检查发生之后从计算机系统的故障隔离寄存器执行错误数据采集的方法和系统方面。方法方面包括利用固件在软件可访问寄存器中执行故障信息检索，并启动用于非软件可访问寄存器中的故障数据检索的服务处理器（SP）。该方法还包括协调所检索的故障信息和在错误日志中检索的故障数据的组合，以用于隔离计算机系统中的故障源。

10. 发明授权

US5951686A Method and system for reboot recovery 失效
标题翻译：重新启动恢复的方法和系统
公开(公告)号：US5951686A
公开(公告)日：1999-09-14
申请号：US829089
申请日：1997-03-31
申请人： Charles Andrew McLaughlin , Alongkorn Kitamorn , Chet Mehta , John Steven Langford
发明人： Charles Andrew McLaughlin , Alongkorn Kitamorn , Chet Mehta , John Steven Langford
IPC分类号： G06F11/14 , G06F9/445
CPC分类号： G06F11/1417
摘要： A computer system with reboot capability includes a processing mechanism, the processing mechanism supporting an operating system. The system further includes a service processor coupled to the processing mechanism, the service processor determining whether a reboot operation is needed. In addition, the computer system includes a memory mechanism coupled to the processing mechanism and the service processor, the memory mechanism storing a plurality of platform policy parameters and an automatic restart policy of the operating system to support the reboot operation of the service processor.
摘要翻译：具有重启功能的计算机系统包括处理机构，支持操作系统的处理机构。该系统还包括耦合到处理机构的服务处理器，服务处理器确定是否需要重启操作。此外，计算机系统包括耦合到处理机构和服务处理器的存储器机构，存储机构存储多个平台策略参数和操作系统的自动重启策略，以支持服务处理器的重新启动操作。

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