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1. 发明授权

US5360758A Self-aligned buried strap for trench type DRAM cells 失效
标题翻译：用于沟槽型DRAM单元的自对准埋地带
公开(公告)号：US5360758A
公开(公告)日：1994-11-01
申请号：US161823
申请日：1993-12-03
申请人： Gary B. Bronner , John K. DeBrosse , Donald M. Kenney
发明人： Gary B. Bronner , John K. DeBrosse , Donald M. Kenney
IPC分类号： H01L21/76 , H01L21/8242 , H01L27/10 , H01L27/108 , H01L21/70 , H01L27/00
CPC分类号： H01L27/10829
摘要： A deep trench type DRAM cell with shallow trench isolation has a buried polysilicon strap that is defined without the use of a separate mask by depositing the strap material over at least the deep trench before shallow trench definition and using the shallow trench isolation mask to overlap partially the deep trench, thereby defining the strap during the process of cutting the shallow trench.
摘要翻译：具有浅沟槽隔离的深沟槽型DRAM单元具有掩埋多晶硅带，其被限定为不使用单独的掩模，通过在浅沟槽清晰度之前在至少深沟槽上沉积带材料并且使用浅沟槽隔离掩模部分地重叠深沟槽，从而在切割浅沟槽的过程中限定带子。

2. 发明授权

US5525531A SOI DRAM with field-shield isolation 失效
标题翻译：具有场屏蔽隔离的SOI DRAM
公开(公告)号：US5525531A
公开(公告)日：1996-06-11
申请号：US461815
申请日：1995-06-05
申请人： Gary B. Bronner , John K. DeBrosse , Jack A. Mandelman
发明人： Gary B. Bronner , John K. DeBrosse , Jack A. Mandelman
IPC分类号： H01L21/8242 , H01L27/108 , H01L27/12 , H01L29/786
CPC分类号： H01L27/10829 , H01L27/1203
摘要： An SOI deep-trench DRAM having body contacts and field shield isolation makes contact between the SOI device layer and a buried conductive layer below the insulating layer at selected sites between adjacent deep trench capacitors. The buried layer may be biased to provide better attraction for holes.
摘要翻译：具有体接触和场屏蔽隔离的SOI深沟槽DRAM在相邻的深沟槽电容器之间的选定位置处与SOI器件层和绝缘层下方的掩埋导电层之间接触。掩埋层可能被偏置以为孔提供更好的吸引力。

3. 发明授权

US5508219A SOI DRAM with field-shield isolation and body contact 失效
标题翻译： SOI DRAM具有屏蔽隔离和机身接触
公开(公告)号：US5508219A
公开(公告)日：1996-04-16
申请号：US461958
申请日：1995-06-05
申请人： Gary B. Bronner , John K. DeBrosse , Jack A. Mandelman
发明人： Gary B. Bronner , John K. DeBrosse , Jack A. Mandelman
IPC分类号： H01L27/108 , H01L21/8242 , H01L27/12
CPC分类号： H01L27/10861 , H01L27/1203
摘要： An SOI deep-trench DRAM having body contacts and field shield isolation makes contact between the SOI device layer and the field shield layer at selected sites between adjacent deep trench capacitors. The field shield layer is biased negative to provide better isolation and to set the body potential of the array transistors.
摘要翻译：具有体接触和场屏蔽隔离的SOI深沟槽DRAM在相邻的深沟槽电容器之间的选定位置处与SOI器件层和场屏蔽层之间接触。场屏蔽层被偏置为负极以提供更好的隔离并且设置阵列晶体管的体电位。

4. 发明授权

US5606188A Fabrication process and structure for a contacted-body silicon-on-insulator dynamic random access memory 失效
标题翻译：接触体上绝缘体上的动态随机存取存储器的制造工艺和结构
公开(公告)号：US5606188A
公开(公告)日：1997-02-25
申请号：US428968
申请日：1995-04-26
申请人： Gary B. Bronner , John K. DeBrosse , Jack A. Mandelman
发明人： Gary B. Bronner , John K. DeBrosse , Jack A. Mandelman
IPC分类号： H01L27/108 , H01L27/12 , H01L27/01 , H01L29/76
CPC分类号： H01L27/1203 , H01L27/10832
摘要： An SOI DRAM includes a direct body contact between the SOI layer and the silicon substrate, and field-shield isolation positioned on the surface of the SOI structure which extends over the direct body contact. Deep trench storage capacitors are positioned adjacent the direct body contact.
摘要翻译： SOI DRAM包括SOI层和硅衬底之间的直接体接触，以及位于SOI结构的表面上的场屏蔽隔离物，其在直接体接触上延伸。深沟槽存储电容器定位在直接身体接触附近。

5. 发明授权

US08456901B2 Spin-torque transfer magneto-resistive memory architecture 失效
标题翻译：自旋扭矩传递磁阻存储器架构
公开(公告)号：US08456901B2
公开(公告)日：2013-06-04
申请号：US13559672
申请日：2012-07-27
申请人： John K. DeBrosse , Yutaka Nakamura
发明人： John K. DeBrosse , Yutaka Nakamura
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , Y10S977/935
摘要： A system includes a processor and a memory array connected to the processor comprising a first memory cell comprising a first magnetic tunnel junction device having a first terminal connected to a first bit line and a second terminal, and a first field effect transistor having a source terminal connected to a second bit line, a gate terminal connected to a word line, and a drain terminal connected to the second terminal of the first magnetic tunnel junction device, and a second memory cell comprising a second magnetic tunnel junction device having a first terminal connected to a third bit line and a second terminal, and a second field effect transistor having a source terminal connected to the second bit line, a gate terminal connected to the word line, and a drain terminal connected to the second terminal of the second magnetic tunnel junction device.
摘要翻译：一种系统包括处理器和连接到处理器的存储器阵列，该存储器阵列包括第一存储器单元，该第一存储器单元包括具有连接到第一位线的第一端子和第二端子的第一磁性隧道结器件，以及具有源极端子的第一场效应晶体管连接到第二位线，连接到字线的栅极端子和连接到第一磁性隧道结装置的第二端子的漏极端子，以及包括第二磁性隧道结装置的第二存储单元，第二磁性隧道结装置具有第一端子连接至第三位线和第二端子，以及第二场效应晶体管，其源极端子连接到第二位线，连接到字线的栅极端子和连接到第二磁通道的第二端子的漏极端子连接装置。

6. 发明授权

US08023305B2 High density planar magnetic domain wall memory apparatus 有权
标题翻译：高密度平面磁畴壁存储装置
公开(公告)号：US08023305B2
公开(公告)日：2011-09-20
申请号：US12136091
申请日：2008-06-10
申请人： Michael C. Gaidis , Lawrence A. Clevenger , Timothy J. Dalton , John K. DeBrosse , Louis L. C. Hsu , Carl Radens , Keith Kwong-Hon Wong , Chih-Chao Yang
发明人： Michael C. Gaidis , Lawrence A. Clevenger , Timothy J. Dalton , John K. DeBrosse , Louis L. C. Hsu , Carl Radens , Keith Kwong-Hon Wong , Chih-Chao Yang
IPC分类号： G11C19/02 , G11C19/08
CPC分类号： G11C19/0841 , B82Y10/00 , G11C5/02 , G11C11/161 , G11C11/1675 , Y10T29/53165
摘要： A magnetic domain wall memory apparatus with write/read capability includes a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location; a magnetic read element associated with each of the shift register structures; and a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a single write wire having a longitudinal axis substantially orthogonal to a longitudinal axis of each of the coplanar shift register structures.
摘要翻译：具有写入/读取功能的磁畴壁存储装置包括多个共面移位寄存器结构，每个包括由其中具有多个磁畴的铁磁材料形成的细长轨道，移位寄存器结构还具有多个不连续性，以便于域墙位置; 与每个移位寄存器结构相关联的磁读取元件; 以及与所述移位寄存器结构中的每一个相关联的磁写元件，所述磁写入元件还包括单个写入线，所述单个写入线的纵轴基本上与所述共面移位寄存器结构中的每一个的纵向轴线正交。

7. 发明申请

US20110173513A1 REFERENCE CELLS FOR SPIN TORQUE BASED MEMORY DEVICE 失效
标题翻译：基于旋转扭矩的记忆装置的参考电池
公开(公告)号：US20110173513A1
公开(公告)日：2011-07-14
申请号：US12684486
申请日：2010-01-08
申请人： John K. DeBrosse , Daniel C. Worledge
发明人： John K. DeBrosse , Daniel C. Worledge
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： G06F11/1048 , H03M13/13
摘要： A method of reading and correcting data within a memory device that includes reading each data bit of a data word using a plurality of reference cells corresponding to each data bit, performing error detection on the read data bits, and correcting a read data bit when an error is detected using error correction code (ECC) and writing each corresponding reference cells to an original memory state thereof.
摘要翻译：一种读取和校正存储器件内的数据的方法，包括使用对应于每个数据位的多个参考单元读取数据字的每个数据位，对读取的数据位执行错误检测，以及当读取数据位时使用纠错码（ECC）检测错误，并将每个对应的参考单元写入其原始存储器状态。

8. 发明申请

US20080239784A1 HIGH DENSITY PLANAR MAGNETIC DOMAIN WALL MEMORY APPARATUS 有权
标题翻译：高密度平面磁畴壁记忆装置
公开(公告)号：US20080239784A1
公开(公告)日：2008-10-02
申请号：US12136091
申请日：2008-06-10
申请人： Michael C. Gaidis , Lawrence A. Clevenger , Timothy J. Dalton , John K. DeBrosse , Louis L.C. Hsu , Carl Radens , Keith Kwong Hon Wong , Chih-Chao Yang
发明人： Michael C. Gaidis , Lawrence A. Clevenger , Timothy J. Dalton , John K. DeBrosse , Louis L.C. Hsu , Carl Radens , Keith Kwong Hon Wong , Chih-Chao Yang
IPC分类号： G11C19/00 , G11C11/00 , G11C7/00
CPC分类号： G11C19/0841 , B82Y10/00 , G11C5/02 , G11C11/161 , G11C11/1675 , Y10T29/53165
摘要： A magnetic domain wall memory apparatus with write/read capability includes a plurality of coplanar shift register structures each comprising an elongated track formed from a ferromagnetic material having a plurality of magnetic domains therein, the shift register structures further having a plurality of discontinuities therein to facilitate domain wall location; a magnetic read element associated with each of the shift register structures; and a magnetic write element associated with each of the shift register structures, the magnetic write element further comprising a single write wire having a longitudinal axis substantially orthogonal to a longitudinal axis of each of the coplanar shift register structures.
摘要翻译：具有写入/读取功能的磁畴壁存储装置包括多个共面移位寄存器结构，每个包括由其中具有多个磁畴的铁磁材料形成的细长轨道，移位寄存器结构还具有多个不连续性，以便于域墙位置; 与每个移位寄存器结构相关联的磁读取元件; 以及与所述移位寄存器结构中的每一个相关联的磁写元件，所述磁写入元件还包括单个写入线，所述单个写入线的纵轴基本上与所述共面移位寄存器结构中的每一个的纵向轴线正交。

9. 发明申请

US20080175043A1 METHOD AND APPARATUS FOR INITIALIZING REFERENCE CELLS OF A TOGGLE SWITCHED MRAM DEVICE 失效
标题翻译：用于初始化切换MRAM器件的参考电池的方法和装置
公开(公告)号：US20080175043A1
公开(公告)日：2008-07-24
申请号：US11624707
申请日：2007-01-19
申请人： John K. DeBrosse , Mark C. H. Lamorey
发明人： John K. DeBrosse , Mark C. H. Lamorey
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C7/14 , G11C11/16 , G11C2207/2254
摘要： A method of determining an initial state of a reference cell in a fabricated memory array includes performing a first read operation of the reference cell by comparing current through the reference cell with the average current passing through a pair of data cells, and storing the result of the first read operation; inverting the value of one of the pair of the data cells; performing a second read operation of the reference cell, and storing the result of the second read operation; inverting the value of the other of the pair of the data cells; performing a third read operation of the reference cell, and storing the result of the third read operation. A majority compare operation of the results of the first, second and third operations is performed, wherein the result of the majority compare operation is the initial state of the reference cell.
摘要翻译：确定制造的存储器阵列中的参考单元的初始状态的方法包括通过将通过参考单元的电流与通过一对数据单元的平均电流进行比较来执行参考单元的第一读取操作，并且存储第一次读取操作; 反转一对数据单元之一的值; 执行参考单元的第二读取操作，并存储第二读取操作的结果; 反转一对数据单元中的另一个的值; 执行参考单元的第三读取操作，并存储第三读取操作的结果。执行第一，第二和第三操作的结果的多数比较操作，其中多数比较操作的结果是参考单元的初始状态。

10. 发明授权

US07102916B2 Method and structure for selecting anisotropy axis angle of MRAM device for reduced power consumption 失效
标题翻译：用于选择MRAM器件的各向异性轴角度以降低功耗的方法和结构
公开(公告)号：US07102916B2
公开(公告)日：2006-09-05
申请号：US10710281
申请日：2004-06-30
申请人： Philip L. Trouilloud , David W. Abraham , John K. DeBrosse , Daniel Worledge
发明人： Philip L. Trouilloud , David W. Abraham , John K. DeBrosse , Daniel Worledge
IPC分类号： G11C11/00
CPC分类号： G11C11/16
摘要： A method for determining a desired anisotropy axis angle for a magnetic random access memory (MRAM) device includes selecting a plurality of initial values for the anisotropy axis angle and determining, for each selected initial value, a minimum thickness for at least one ferromagnetic layer of the MRAM device. The minimum thickness corresponds to a predefined activation energy of an individual cell within the MRAM device. For each selected value, a minimum applied magnetic field value in a wordline direction and a bitline direction of the MRAM device is also determined so as maintain the predefined activation energy. For each selected value, an applied power per bit value is calculated, wherein the desired anisotropy axis angle is the selected anisotropy axis angle corresponding to a minimum power per bit value.
摘要翻译：一种用于确定磁性随机存取存储器（MRAM）装置的期望的各向异性轴角的方法包括：为各向异性轴角选择多个初始值，并为每个所选择的初始值确定至少一个铁磁层的最小厚度 MRAM设备。最小厚度对应于MRAM设备内单个单元的预定激活能。对于每个选择的值，还确定MRAM装置的字线方向和位线方向上的最小施加磁场值，以便维持预定的激活能量。对于每个选择的值，计算每位值的施加功率，其中期望的各向异性轴角是对应于每位值的最小功率的所选各向异性轴角。

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