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1. 发明授权

US06999366B2 Magnetic memory including a sense result category between logic states 有权
标题翻译：磁存储器包括逻辑状态之间的感测结果类别
公开(公告)号：US06999366B2
公开(公告)日：2006-02-14
申请号：US10727273
申请日：2003-12-03
申请人： Frederick A. Perner , Jonathan Jedwab , James A. Davis , David McIntyre , David Banks , Stewart Wyatt , Kenneth K. Smith
发明人： Frederick A. Perner , Jonathan Jedwab , James A. Davis , David McIntyre , David Banks , Stewart Wyatt , Kenneth K. Smith
IPC分类号： G11C7/02
CPC分类号： G11C11/16 , G11C29/02 , G11C29/026 , G11C29/028
摘要： Embodiments of the present invention provide a magnetic memory. In one embodiment, the magnetic memory comprises an array of memory cells configured to provide resistive states, and a read circuit. The read circuit is configured to sense a resistance through a memory cell in the array of memory cells to obtain a sense result and categorize the sense result into one of at least three different categories comprising a middle category situated between the resistive states.
摘要翻译：本发明的实施例提供一种磁存储器。在一个实施例中，磁存储器包括被配置为提供电阻状态的存储器单元的阵列和读取电路。读取电路被配置为感测通过存储器单元阵列中的存储器单元的电阻以获得感测结果，并将感测结果分类为包括位于电阻状态之间的中间类别的至少三个不同类别中的一个。

2. 发明授权

US07149948B2 Manufacturing test for a fault tolerant magnetoresistive solid-state storage device 有权
标题翻译：一种容错磁阻固态存储装置的制造试验
公开(公告)号：US07149948B2
公开(公告)日：2006-12-12
申请号：US09997199
申请日：2001-11-28
申请人： James A. Davis , Jonathan Jedwab , Stephen Morley , Kenneth Graham Paterson , Frederick A. Perner , Kenneth K. Smith , Stewart R. Wyatt
发明人： James A. Davis , Jonathan Jedwab , Stephen Morley , Kenneth Graham Paterson , Frederick A. Perner , Kenneth K. Smith , Stewart R. Wyatt
IPC分类号： G11C29/00
CPC分类号： G11C11/16
摘要： A fault-tolerant magnetoresistive solid-state storage device (MRAM) in use performs error correction coding and decoding of stored information, to tolerate physical defects. At manufacture, the MRAN device is tested to confirm that each set of storage cells is suitable for storing ECC encoded data, using either a parametric evaluation (step 602), or a logical evaluation (step 603) or preferably a combination of both. Failed cells are identified and a count is formed, suitably in terms of ECC symbols 206 that would be affected by such failed cells (step 604). The count can be compared to a threshold (step 605) to determine suitability of the accessed storage cells and a decision made (step 606) on whether to continue with use of those cells, or whether to take remedial action.
摘要翻译：使用的容错磁阻固态存储装置（MRAM）对所存储的信息进行纠错编码和解码，以容忍物理缺陷。在制造时，使用参数评估（步骤602）或逻辑评估（步骤603）或优选两者的组合来测试MRAN设备以确认每组存储单元适合于存储ECC编码数据。识别失败的单元并且适当地根据将被这种故障单元影响的ECC符号206形成计数（步骤604）。可以将计数与阈值进行比较（步骤605）以确定所访问的存储单元的适合性以及对是否继续使用这些单元或者是否采取补救动作的决定（步骤606）。

3. 发明申请

US20050122767A1 Memory device 有权
标题翻译：内存设备
公开(公告)号：US20050122767A1
公开(公告)日：2005-06-09
申请号：US10727273
申请日：2003-12-03
申请人： Frederick Perner , Jonathan Jedwab , James Davis , David McIntyre , David Banks , Stewart Wyatt , Kenneth Smith
发明人： Frederick Perner , Jonathan Jedwab , James Davis , David McIntyre , David Banks , Stewart Wyatt , Kenneth Smith
IPC分类号： G11C7/04 , G11C11/00 , G11C11/02 , G11C11/15 , G11C29/00 , G11C29/02 , G11C29/04 , G11C29/44 , H01L21/8246 , H01L27/105 , H01L43/08
CPC分类号： G11C11/16 , G11C29/02 , G11C29/026 , G11C29/028
摘要： Embodiments of the present invention provide a magnetic memory. In one embodiment, the magnetic memory comprises an array of memory cells configured to provide resistive states, and a read circuit. The read circuit is configured to sense a resistance through a memory cell in the array of memory cells to obtain a sense result and categorize the sense result into one of at least three different categories comprising a middle category situated between the resistive states.
摘要翻译：本发明的实施例提供一种磁存储器。在一个实施例中，磁存储器包括被配置为提供电阻状态的存储器单元的阵列和读取电路。读取电路被配置为感测通过存储器单元阵列中的存储器单元的电阻以获得感测结果，并将感测结果分类为包括位于电阻状态之间的中间类别的至少三个不同类别中的一个。

4. 发明授权

US07036068B2 Error correction coding and decoding in a solid-state storage device 有权
标题翻译：固态存储装置中的纠错编码和解码
公开(公告)号：US07036068B2
公开(公告)日：2006-04-25
申请号：US09915194
申请日：2001-07-25
申请人： James Andrew Davis , Jonathan Jedwab , David H. McIntyre , Kenneth Graham Paterson , Frederick A Perner , Gadiel Seroussi , Kenneth K Smith , Stewart R. Wyatt
发明人： James Andrew Davis , Jonathan Jedwab , David H. McIntyre , Kenneth Graham Paterson , Frederick A Perner , Gadiel Seroussi , Kenneth K Smith , Stewart R. Wyatt
IPC分类号： G11C29/00
CPC分类号： G06F11/1008
摘要： A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. In a read operation, parametric values are obtained from storage cells 16 of the device and compared to ranges to establish logical bit values, together with erasure information. The erasure information identifies symbols 206 in a block of ECC encoded data 204 which, from the parametric evaluation, are suspected to be affected by physical failures of the storage cells 16. Where the position of suspected failed symbols 206 is known from this erasure information, the ability of a decoder 22 to perform ECC decoding is substantially enhanced.
摘要翻译：磁阻固态存储装置（MRAM）采用纠错编码（ECC）来形成ECC编码的存储数据。在读操作中，从设备的存储单元16获得参数值，并与与擦除信息一起建立逻辑位值的范围进行比较。擦除信息识别ECC编码数据204的块中的符号206，其从参数评估被怀疑受到存储单元16的物理故障的影响。在从该擦除信息中知道可疑故障符号206的位置的情况下，解码器22执行ECC解码的能力被显着提高。

5. 发明授权

US06981196B2 Data storage method for use in a magnetoresistive solid-state storage device 有权
标题翻译：用于磁阻固态存储装置的数据存储方法
公开(公告)号：US06981196B2
公开(公告)日：2005-12-27
申请号：US09915195
申请日：2001-07-25
申请人： James A Davis , Jonathan Jedwab , Kenneth Graham Paterson , Gadiel Seroussi , Kenneth K Smith
发明人： James A Davis , Jonathan Jedwab , Kenneth Graham Paterson , Gadiel Seroussi , Kenneth K Smith
IPC分类号： G11C11/15 , G06F11/10 , G11C29/00 , G11C29/42
CPC分类号： G06F11/1008
摘要： A magnetoresistive solid-state storage device (MRAM) performs error correction coding (ECC) of stored information. Since currently available MRAM devices are subject to physical failures, data storage arrangements are described to minimize the affect of those failures on the stored ECC encoded data, including storing all bits of each symbol in storage cells 16 in one row 12 (FIG. 3), or in at least two rows 12 but using storage cells 16 in the same columns 14 (FIG. 4). Sets of bits taken from each row 12 are allocated to different codewords 204 (FIG. 5) and the order of allocation can be rotated (FIG. 6). A second level of error checking can be applied by adding a parity bit 226 to each symbol 206 (FIG. 7).
摘要翻译：磁阻固态存储装置（MRAM）执行存储信息的纠错编码（ECC）。由于目前可用的MRAM设备受到物理故障的影响，所以描述了数据存储装置，以最小化这些故障对存储的ECC编码数据的影响，包括将每个符号的所有位存储在一行12（图3）中的存储单元16中，，或者在至少两行12中，但是使用相同列14（图4）中的存储单元16。从每行12获取的位的集合被分配给不同的码字204（图5），并且可以旋转分配顺序（图6）。可以通过向每个符号206（图7）添加奇偶校验位226来应用第二级错误检查。

6. 发明授权

US07418644B2 System for error correction coding and decoding 有权
标题翻译：纠错编码和解码系统
公开(公告)号：US07418644B2
公开(公告)日：2008-08-26
申请号：US10790360
申请日：2004-03-01
申请人： Kenneth Kay Smith , Jonathan Jedwab , James A. Davis , David Banks , Stewart R. Wyatt
发明人： Kenneth Kay Smith , Jonathan Jedwab , James A. Davis , David Banks , Stewart R. Wyatt
IPC分类号： H03M13/29
CPC分类号： H03M13/3761 , H03M13/09 , H03M13/1515 , H03M13/19 , H03M13/23 , H03M13/3707
摘要： A system for error correction coding and decoding information is disclosed. In one embodiment, the first and second encoders are each configured to encode the information, wherein the second encoder has a higher capability than the first encoder. First and second decoders are configured to recover the information, wherein the second decoder recovers the information encoded by the second encoder only if the first decoder cannot recover the information.
摘要翻译：公开了一种用于纠错编码和解码信息的系统。在一个实施例中，第一和第二编码器各自被配置为对信息进行编码，其中第二编码器具有比第一编码器更高的能力。第一和第二解码器被配置为恢复信息，其中第二解码器仅在第一解码器不能恢复信息时才恢复由第二编码器编码的信息。

7. 发明授权

US06717874B1 Systems and methods for reducing the effect of noise while reading data in series from memory 有权
标题翻译：从内存中串联读取数据的同时降低噪声影响的系统和方法
公开(公告)号：US06717874B1
公开(公告)日：2004-04-06
申请号：US10218892
申请日：2002-08-14
申请人： Frederick A. Perner , David H. McIntyre , Jonathan Jedwab , Anthony P. Holden
发明人： Frederick A. Perner , David H. McIntyre , Jonathan Jedwab , Anthony P. Holden
IPC分类号： G11C702
CPC分类号： G11C7/06 , G11C7/1006
摘要： Systems and methods for reducing the effect of noise while reading data in series from memory, are provided. One system embodiment comprises a memory cell that stores a first data; a sensing device that receives the first data multiple times and provides a first set of outputs; and a voting system that evaluates the first set of outputs to determine whether one of the outputs of the first set is valid data from the memory cell. One method embodiment comprises reading data in series that is stored in a memory cell to provide outputs; and evaluating the outputs to determine whether one of the outputs is valid data from the memory cell.
摘要翻译：提供了用于在从存储器中串行读取数据时降低噪声影响的系统和方法。一个系统实施例包括存储第一数据的存储器单元; 感测装置，其多次接收第一数据并提供第一组输出; 以及投票系统，其评估所述第一组输出以确定所述第一组的输出中的一个是来自所述存储器单元的有效数据。一种方法实施例包括读取存储在存储单元中以提供输出的串联数据; 以及评估所述输出以确定所述输出中的一个是来自所述存储器单元的有效数据。

8. 发明授权

US07278086B2 Identifying uncorrectable codewords in a Reed-Solomon decoder for errors and erasures 失效
标题翻译：在Reed-Solomon解码器中识别不可纠正的码字以进行错误和擦除
公开(公告)号：US07278086B2
公开(公告)日：2007-10-02
申请号：US10632123
申请日：2003-07-30
申请人： David Murray Banks , Jonathan Jedwab , James A Davis
发明人： David Murray Banks , Jonathan Jedwab , James A Davis
IPC分类号： H03M13/00
CPC分类号： H03M13/1585 , H03M13/15 , H03M13/1515 , H03M13/157 , H03M13/1575
摘要： A method and apparatus for identifying uncorrectable Reed-Solomon codewords in the presence of Reed-Solomon codewords which may have errors and erasures and otherwise be correctable.
摘要翻译：用于在存在Reed-Solomon码字的情况下识别不可校正Reed-Solomon码字的方法和装置，其可能具有错误和擦除，并且否则可被校正。

9. 发明申请

US20060174181A1 Identifying uncorrectable codewords in a Reed-Solomon decoder for errors and erasures 失效
标题翻译：在Reed-Solomon解码器中识别不可纠正的码字以进行错误和擦除
公开(公告)号：US20060174181A1
公开(公告)日：2006-08-03
申请号：US10632123
申请日：2003-07-30
申请人： David Banks , Jonathan Jedwab , James Davis
发明人： David Banks , Jonathan Jedwab , James Davis
IPC分类号： H03M13/00
CPC分类号： H03M13/1585 , H03M13/15 , H03M13/1515 , H03M13/157 , H03M13/1575
摘要： In a Reed-Solomon decoder handling both errors and erasures, an uncorrectable codeword is identified when any one or more of six conditions (a) to (f) is satisfied: (a) no solution to key equation σ(x)T(x)≡(x)modx2T; (b) degσ(x)≠nerrors; (c) error and erasure locations coincide; (d) deg ω(x)≧nerrors+nerasures; (e) nerasures+2*nerrors>2T; and (f) an error location has a zero correction magnitude. Nerrors and nerasures represent, respectively, a number of errors and erasures, with respect to an error locator polynomial σ(x) and an erasure locator polynomial Λ(x), 2T is the strength of a Reed-Solomon code, ω(x) is an errata evaluator polynomial, and T(x) is a modified syndrome polynomial. A detector circuit 300 comprises a logic unit 350 which tests for the conditions (a) to (g), and an indicator unit 360 which provides a corresponding output.
摘要翻译：在处理错误和擦除两者的Reed-Solomon解码器中，当满足六个条件（a）至（f）中的任何一个或多个时，识别出不可校正的码字：（a）对密钥方程sigma（x）T（x ）≡（x）modx 2T = nerrors + nerasures; （e）nalsures + 2 * nerrors> 2T; 和（f）误差位置具有零校正量值。相对于误差定位多项式σ（x）和擦除定位多项式λ（x），误差和误差分别表示许多误差和擦除，2T是Reed-Solomon码的强度，ω（x）是勘误评估多项式，T（x）是修正的校正子多项式。检测器电路300包括测试条件（a）至（g）的逻辑单元350以及提供相应输出的指示器单元360。

10. 发明申请

US20050172179A1 System and method for configuring a solid-state storage device with error correction coding 有权
标题翻译：用于配置具有纠错编码的固态存储设备的系统和方法
公开(公告)号：US20050172179A1
公开(公告)日：2005-08-04
申请号：US10767188
申请日：2004-01-29
申请人： Sarah Brandenberger , Terrel Munden , Jonathan Jedwab , James Davis , David Banks
发明人： Sarah Brandenberger , Terrel Munden , Jonathan Jedwab , James Davis , David Banks
IPC分类号： G06F12/16 , G06F11/10 , G11C29/00 , H03M13/15
CPC分类号： G06F11/1012 , G11C2029/0409
摘要： A system for configuring solid-state storage devices comprises a solid-state storage device and an error correction code (ECC) selection system. The ECC selection system is configured to automatically select a set of error correction code based on an error rate of the storage device. The ECC selection system is further configured to install the selected set of error correction code in the solid-state storage device.
摘要翻译：用于配置固态存储设备的系统包括固态存储设备和纠错码（ECC）选择系统。 ECC选择系统被配置为基于存储设备的错误率自动选择一组纠错码。 ECC选择系统还被配置为将所选择的纠错码组安装在固态存储设备中。

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