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1. 发明授权

US5831409A Electric vehicle propulsion system employing AC induction motor control 失效
标题翻译：采用交流感应电动机控制的电动汽车推进系统
公开(公告)号：US5831409A
公开(公告)日：1998-11-03
申请号：US808354
申请日：1997-02-28
申请人： Frank A. Lindberg , David L. Schantz, Jr. , Brian H. Smith , Charles S. Kerfoot , Joseph J. Springer , Patricia A. O'Donnell , James H. DeOms , Ronnie L. Starling , Michael J. Ankrom , James L. Munro , Geoffrey B. Lansberry , Beth A. Herman , William B. Hall , Marshall G. Jones , William B. Winkel , Brian A. DeAbreu , Thomas C. Underwood , Todd M. Zaranski , Aaron D. Valdivia , Richard M. Young , Frank E. Altoz , Ngon B. Nguyen , Eric L. Mohler
发明人： Frank A. Lindberg , David L. Schantz, Jr. , Brian H. Smith , Charles S. Kerfoot , Joseph J. Springer , Patricia A. O'Donnell , James H. DeOms , Ronnie L. Starling , Michael J. Ankrom , James L. Munro , Geoffrey B. Lansberry , Beth A. Herman , William B. Hall , Marshall G. Jones , William B. Winkel , Brian A. DeAbreu , Thomas C. Underwood , Todd M. Zaranski , Aaron D. Valdivia , Richard M. Young , Frank E. Altoz , Ngon B. Nguyen , Eric L. Mohler
IPC分类号： B60L11/18 , H05K7/20 , H02H7/122
CPC分类号： H05K7/20927 , B60L1/003 , B60L1/02 , B60L11/1803 , B60L11/1861 , B60L11/1868 , B60L15/025 , B60L15/2009 , B60L3/003 , B60L3/0061 , B60L3/0069 , B60L7/14 , B60L2210/10 , B60L2210/30 , B60L2210/46 , B60L2220/12 , B60L2240/12 , B60L2240/34 , B60L2240/36 , B60L2240/421 , B60L2240/423 , B60L2240/547 , B60L2240/549 , B60L2270/147 , Y02T10/643 , Y02T10/7005 , Y02T10/7044 , Y02T10/7066 , Y02T10/7216 , Y02T10/7241 , Y02T10/7275
摘要： An electric vehicle propulsion system having a motor with first and second electrically isolated windings and a system control unit for controlling the motor, wherein the system control unit includes a first power bridge for driving the first windings and a second power bridge for driving the second windings.
摘要翻译：一种具有具有第一和第二电隔离绕组的电动机的电动车辆推进系统和用于控制所述电动机的系统控制单元，其中所述系统控制单元包括用于驱动所述第一绕组的第一电力桥和用于驱动所述第二绕组的第二电力桥。

2. 发明授权

US5504378A Direct cooled switching module for electric vehicle propulsion system 失效
标题翻译：电动车推进系统的直接冷却开关模块
公开(公告)号：US5504378A
公开(公告)日：1996-04-02
申请号：US258027
申请日：1994-06-10
申请人： Frank A. Lindberg , Richard M. Young , William B. Hall , Frank E. Altoz , Ngon B. Nguyen
发明人： Frank A. Lindberg , Richard M. Young , William B. Hall , Frank E. Altoz , Ngon B. Nguyen
IPC分类号： H02M7/00 , H05K5/00 , H05K7/20
CPC分类号： H05K7/20927 , H02M7/003 , H01L2224/48091 , H01L2224/48227 , H01L2224/49109 , H01L2924/01004 , H01L2924/1305 , H01L2924/13055 , H01L2924/1627 , H01L2924/19041 , H01L2924/30107
摘要： An apparatus for cooling a switching circuit for an electric vehicle, wherein the switching circuit has at least two switching elements connected in series, includes first and second heat sinks, each having two thermally-conductive planar members forming a passage therebetween for channeling cooling fluid, an inlet port in communication with the passage, and an outlet port in communication with the passage, and a substrate for mounting at least one switching element to each of the first and second heat sinks. An ac terminal connects the switching element attached to the first heat sink in series with the switching element attached to the second heat sink, and inlet and outlet manifolds, coupled to the inlet and outlet ports of the first and second heat sinks, circulate cooling fluid through the passages of the first and second heat sinks to cool the switching elements.
摘要翻译：一种用于冷却电动车辆的开关电路的装置，其中开关电路具有串联连接的至少两个开关元件，包括第一和第二散热器，每个具有两个导热平面构件，在其间形成用于引导冷却流体的通道，与通道连通的入口端口和与通道连通的出口端口以及用于将至少一个开关元件安装到第一和第二散热器中的每一个的基板。交流端子将附接到第一散热器的开关元件与附接到第二散热器的开关元件串联连接，并且连接到第一和第二散热器的入口和出口的入口和出口歧管使冷却流体通过第一和第二散热器的通道来冷却开关元件。

3. 发明授权

US5175397A Integrated circuit chip package 失效
标题翻译：集成电路芯片封装
公开(公告)号：US5175397A
公开(公告)日：1992-12-29
申请号：US632688
申请日：1990-12-24
申请人： Frank A. Lindberg
发明人： Frank A. Lindberg
IPC分类号： H01L23/498 , H01L23/50 , H01L23/58
CPC分类号： H01L22/32 , H01L23/49838 , H01L23/50 , H01L2224/45124 , H01L2224/45144 , H01L2224/48227 , H01L24/45 , H01L24/48 , H01L2924/01079 , H01L2924/01322 , H01L2924/12042 , H01L2924/14 , H01L2924/16152 , H01L2924/30107
摘要： A hermetically sealed package for one or more integrated circuit chips that is made of three metal, thick-film layers, and one dielectric, thick-film layer to form a mounting surface for the chip. The first applied metal layer includes the power plane, and the fan-out leads including power and ground leads. The dielectric layer overlays the power plane and includes an annular rectangle overlaying a portion of all the leads of the first layer and an outer boundary strip overlaying extreme ends of the leads. The second screened metallic layer serves as the ground plane, and electrically engages the ground leads of the first metallic layer and the extreme outer ends of the signal leads. A third metallic layer includes a metallic sealing ring on the annular portion of the dielectric layer spaced from the perimeter of the power and ground planes and a plurality of spaced test probe pads overlaying the boundary strip in electrical contact with the first metallic layer, and an optional pad of metal in the central chip mount area. The power and ground leads are provided in the same layer which permits them to be closely spaced without shorting due to misregistration. The grounded metallic sealing ring minimizes capacitive coupling between the outwardly extending leads.
摘要翻译：用于一个或多个由三个金属，厚膜层和一个电介质厚膜层制成的集成电路芯片的密封封装，以形成芯片的安装表面。第一个施加的金属层包括电源平面，并且扇出引线包括电源和接地引线。电介质层覆盖电源平面并且包括覆盖第一层的所有引线的一部分的环形矩形和覆盖引线的末端的外边界条。第二屏蔽金属层用作接地平面，并且电接合第一金属层的接地引线和信号引线的极端外端。第三金属层包括在与电源和接地平面的周边隔开的电介质层的环形部分上的金属密封环以及覆盖与第一金属层电接触的边界条带的多个间隔的测试探针焊盘，以及可选的金属垫在中央芯片安装区域。电源和接地引线设置在相同的层中，这允许它们紧密间隔，而不会由于配准失调而短路。接地的金属密封环最小化了向外延伸引线之间的电容耦合。

4. 发明授权

US4411719A Apparatus and method for tape bonding and testing of integrated circuit chips 失效
标题翻译：用于集成电路芯片的绑带和测试的装置和方法
公开(公告)号：US4411719A
公开(公告)日：1983-10-25
申请号：US263962
申请日：1981-05-14
申请人： Frank A. Lindberg
发明人： Frank A. Lindberg
IPC分类号： G01R31/28 , H01L21/48 , H01L21/66 , H01L23/495 , H01L23/58 , G01R31/02 , G01R31/22
CPC分类号： H01L22/32 , G01R31/2886 , H01L21/4828 , H01L21/4839 , H01L22/00 , H01L23/49572 , H01L24/50 , H01L2924/01322 , H01L2924/1306 , H01L2924/14 , H01L2924/3011 , Y10T29/49121
摘要： A metallic lead frame strip, method of manufacturing same, a test tape, a method of testing together with the art work for same is disclosed. The method of manufacturing includes a method for producing art work that provides for accuracy in etching both sides of the lead frame strip simultaneously and permits a highly accurate positioning of the bonding bumps of at least one integral bonding bump for each lead and also discloses leads having a plurality of bonding bumps for connecting electrically common portions of a chip to be tested. Also, the use of registration aids are disclosed which allow lead bumps to be registered to chip pads even though the bumps cannot be seen in the alignment step. The testing of the chip also includes a method and double-layer test strip that may be used repeatedly for testing successively larger chips having an increasing number of individual leads.
摘要翻译：公开了一种金属引线框带，其制造方法，测试带，与本技术相结合的测试方法。制造方法包括一种用于制造艺术作品的方法，其提供同时蚀刻引线框架条的两侧的精度，并且允许针对每个引线的至少一个整体焊接凸块的焊接凸块的高精度定位，并且还公开了具有用于连接待测试芯片的电气公共部分的多个接合凸块。此外，公开了使用配准辅助装置，即使在对准步骤中看不到凸块，也可以将引线凸块注册到芯片焊盘。该芯片的测试还包括一种方法和双层测试条，可以重复使用以测试具有越来越多的单个引线的连续更大的芯片。

5. 发明授权

US4730232A High density microelectronic packaging module for high speed chips 失效
标题翻译：用于高速芯片的高密度微电子封装模块
公开(公告)号：US4730232A
公开(公告)日：1988-03-08
申请号：US878102
申请日：1986-06-25
申请人： Frank A. Lindberg
发明人： Frank A. Lindberg
IPC分类号： H01L23/52 , H01L23/02 , H01L23/538 , H01L25/065 , H01L25/10 , H05K1/14 , H05K7/14 , H02B1/00 , H05K7/20
CPC分类号： H05K7/1461 , H01L25/0652 , H01L25/105 , H05K1/144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2924/01079 , H01L2924/16152 , H01L2924/1627 , H01L2924/19041
摘要： A high density, multi-chip module applicable to VHSIC technology utilizing individually hermetically sealed microelectronic chip packages operable to be pretested, breadboarded and burned in prior to final module assembly. This microelectronic module comprises a multiplicity of interconnected chips in a high density fully heat sinked configuration, resulting in high clock speed and low power dissipation. This module further facilitates a short design cycle because no dedicated hard tooling is required. A packaging density is achieved which is about two and one-half times greater than the density achieved utilizing surface mounted leaded chip carriers with leads on 20 mil centers. This is because the packages are reduced in size after testing. This density increase results in a chip-to-chip line capacitance approximately half of conventional packaging due to the fact that the path lengths across the ceramic packages and across the P.C. board are reduced.
摘要翻译：适用于VHSIC技术的高密度多芯片模块，其利用单独的密封微电子芯片封装，其可操作以在最终模块组装之前被预先测试，面包板和燃烧。该微电子模块包括多个高密度完全散热配置的互连芯片，导致高时钟速度和低功耗。该模块进一步简化了设计周期，因为不需要专门的硬工具。实现了一种封装密度，该密度比使用20 mil中心引线的表面贴装引线芯片载体所达到的密度大约两倍半。这是因为测试后包装尺寸减小了。这种密度增加导致芯片到芯片的线电容大约是常规封装的一半，这是由于陶瓷封装和穿过陶瓷封装的路径长度的事实。董事会减少。

6. 发明授权

US4605833A Lead bonding of integrated circuit chips 失效
标题翻译：集成电路芯片的引线键合
公开(公告)号：US4605833A
公开(公告)日：1986-08-12
申请号：US589912
申请日：1984-03-15
申请人： Frank A. Lindberg
发明人： Frank A. Lindberg
IPC分类号： H01L21/60 , B23K20/02 , H01L21/603 , B23K31/00
CPC分类号： H01L24/80 , B23K20/023 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/14
摘要： A method and apparatus for bonding a plurality of metallic leads to pads of a chip where the force of a thermode, which is placed in contact with the chip is increased at a first rate to a maximum force less than required to effect the bonding over a time period required to bring the metallic leads and pads close to bonding temperature, and then increasing the uniform force at a rate greater than the first rate to a force sufficient to effect the bonding. The apparatus includes a chip holder arrangement that is mounted to automatically align to the plane of the bonding thermode to provide for uniform deformities to the bump portions of the bond.
摘要翻译：一种用于将多个金属引线接合到芯片的焊盘的方法和装置，其中与芯片接触放置的热电极的力以第一速率增加到最小的力量，该最大力小于通过使金属引线和焊盘接近接合温度所需的时间段，然后以大于第一速率的速率将均匀的力增加到足以实现接合的力。该装置包括芯片保持器装置，该芯片保持器装置被安装成自动对准接合热电偶的平面，以提供对接合凸起部分的均匀变形。

7. 发明授权

US6016007A Power electronics cooling apparatus 失效
标题翻译：电力电子冷却装置
公开(公告)号：US6016007A
公开(公告)日：2000-01-18
申请号：US206242
申请日：1998-10-16
申请人： Philip Albert Sanger , Frank A. Lindberg , Walter Garcen
发明人： Philip Albert Sanger , Frank A. Lindberg , Walter Garcen
IPC分类号： H01L23/473 , H01L23/34
CPC分类号： H01L23/473 , H01L2224/0603 , H01L2224/48091 , H01L2224/48137 , H01L2224/48139 , H01L2224/48227 , H01L2224/48472 , H01L2224/49111 , H01L2224/49113 , H01L2224/49175 , H01L2924/1305 , H01L2924/13055 , H01L2924/19105
摘要： A semiconductor cooling arrangement wherein a semiconductor is affixed to a thermally and electrically conducting carrier such as by brazing. The coefficient of thermal expansion of the semiconductor and carrier are closely matched to one another so that during operation they will not be overstressed mechanically due to thermal cycling. Electrical connection is made to the semiconductor and carrier, and a porous metal heat exchanger is thermally connected to the carrier. The heat exchanger is positioned within an electrically insulating cooling assembly having cooling oil flowing therethrough. The arrangement is particularly well adapted for the cooling of high power switching elements in a power bridge.
摘要翻译：半导体冷却装置，其中半导体例如通过钎焊固定到导热和导电的载体上。半导体和载体的热膨胀系数彼此紧密地匹配，使得在操作期间，由于热循环，它们不会被机械过度应力。电连接到半导体和载体上，多孔金属热交换器与载体热连接。热交换器位于具有流过其中的冷却油的电绝缘冷却组件内。该装置特别适用于电力桥中的大功率开关元件的冷却。

8. 发明授权

US4022641A Method for making beam leads for ceramic substrates 失效
标题翻译：制造陶瓷基板用光束引线的方法
公开(公告)号：US4022641A
公开(公告)日：1977-05-10
申请号：US673339
申请日：1976-04-02
申请人： Frank A. Lindberg
发明人： Frank A. Lindberg
IPC分类号： H01L21/48 , H01L21/60 , H01L21/607 , H05K1/03 , H05K3/40 , C23F1/02
CPC分类号： H01L24/80 , H01L21/4846 , H05K3/4092 , H01L2924/01006 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01082 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H05K1/0306 , Y10T29/49121
摘要： A method for making beam leads for use in the interconnecting of electronicevices and packages. A first metal is deposited onto a substrate which has poor adhesion with the substrate. A portion of the deposited metal is then etched away leaving on said substrate deposited metal at locations where a second metal is not to adhere to the substrate. Then depositing onto said substrate and over said first deposited metal a plurality of beam leads of a second metal. Then lifting said portions of said first metal from said substrate and then etching away said first metal to provide beam leads partially attached to said substrate.
摘要翻译：一种用于在电子设备和封装的互连中使用的用于制造光束引线的方法。将第一金属沉积在与基底具有差的粘附性的基底上。然后将一部分沉积的金属蚀刻掉，留下在第二金属不粘附到基底的位置上留下所述基底沉积的金属。然后在所述衬底上并在所述第一沉积金属上沉积多个第二金属的光束引线。然后从所述衬底提起所述第一金属的所述部分，然后蚀刻掉所述第一金属，以提供部分地附接到所述衬底的光束引线。

9. 发明授权

US4760335A Large scale integrated circuit test system 失效
标题翻译：大规模集成电路测试系统
公开(公告)号：US4760335A
公开(公告)日：1988-07-26
申请号：US760386
申请日：1985-07-30
申请人： Frank A. Lindberg
发明人： Frank A. Lindberg
IPC分类号： G01R1/04 , H05K7/10 , H01R13/62 , G01R31/26
CPC分类号： H05K7/1023 , G01R1/0408 , H01R12/714
摘要： A large scale integrated circuit package and test assembly wherein a chip is mounted on an insulating package substrate, and the package substrate is easily demountably connectable on a circuit test board. An alignment and electrical connector member bridges between the substrate conductors and the printed circuit board conductors. An elastomeric member is aligned over the alignment and electrical connector and compressed by a cover plate to make the electrical connection between the substrate and the printed circuit board. A plurality of such circuit package can be mounted upon a large area test board, and each of the individual circuit packages can be tested during system analysis.
摘要翻译：一种大规模集成电路封装和测试组件，其中芯片安装在绝缘封装衬底上，并且封装衬底容易可拆卸地连接在电路测试板上。对准和电连接器构件在衬底导体和印刷电路板导体之间桥接。弹性体构件对齐在对准和电连接器上并由盖板压缩以使得基板和印刷电路板之间的电连接。可以在大面积测试板上安装多个这样的电路封装，并且可以在系统分析期间测试每个单独的电路封装。

10. 发明授权

US4308339A Method for manufacturing tape including lead frames 失效
标题翻译：用于制造包括引线框的胶带的方法
公开(公告)号：US4308339A
公开(公告)日：1981-12-29
申请号：US119247
申请日：1980-02-07
申请人： Frank A. Lindberg
发明人： Frank A. Lindberg
IPC分类号： H01L21/48 , H01L21/60 , H01L21/66 , H01L23/495 , H01L23/50 , H01L23/58 , C23F1/02
CPC分类号： H01L22/32 , H01L21/4828 , H01L21/4839 , H01L22/00 , H01L23/49572 , H01L24/50 , H01L2924/01322 , H01L2924/1306 , H01L2924/14 , H01L2924/3011
摘要： A metallic lead frame strip, method of manufacturing same, a test tape, a method of testing together with the art work for same is disclosed. The method of manufacturing includes a method for producing art work that provides for accuracy in etching both sides of the lead frame strip simultaneously and permits a highly accurate positioning of the bonding bumps of at least one integral bonding bump for each lead and also discloses leads having a plurality of bonding bumps for connecting electrically common portions of a chip to be tested. Also, the use of registration aids are disclosed which allow lead bumps to be registered to chip pads even though the bumps cannot be seen in the alignment step. The testing of the chip also includes a method and double-layer test strip that may be used repeatedly for testing successively larger chips having an increasing number of individual leads.
摘要翻译：公开了一种金属引线框带，其制造方法，测试带，与本技术相结合的测试方法。制造方法包括一种用于制造艺术作品的方法，其提供同时蚀刻引线框架条的两侧的精度，并且允许针对每个引线的至少一个整体焊接凸块的焊接凸块的高精度定位，并且还公开了具有用于连接待测试芯片的电气公共部分的多个接合凸块。此外，公开了使用配准辅助装置，即使在对准步骤中看不到凸块，也可以将引线凸块注册到芯片焊盘。该芯片的测试还包括一种方法和双层测试条，可以重复使用以测试具有越来越多的单个引线的连续更大的芯片。

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