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    • 2. 发明授权
    • Circuit for converting a voltage range of a logic signal
    • 用于转换逻辑信号的电压范围的电路
    • US07629909B1
    • 2009-12-08
    • US11836628
    • 2007-08-09
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. Jamal
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. Jamal
    • H03M1/00
    • H03K19/00361H03K17/162H03M1/742
    • In a circuit to convert a voltage range of a control signal, a first switch selectively couples, based on the control signal, an output node to a first reference voltage when the output node is to be in a first state. A second switch selectively establishes, based on the control signal, a second reference voltage when the output node is to be in a second state, the second state being a logical complement of the first state. A feedback control loop is coupled to the output node to maintain the second reference voltage in response to voltage fluctuation at the output node. The feedback control loop includes a current mirror and a transistor coupled to the current mirror. The transistor is controlled by feedback from the output node to modify a biasing current established by the current mirror to thereby counteract the voltage fluctuation.
    • 在转换控制信号的电压范围的电路中,当输出节点处于第一状态时,第一开关基于控制信号将输出节点选择性地耦合到第一参考电压。 当输出节点处于第二状态时,第二开关基于控制信号选择性地建立第二参考电压,第二状态是第一状态的逻辑补码。 反馈控制回路耦合到输出节点以响应于输出节点处的电压波动来维持第二参考电压。 反馈控制回路包括电流镜和耦合到电流镜的晶体管。 晶体管通过来自输出节点的反馈来控制,以修改由电流镜所建立的偏置电流,从而抵消电压波动。
    • 3. 发明授权
    • Circuit for converting a voltage range of a logic signal
    • 用于转换逻辑信号的电压范围的电路
    • US07609186B1
    • 2009-10-27
    • US11836584
    • 2007-08-09
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. Jamal
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. Jamal
    • H03K19/094
    • H03K19/018528
    • In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second transistor selectively discharges the output node toward a second reference voltage via a resistor when the output node is to transition from the first state to a second state, the second state being a logical complement of the first state. A source-follower circuit has a source follower output coupled to the output node and has a dynamic current source, the dynamic current source having a control input coupled to the resistor. A third transistor selectively couples the source follower output to the dynamic current source when the output node is to be in the second state.
    • 在将具有第一范围的第一逻辑信号转换成具有第二范围的第二逻辑信号的电路中,当输出节点处于第一状态时,第一晶体管选择性地将输出节点耦合到第一参考电压。 当输出节点要从第一状态转变到第二状态时,第二晶体管通过电阻器选择性地将输出节点放电到第二参考电压,第二状态是第一状态的逻辑补码。 源跟随器电路具有耦合到输出节点并具有动态电流源的源极跟随器输出,动态电流源具有耦合到电阻器的控制输入。 当输出节点处于第二状态时,第三晶体管选择性地将源极跟随器输出耦合到动态电流源。
    • 4. 发明授权
    • Circuit for converting a voltage range of a logic signal
    • 用于转换逻辑信号的电压范围的电路
    • US07605608B1
    • 2009-10-20
    • US11836571
    • 2007-08-09
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. Jamal
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. Jamal
    • H03K19/094
    • H03K19/018521H03M1/742
    • In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second MOS transistor selectively discharges the output node toward a second reference voltage when the output node is to transition from the first state to a second state, the second state a logical complement of the first state. An output of a source-follower circuit, having a current source, is coupled to the output node. A third MOS transistor selectively couples the current source of the source-follower circuit to the second reference voltage when the output node is to be in the second state.
    • 在将具有第一范围的第一逻辑信号转换为具有第二范围的第二逻辑信号的电路中,当输出节点将处于该状态时,第一金属氧化物半导体(MOS)晶体管选择性地将输出节点耦合到第一参考电压 第一个状态 当输出节点从第一状态转变到第二状态时,第二MOS晶体管选择性地将输出节点放电到第二参考电压,第二状态是第一状态的逻辑补码。 具有电流源的源跟随器电路的输出耦合到输出节点。 当输出节点处于第二状态时,第三MOS晶体管将源极跟随器电路的电流源选择性地耦合到第二参考电压。
    • 6. 发明授权
    • Circuit for converting a voltage range of a logic signal
    • 用于转换逻辑信号的电压范围的电路
    • US07511649B1
    • 2009-03-31
    • US11846292
    • 2007-08-28
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. JamalStefano Marchesi
    • Francesco RezziNicola GhittoriGiovanni Antonio CesuraShafiq M. JamalStefano Marchesi
    • H03M1/66
    • H03K17/6871H03K3/35613
    • In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second MOS transistor has a source coupled to the output node and a gate coupled to a bias voltage. A current source circuit selectively biases the second MOS transistor to act as part of a source-follower circuit when the output node is to be in a second state. Additionally, a memory circuit has an input coupled to the output node, and an output. The memory circuit is configured to temporarily store a Boolean value of the output node when the output node transitions from the first state to the second state. Further, a discharging circuit is coupled to the output node and a second reference voltage. The discharging circuit is configured to temporarily provide a discharging path between the output node and the second reference voltage when the output node is transitioning from the first state to the second state. The discharging circuit has a first input coupled to the output of the memory circuit and a second input coupled to a control signal. The control signal indicates that the output node is to transition from the first state to the second state.
    • 在将具有第一范围的第一逻辑信号转换为具有第二范围的第二逻辑信号的电路中,当输出节点将处于该状态时,第一金属氧化物半导体(MOS)晶体管选择性地将输出节点耦合到第一参考电压 第一个状态 第二MOS晶体管具有耦合到输出节点的源极和耦合到偏置电压的栅极。 当输出节点处于第二状态时,电流源电路选择性地偏压第二MOS晶体管,以充当源跟随器电路的一部分。 另外,存储器电路具有耦合到输出节点的输入和输出。 存储器电路被配置为当输出节点从第一状态转换到第二状态时临时存储输出节点的布尔值。 此外,放电电路耦合到输出节点和第二参考电压。 放电电路被配置为当输出节点从第一状态转变到第二状态时临时提供输出节点与第二参考电压之间的放电路径。 放电电路具有耦合到存储器电路的输出的第一输入和耦合到控制信号的第二输入。 控制信号表示输出节点要从第一状态转换到第二状态。