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    • 3. 发明申请
    • METHOD FOR FORMING A DEEP TRENCH CAPACITOR BURIED PLATE
    • 形成深层电容电容板的方法
    • US20050059207A1
    • 2005-03-17
    • US10605234
    • 2003-09-17
    • Chih-Han ChangHsin-Jung HoChang-Rong WuChien-Jung Sun
    • Chih-Han ChangHsin-Jung HoChang-Rong WuChien-Jung Sun
    • H01L21/20H01L21/8242
    • H01L27/1087
    • A method for forming a deep trench capacitor buried plate. A substrate having a pad oxide and a pad nitride is provided. A deep trench is formed in the substrate. A doped silicate film is deposited on a sidewall of the deep trench. A sacrificial layer is deposited in the deep trench, and etched back to expose parts of the doped silicate film. Then, an etching process is performed to remove the exposed doped silicate film and parts of the pad oxide for forming a recess. The sacrificial layer is removed. A silicon nitride layer is deposited to fill the recess and to cover the doped silicate film. Finally, a thermal oxidation process is performed to form a doped ion region. The silicon nitride layer is removed. The doped silicate film is removed.
    • 一种形成深沟槽电容器掩埋板的方法。 提供具有衬垫氧化物和衬垫氮化物的衬底。 在衬底中形成深沟槽。 掺杂的硅酸盐膜沉积在深沟槽的侧壁上。 牺牲层沉积在深沟槽中,并被回蚀以暴露部分掺杂的硅酸盐膜。 然后,进行蚀刻处理以去除暴露的掺杂硅酸盐膜和用于形成凹槽的衬垫氧化物的一部分。 牺牲层被去除。 沉积氮化硅层以填充凹部并覆盖掺杂的硅酸盐膜。 最后,进行热氧化工艺以形成掺杂的离子区域。 去除氮化硅层。 去除掺杂的硅酸盐膜。
    • 4. 发明授权
    • Method of fabricating a DRAM cell capacitor
    • 制造DRAM单元电容器的方法
    • US06537872B1
    • 2003-03-25
    • US10126094
    • 2002-04-19
    • Li-Wu TsaoChih-Han Chang
    • Li-Wu TsaoChih-Han Chang
    • H01L218242
    • H01L27/1087H01L27/10864H01L28/84
    • A method of fabricating a capacitor of a DRAM cell. First, an insulating layer is formed on the semiconductor substrate at the top portion of the trench. Afterward, a seed layer on the ringed insulating layer and the semiconductor substrate at the bottom portion of the trench. A photoresist is coated in the trench at the bottom portion. Next, the seed layer is partially removed to expose the ringed insulating layer while the photoresist is used as the shield. The photoresist is then removed to expose the remaining seed layer at the bottom portion. A hemispherical silicon grain layer is deposited from the remaining seed layer on the semiconductor substrate. Ions are doped the hemispherical silicon grain layer and the semiconductor substrate so as to create a doped area to serve as the lower electrode of the capacitor.
    • 一种制造DRAM单元的电容器的方法。 首先,在沟槽顶部的半导体衬底上形成绝缘层。 之后,环状绝缘层上的种子层和沟槽底部的半导体衬底。 在底部的沟槽中涂覆有光致抗蚀剂。 接下来,种子层被部分地去除以暴露环状绝缘层,同时使用光致抗蚀剂作为屏蔽。 然后去除光致抗蚀剂以在底部露出剩余的种子层。 从半导体衬底上的剩余种子层沉积半球状硅晶粒层。 离子掺杂半球形硅晶粒层和半导体衬底,以便产生用作电容器的下电极的掺杂区域。
    • 5. 发明授权
    • Dual-damascene process with porous low-K dielectric material
    • 双镶嵌工艺与多孔低K电介质材料
    • US06365506B1
    • 2002-04-02
    • US09859762
    • 2001-05-17
    • Chih-Han ChangHsin-Chuan Tsai
    • Chih-Han ChangHsin-Chuan Tsai
    • H01L214763
    • H01L21/76811H01L21/76813H01L21/7682
    • This invention relates to a dual damascene process with porous low-k dielectric material. A first insulating layer is formed on a porous low-k dielectric layer. The first insulating layer has a first pattern for defining a first opening in the low-k dielectric layer. Also, the invention includes the step of forming a second insulating layer on the first insulating layer. Both the first insulating layer and the second insulating layer are used as a hard mask, the two insulating layers being of different materials. The second insulating layer has a second pattern for defining a second opening in the low-k dielectric layer. Then, at least one etch is performed to form a dual damascene structure in the porous low-k dielectric layer by the different insulating layers which cause different protection time in etching the porous low-k dielectric layer.
    • 本发明涉及具有多孔低k电介质材料的双镶嵌工艺。 在多孔低k电介质层上形成第一绝缘层。 第一绝缘层具有用于限定低k电介质层中的第一开口的第一图案。 此外,本发明包括在第一绝缘层上形成第二绝缘层的步骤。 第一绝缘层和第二绝缘层都用作硬掩模,两个绝缘层是不同的材料。 第二绝缘层具有用于限定低k电介质层中的第二开口的第二图案。 然后,通过不同的绝缘层在多孔低k电介质层中进行至少一次蚀刻以形成多孔低k电介质层中的双镶嵌结构,这在蚀刻多孔低k电介质层时引起不同的保护时间。
    • 8. 发明授权
    • Method for forming a deep trench capacitor buried plate
    • 形成深沟槽电容器掩埋板的方法
    • US07232718B2
    • 2007-06-19
    • US10605234
    • 2003-09-17
    • Chih-Han ChangHsin-Jung HoChang-Rong WuChien-Jung Sun
    • Chih-Han ChangHsin-Jung HoChang-Rong WuChien-Jung Sun
    • H01L21/8242
    • H01L27/1087
    • A method for forming a deep trench capacitor buried plate. A substrate having a pad oxide and a pad nitride is provided. A deep trench is formed in the substrate. A doped silicate film is deposited on a sidewall of the deep trench. A sacrificial layer is deposited in the deep trench, and etched back to expose parts of the doped silicate film. Then, an etching process is performed to remove the exposed doped silicate film and parts of the pad oxide for forming a recess. The sacrificial layer is removed. A silicon nitride layer is deposited to fill the recess and to cover the doped silicate film. Finally, a thermal oxidation process is performed to form a doped ion region. The silicon nitride layer is removed. The doped silicate film is removed.
    • 一种形成深沟槽电容器掩埋板的方法。 提供具有衬垫氧化物和衬垫氮化物的衬底。 在衬底中形成深沟槽。 掺杂的硅酸盐膜沉积在深沟槽的侧壁上。 牺牲层沉积在深沟槽中,并被回蚀以暴露部分掺杂的硅酸盐膜。 然后,进行蚀刻处理以去除暴露的掺杂硅酸盐膜和用于形成凹槽的衬垫氧化物的一部分。 牺牲层被去除。 沉积氮化硅层以填充凹部并覆盖掺杂的硅酸盐膜。 最后,进行热氧化工艺以形成掺杂的离子区域。 去除氮化硅层。 去除掺杂的硅酸盐膜。