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1. 发明授权

US07560802B2 Electrical connections in substrates 有权
标题翻译：基板电气连接
公开(公告)号：US07560802B2
公开(公告)日：2009-07-14
申请号：US10550199
申请日：2004-03-22
申请人： Edvard Kälvesten , Thorbjörn Ebefors , Niklas Svedin , Pelle Rangsten , Tommy Schönberg
发明人： Edvard Kälvesten , Thorbjörn Ebefors , Niklas Svedin , Pelle Rangsten , Tommy Schönberg
IPC分类号： H01L29/40 , H01L23/52 , H01L23/48 , H01L23/488 , H01L23/485
CPC分类号： B81B7/0006 , H01L21/76898 , H01L23/481 , H01L2224/05573 , H01L2224/13025 , H01L2224/131 , H01L2924/00014 , H01L2924/1461 , H01L2924/014 , H01L2924/00 , H01L2224/05599
摘要： A method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate includes creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of the substrate, defined by the trench. Also described is a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, including a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through the substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and includes the same material as the substrate, i.e. it is made from the wafer material.
摘要翻译：在导电或半导体衬底的第一（顶部）和第二（底部）表面之间形成电连接的方法包括在第一表面中形成沟槽，以及建立绝缘外壳，其将衬底的一部分完全分开，由沟槽限定。还描述了可用作制造微电子和/或微机械装置的起始衬底的产品，包括半导体或导电材料的平坦衬底，并且具有第一和第二表面以及至少一个延伸穿过基底的导电构件。导电构件通过绝缘材料的有限层与平坦基板的周围材料绝缘，并且包括与基板相同的材料，即由晶片材料制成。

2. 发明授权

US08729713B2 Via structure and method thereof 有权
标题翻译：其结构及其方法
公开(公告)号：US08729713B2
公开(公告)日：2014-05-20
申请号：US13193313
申请日：2011-07-28
申请人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin
发明人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin
IPC分类号： H01L23/48 , H01L27/14 , H01L21/30
CPC分类号： G02B26/0841 , B81B7/0006 , B81B2201/042 , B81B2203/04 , B81B2207/096 , G02B26/101
摘要： A vent hole precursor structure (26) in an intermediate product for a semi-conductor device has delicate structures (27, 28), and said intermediate product has a cavity (21) with a pressure therein differing from the pressure of the surroundings. The intermediate product comprises a first wafer (20) in which there is formed a depression (21). The first wafer is bonded to a second wafer (22) comprising a device layer (23) from which the structures (27, 28) are to be made by etching. A hole or groove (26) having a predefined depth extends downwards into the device layer, such that the cavity (21) during etching is opened up before the etching procedure breaks through the device layer (23) to form the structures (27, 28).
摘要翻译：用于半导体器件的中间产品中的通气孔前体结构（26）具有精细的结构（27,28），并且所述中间产品具有其中不同于周围压力的压力的空腔（21）。中间产品包括其中形成有凹部（21）的第一晶片（20）。第一晶片被结合到包括器件层（23）的第二晶片（22）上，通过蚀刻从该器件层（23）制造结构（27,28）。具有预定深度的孔或凹槽（26）向下延伸到装置层中，使得蚀刻过程中的空腔（21）在蚀刻过程突破穿过器件层（23）之前被打开以形成结构（27,28 ）。

3. 发明授权

US08592981B2 Via structure and method thereof 有权
标题翻译：其结构及其方法
公开(公告)号：US08592981B2
公开(公告)日：2013-11-26
申请号：US13141609
申请日：2009-12-23
申请人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Ågren , Niklas Svedin
发明人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Ågren , Niklas Svedin
IPC分类号： H01L29/40
CPC分类号： G02B26/0833 , B81B7/0006 , B81B7/007 , B81B2207/092 , B81B2207/095 , G02B6/3518 , G02B6/3584 , G02B26/0841 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
摘要翻译：本发明涉及分层的微电子和/或微机械结构，其包括在导电层之间具有绝缘层的至少三个交替的导电层。还提供了在第一外层中的通孔，所述通孔包括由穿过该层的晶片天然材料制成的绝缘导电连接，在第一外层中延伸穿过其它层并进入所述通孔的导电插塞，以便提供通过层的导电性，以及围绕所述其它层的至少一个所选层的所述导电插塞的绝缘外壳，用于使所述插塞与所述选定层中的材料绝缘。它还涉及微电子和/或微机械装置，其包括设置在空腔上方的可动构件，使得其可在至少一个方向上移动。该装置具有根据本发明的分层结构。还提供了制造这种分层MEMS结构的方法。

4. 发明申请

US20120018898A1 VIA STRUCTURE AND METHOD THEREOF 有权
标题翻译：通过其结构和方法
公开(公告)号：US20120018898A1
公开(公告)日：2012-01-26
申请号：US13141609
申请日：2009-12-23
申请人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin
发明人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin
IPC分类号： H01L23/498 , H01L21/762 , H01L21/768
CPC分类号： G02B26/0833 , B81B7/0006 , B81B7/007 , B81B2207/092 , B81B2207/095 , G02B6/3518 , G02B6/3584 , G02B26/0841 , H01L21/76898 , H01L23/481 , H01L2924/0002 , H01L2924/00012 , H01L2924/00
摘要： The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
摘要翻译：本发明涉及分层的微电子和/或微机械结构，其包括在导电层之间具有绝缘层的至少三个交替的导电层。还提供了在第一外层中的通孔，所述通孔包括由穿过该层的晶片天然材料制成的绝缘导电连接，在第一外层中延伸穿过其它层并进入所述通孔的导电插塞，以便提供通过层的导电性，以及围绕所述其它层的至少一个所选层的所述导电插塞的绝缘外壳，用于使所述插塞与所述选定层中的材料绝缘。它还涉及微电子和/或微机械装置，其包括设置在空腔上方的可动构件，使得其可在至少一个方向上移动。该装置具有根据本发明的分层结构。还提供了制造这种分层MEMS结构的方法。

5. 发明授权

US07172911B2 Deflectable microstructure and method of manufacturing the same through bonding of wafers 有权
标题翻译：可偏转的微结构及其制造方法通过晶片的结合
公开(公告)号：US07172911B2
公开(公告)日：2007-02-06
申请号：US10504714
申请日：2003-02-14
申请人： Edvard Kälvesten , Thorbjörn Ebefors , Niklas Svedin , H{dot over (a)}kan Westin
发明人： Edvard Kälvesten , Thorbjörn Ebefors , Niklas Svedin , H{dot over (a)}kan Westin
IPC分类号： H01L21/00
CPC分类号： B81C1/0015 , B81B2201/042 , B81C1/00142 , B81C3/002 , B81C2201/019 , B81C2201/0191 , B81C2203/058
摘要： A method of making a deflectable, free hanging micro structure having at least one hinge member, the method includes the steps of providing a first sacrificial wafer having a single crystalline material constituting material forming the micro structure. A second semiconductor wafer including necessary components for forming the structure in cooperation with the first wafer is provided. Finite areas of a structured bonding material is provided, on one or both of the wafers at selected locations, the finite areas defining points of connection for joining the wafers. The wafers are bonded using heat and optionally pressure. Sacrificial material is etched away from the sacrificial wafer, patterning the top wafer by lithography is performed to define the desired deflectable microstructures having hinges, and subsequently silicon etch to make the structures.
摘要翻译：一种制造具有至少一个铰链构件的可偏转的自由悬挂微结构的方法，所述方法包括以下步骤：提供具有形成微结构的单晶材料构成材料的第一牺牲晶片。提供了包括与第一晶片协作形成结构的必要部件的第二半导体晶片。在选定位置的一个或两个晶片上提供结构化接合材料的有限区域，限定用于接合晶片的连接点。使用热和任选的压力将晶片接合。牺牲材料被蚀刻离开牺牲晶片，通过光刻来图案化顶部晶片以限定具有铰链的期望的可偏转微结构，并随后进行硅蚀刻以制造结构。

6. 发明申请

US20120018852A1 VIA STRUCTURE AND METHOD THEREOF 有权
标题翻译：通过其结构和方法
公开(公告)号：US20120018852A1
公开(公告)日：2012-01-26
申请号：US13193313
申请日：2011-07-28
申请人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin
发明人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin
IPC分类号： H01L23/498 , H01L21/30
CPC分类号： G02B26/0841 , B81B7/0006 , B81B2201/042 , B81B2203/04 , B81B2207/096 , G02B26/101
摘要： A vent hole precursor structure (26) in an intermediate product for a semi-conductor device has delicate structures (27, 28), and said intermediate product has a cavity (21) with a pressure therein differing from the pressure of the surroundings. The intermediate product comprises a first wafer (20) in which there is formed a depression (21). The first wafer is bonded to a second wafer (22) comprising a device layer (23) from which the structures (27, 28) are to be made by etching. A hole or groove (26) having a predefined depth extends downwards into the device layer, such that the cavity (21) during etching is opened up before the etching procedure breaks through the device layer (23) to form the structures (27, 28).
摘要翻译：用于半导体器件的中间产品中的通气孔前体结构（26）具有精细的结构（27,28），并且所述中间产品具有其中不同于周围压力的压力的空腔（21）。中间产品包括其中形成有凹部（21）的第一晶片（20）。第一晶片被结合到包括器件层（23）的第二晶片（22）上，通过蚀刻从该器件层（23）制造结构（27,28）。具有预定深度的孔或凹槽（26）向下延伸到装置层中，使得蚀刻过程中的空腔（21）在蚀刻过程突破穿过器件层（23）之前被打开以形成结构（27,28 ）。

7. 发明授权

US08630033B2 Via structure and method thereof 有权
标题翻译：其结构及其方法
公开(公告)号：US08630033B2
公开(公告)日：2014-01-14
申请号：US13166621
申请日：2011-06-22
申请人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin , Thomas Ericson
发明人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin , Thomas Ericson
IPC分类号： G02B26/08
CPC分类号： G02B26/0841 , B81B7/0006 , B81B2201/042 , B81B2201/045 , H01L23/481 , H01L2924/0002 , H02N1/006 , H01L2924/00
摘要： A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
摘要翻译：分层微电子和/或微机械结构包括在导电层之间具有绝缘层的至少三个交替导电层。还提供了在第一外层中的通孔，所述通孔包括由穿过该层的晶片天然材料制成的绝缘导电连接，在第一外层中延伸穿过其它层并进入所述通孔的导电插塞，以便提供通过层的导电性，以及围绕所述其它层的至少一个所选层的所述导电插塞的绝缘外壳，用于使所述插塞与所述选定层中的材料绝缘。它还涉及微电子和/或微机械装置，其包括设置在空腔上方的可动构件，使得其可在至少一个方向上移动。该装置具有根据本发明的分层结构。还提供了制造这种分层MEMS结构的方法。

8. 发明申请

US20120019886A1 VIA STRUCTURE AND METHOD THEREOF 有权
标题翻译：通过其结构和方法
公开(公告)号：US20120019886A1
公开(公告)日：2012-01-26
申请号：US13166621
申请日：2011-06-22
申请人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin , Thomas Ericson
发明人： Thorbjörn Ebefors , Edvard Kälvesten , Peter Agren , Niklas Svedin , Thomas Ericson
IPC分类号： G02B26/08 , H02N1/00
CPC分类号： G02B26/0841 , B81B7/0006 , B81B2201/042 , B81B2201/045 , H01L23/481 , H01L2924/0002 , H02N1/006 , H01L2924/00
摘要： A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
摘要翻译：分层微电子和/或微机械结构包括在导电层之间具有绝缘层的至少三个交替导电层。还提供了在第一外层中的通孔，所述通孔包括由穿过该层的晶片天然材料制成的绝缘导电连接，在第一外层中延伸穿过其它层并进入所述通孔的导电插塞，以便提供通过层的导电性，以及围绕所述其它层的至少一个所选层的所述导电插塞的绝缘外壳，用于使所述插塞与所述选定层中的材料绝缘。它还涉及微电子和/或微机械装置，其包括设置在空腔上方的可动构件，使得其可在至少一个方向上移动。该装置具有根据本发明的分层结构。还提供了制造这种分层MEMS结构的方法。

9. 发明授权

US08308960B2 Methods for making micro needles and applications thereof 有权
标题翻译：微针制作方法及应用
公开(公告)号：US08308960B2
公开(公告)日：2012-11-13
申请号：US12097448
申请日：2006-12-14
申请人： Edvard Kälvesten , Thorbjörn Ebefors , Thierry Corman
发明人： Edvard Kälvesten , Thorbjörn Ebefors , Thierry Corman
IPC分类号： C25F3/00 , B44C1/22
CPC分类号： A61M37/0015 , A61B5/053 , A61B5/150022 , A61B5/150282 , A61B5/150984 , A61M2037/003 , A61M2037/0046 , A61M2037/0053 , A61N1/0502 , A61N1/0551 , H01L2224/48091 , H01L2224/8592 , H01L2924/00014
摘要： The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.
摘要翻译：本发明在一般方面涉及在衬底上制造垂直突出元件的方法，所述元件具有包括至少一个倾斜表面的尖端和在所述基底和所述尖端之间延伸的细长主体部分。该方法包括形成所述倾斜表面的各向异性的晶面依赖蚀刻; 以及形成所述细长主体部分的各向异性非晶面依赖蚀刻; 结合限定所述突出元件的合适的图案化工艺具有预定的基部几何形状。

10. 发明授权

US08729685B2 Bonding process and bonded structures 有权
公开(公告)号：US08729685B2
公开(公告)日：2014-05-20
申请号：US13318205
申请日：2010-04-30
申请人： Thorbjörn Ebefors , Edward Kälvesten , Niklas Svedin , Anders Eriksson
发明人： Thorbjörn Ebefors , Edward Kälvesten , Niklas Svedin , Anders Eriksson
IPC分类号： H01L23/06
CPC分类号： H01L23/10 , B81C1/00269 , B81C2203/0118 , B81C2203/019 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/13144 , H01L2224/29035 , H01L2224/29111 , H01L2224/29144 , H01L2224/81193 , H01L2224/81203 , H01L2224/81895 , H01L2224/83805 , H01L2224/9211 , H01L2924/00011 , H01L2924/00014 , H01L2924/01079 , H01L2924/01322 , H01L2924/1461 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2224/0401
摘要： A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.

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