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1. 发明申请

US20150153955A1 MEMORY SYSTEM AND USER DEVICE INCLUDING THE SAME 有权
标题翻译：存储器系统和包括其的用户设备
公开(公告)号：US20150153955A1
公开(公告)日：2015-06-04
申请号：US14466187
申请日：2014-08-22
申请人： Donghun KWAK , Kitae PARK
发明人： Donghun KWAK , Kitae PARK
IPC分类号： G06F3/06
CPC分类号： G11C16/349 , G06F12/0246 , G06F2003/0697 , G11C16/0466 , G11C16/26
摘要： In one embodiment, the method includes receiving a read request for reading data from a memory area of the memory, and determining whether an identifier of the memory area is stored in one of the plurality of entries of a characteristic table. Each of the plurality of entries is associated with a different range of at least one memory area characteristic and each of the plurality of entries is associated with different read condition information. The method further includes obtaining the read condition information associated with the entry storing the identifier of the memory area if the determining determines the identifier is stored in one of the plurality of entries of the characteristic table, and controlling the memory to read data from the memory area using the obtained read condition information.
摘要翻译：在一个实施例中，该方法包括从存储器的存储器区域接收读取数据的读取请求，以及确定存储器区域的标识符是否存储在特征表的多个条目之一中。多个条目中的每一个与至少一个存储器区域特征的不同范围相关联，并且多个条目中的每一个与不同的读取条件信息相关联。该方法还包括：如果确定确定标识符存储在特征表的多个条目之一，并且控制存储器从存储器读取数据，则获得与存储存储区域的标识符的条目相关联的读取条件信息区域，使用获得的读取条件信息。

2. 发明申请

US20160099068A1 NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF 审中-公开
公开(公告)号：US20160099068A1
公开(公告)日：2016-04-07
申请号：US14965293
申请日：2015-12-10
申请人： DongHun KWAK , Kitae PARK
发明人： DongHun KWAK , Kitae PARK
IPC分类号： G11C16/24 , G11C16/34 , G11C16/14 , G11C16/04 , G11C16/08
CPC分类号： G11C16/24 , G11C16/0466 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/14 , G11C16/3418 , G11C16/3422 , G11C16/3427 , G11C16/3431
摘要： According to example embodiments of inventive concepts, a nonvolatile memory device includes at least two strings that are vertically stacked on a substrate and share one bit line. A program method of the nonvolatile memory device includes setting a pre-charge condition on the basis of a disturb environment between the at least two cell strings, pre-charging or not pre-charging an unselected cell string among the at least two cell strings in response to the pre-charge condition and programming memory cells in a selected cell string among the at least two cell strings.

3. 发明申请

US20150078098A1 NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF 审中-公开
标题翻译：非易失性存储器件及其程序方法
公开(公告)号：US20150078098A1
公开(公告)日：2015-03-19
申请号：US14302087
申请日：2014-06-11
申请人： DongHun KWAK , Kitae PARK
发明人： DongHun KWAK , Kitae PARK
IPC分类号： G11C16/10
CPC分类号： G11C16/24 , G11C16/0466 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/14 , G11C16/3418 , G11C16/3422 , G11C16/3427 , G11C16/3431
摘要： According to example embodiments of inventive concepts, a nonvolatile memory device includes at least two strings that are vertically stacked on a substrate and share one bit line. A program method of the nonvolatile memory device includes setting a pre-charge condition on the basis of a disturb environment between the at least two cell strings, pre-charging or not pre-charging an unselected cell string among the at least two cell strings in response to the pre-charge condition and programming memory cells in a selected cell string among the at least two cell strings.
摘要翻译：根据发明构思的示例性实施例，非易失性存储器件包括垂直堆叠在衬底上并且共享一个位线的至少两个串。非易失性存储装置的编程方法包括基于至少两个单元串之间的干扰环境来设置预充电状态，对至少两个单元串之间的未选择的单元串进行预充电或不预充电对所述预充电状态的响应以及在所述至少两个单元串中的所选单元串中编程存储器单元。

4. 发明申请

US20130117620A1 MEMORY SYSTEM AND OPERATING METHOD THEREOF 有权
标题翻译：存储系统及其操作方法
公开(公告)号：US20130117620A1
公开(公告)日：2013-05-09
申请号：US13449501
申请日：2012-04-18
申请人： Sang-Hyun JOO , Kitae PARK , Sangyong YOON , Jinman HAN
发明人： Sang-Hyun JOO , Kitae PARK , Sangyong YOON , Jinman HAN
IPC分类号： G06F11/07
CPC分类号： G06F11/1016 , G06F11/08 , G06F11/10 , G06F11/1008 , G06F11/1048 , G06F11/1068 , G06F11/1076 , G06F11/108 , G11C11/5628 , G11C16/10 , G11C16/3418 , H03M13/151 , H03M13/1525 , H03M13/1545
摘要： A memory system includes a nonvolatile memory device and a memory controller configured to control the nonvolatile memory device and configured to provide the nonvolatile memory device with error flag information including error location information of an error of data read from the nonvolatile memory device.
摘要翻译：存储器系统包括非易失性存储器件和存储器控制器，其被配置为控制非易失性存储器件并且被配置为向非易失性存储器件提供包括从非易失性存储器件读取的数据的错误的错误位置信息的错误标志信息。

5. 发明申请

US20110080791A1 NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION 有权
标题翻译：非易失性存储器件及其相关操作方法
公开(公告)号：US20110080791A1
公开(公告)日：2011-04-07
申请号：US12793007
申请日：2010-06-03
申请人： Bo Geun KIM , Kitae PARK
发明人： Bo Geun KIM , Kitae PARK
IPC分类号： G11C16/06 , G11C16/04
CPC分类号： G11C11/5628 , G11C7/1048 , G11C16/0483 , G11C16/24 , G11C16/3454 , G11C2211/5621
摘要： A method of programming a nonvolatile memory device comprises programming memory cells by performing a plurality of program loops with bitline precharging inactivated during program verification operations of some of the program loops, and with bitline precharging activated during program verification operations of some of the program loops.
摘要翻译：非易失性存储器件的编程方法包括通过在某些程序循环的程序验证操作期间执行具有位线预充电的多个程序循环来编程存储器单元，并且在某些程序循环的程序验证操作期间激活位线预充电。

6. 发明申请

US20100128532A1 NONVOLATILE MEMORY DEVICE AND PROGRAMMING METHOD 有权
标题翻译：非易失性存储器件和编程方法
公开(公告)号：US20100128532A1
公开(公告)日：2010-05-27
申请号：US12581479
申请日：2009-10-19
申请人： Soonwook HWANG , Kitae PARK , Jaewook LEE , Han Sung JOO
发明人： Soonwook HWANG , Kitae PARK , Jaewook LEE , Han Sung JOO
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/3404 , G11C16/344
摘要： A nonvolatile memory device includes; a memory cell array configured into a plurality of memory blocks, a decoder connected to the plurality of memory blocks via a word line, a page buffer connected to the plurality of memory blocks via a bit line, and control logic configured to define a control voltage applied to at least one of the word line and the bit line during a program/verify operation in accordance with a location of each one of the plurality of memory blocks within the memory cell array.
摘要翻译：非易失性存储装置包括：配置成多个存储器块的存储单元阵列，经由字线连接到多个存储器块的解码器，经由位线连接到多个存储器块的页缓冲器以及被配置为定义控制电压的控制逻辑根据存储单元阵列内的多个存储块中的每一个的位置，在程序/验证操作期间应用于字线和位线中的至少一个。

7. 发明申请

US20130135934A1 NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF 审中-公开
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US20130135934A1
公开(公告)日：2013-05-30
申请号：US13599773
申请日：2012-08-30
申请人： Seung-Bum KIM , Jaeyong JEONG , Kitae PARK
发明人： Seung-Bum KIM , Jaeyong JEONG , Kitae PARK
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5621 , G11C16/0483 , G11C16/3427
摘要： Disclosed is a method of operating a nonvolatile memory device which includes a first memory area and a second memory area, the number of pages being stored in each word line of the first memory area being smaller than the number of pages being stored in each word line of the second memory area, and the first memory area being configured to buffer data to be written in the second memory area. The method includes sensing pages stored in the first memory area to store the sensed pages in a page buffer; receiving an address for storing pages stored in the page buffer in the second memory area; and randomizing the pages stored in the page buffer based on the address.
摘要翻译：公开了一种操作包括第一存储区域和第二存储区域的非易失性存储器件的方法，存储在第一存储器区域的每个字线中的页数小于存储在每个字线中的页数并且所述第一存储区域被配置为缓冲要写入到所述第二存储器区域中的数据。该方法包括感测存储在第一存储器区域中的页面以将感测的页面存储在页面缓冲器中; 接收存储在第二存储器区域中的页面缓冲器中的页面的地址; 并且基于地址随机化存储在页面缓冲器中的页面。

8. 发明申请

US20090316491A1 NON-VOLATILE MEMORY DEVICES AND METHODS OF ERASING NON-VOLATILE MEMORY DEVICES 有权
标题翻译：非易失性存储器件和消除非易失性存储器件的方法
公开(公告)号：US20090316491A1
公开(公告)日：2009-12-24
申请号：US12486056
申请日：2009-06-17
申请人： Kitae PARK , Doogon Kim , Moosung Kim , Hansoo Kim
发明人： Kitae PARK , Doogon Kim , Moosung Kim , Hansoo Kim
IPC分类号： G11C16/04 , G11C7/06
CPC分类号： G11C16/0483 , G11C16/16
摘要： In one embodiment, an erase method for a memory including a memory array having at least first and second programmable transistors connected in series, includes restricting flow of electrons from the first programmable transistor into the second programmable transistor during an erase operation.
摘要翻译：在一个实施例中，包括具有串联连接的至少第一和第二可编程晶体管的存储器阵列的存储器的擦除方法包括在擦除操作期间限制电子从第一可编程晶体管流入第二可编程晶体管。

9. 发明申请

US20140310448A1 METHOD OF OPERATING MEMORY CONTROLLER AND DATA STORAGE DEVICE INCLUDING MEMORY CONTROLLER 有权
标题翻译：操作存储器控制器的方法和包括存储器控制器的数据存储设备
公开(公告)号：US20140310448A1
公开(公告)日：2014-10-16
申请号：US14073155
申请日：2013-11-06
申请人： Sang-Wan NAM , Kitae PARK
发明人： Sang-Wan NAM , Kitae PARK
IPC分类号： G06F12/02
CPC分类号： G06F3/0653 , G06F3/0604 , G06F3/0619 , G06F3/0659 , G06F3/0679 , G06F11/1068 , G06F11/1402 , G11C11/5628 , G11C16/3445 , G11C16/3495 , G11C29/52
摘要： In one embodiment, the method includes determining, at the memory controller, a status of a selected page of memory based on a program/erase cycle count for a block of the memory. The block of the memory includes the selected page. The program/erase cycle count indicates a number of times the block has been erased. The status is selected from a plurality of status states. The status states include a normal state, a weak state and a bad state.
摘要翻译：在一个实施例中，该方法包括基于存储器块的编程/擦除周期计数在存储器控制器处确定所选择的存储器页的状态。存储器的块包括所选择的页面。程序/擦除周期计数指示块已被擦除的次数。该状态是从多个状态中选择的。状态包括正常状态，弱状态和坏状态。

10. 发明申请

US20130117634A1 MEMORY SYSTEM AND DATA STORAGE METHOD 有权
标题翻译：存储系统和数据存储方法
公开(公告)号：US20130117634A1
公开(公告)日：2013-05-09
申请号：US13604772
申请日：2012-09-06
申请人： Sang-Hyun JOO , Kitae PARK , Sangyong YOON , Jaeyong JEONG
发明人： Sang-Hyun JOO , Kitae PARK , Sangyong YOON , Jaeyong JEONG
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： G06F11/1048 , G06F3/0649 , G06F11/1068 , G06F11/14 , G06F11/1402 , G06F12/0246 , G06F2212/72 , G06F2212/7205 , G11C29/42 , G11C2211/5641 , H03M13/05 , H03M13/3715
摘要： A memory system comprises a nonvolatile memory device comprising a memory cell array comprising first and second memory blocks, and a memory controller configured to control the nonvolatile memory device to read data from the first memory block, selectively determine an error correction operation to be performed on the data after it is read from the first memory block based on a state of at least one of the first and second memory blocks, and then store the data in the second memory block.
摘要翻译：存储器系统包括非易失性存储器件，其包括包括第一和第二存储器块的存储器单元阵列，以及存储器控制器，其被配置为控制非易失性存储器件从第一存储器块读取数据，选择性地确定要执行的纠错操作基于第一和第二存储器块中的至少一个的状态从第一存储器块读取之后的数据，然后将数据存储在第二存储器块中。

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