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1. 发明授权

US08254181B2 Nonvolatile memory device and programming method 有权
标题翻译：非易失性存储器件和编程方法
公开(公告)号：US08254181B2
公开(公告)日：2012-08-28
申请号：US12581479
申请日：2009-10-19
申请人： Soonwook Hwang , Kitae Park , Jaewook Lee , Han Sung Joo
发明人： Soonwook Hwang , Kitae Park , Jaewook Lee , Han Sung Joo
IPC分类号： G11C16/06 , G11C16/34 , G11C16/24 , G11C16/10
CPC分类号： G11C16/3404 , G11C16/344
摘要： A nonvolatile memory device includes; a memory cell array configured into a plurality of memory blocks, a decoder connected to the plurality of memory blocks via a word line, a page buffer connected to the plurality of memory blocks via a bit line, and control logic configured to define a control voltage applied to at least one of the word line and the bit line during a program/verify operation in accordance with a location of each one of the plurality of memory blocks within the memory cell array.
摘要翻译：非易失性存储装置包括：配置成多个存储器块的存储单元阵列，经由字线连接到多个存储器块的解码器，经由位线连接到多个存储器块的页缓冲器以及被配置为定义控制电压的控制逻辑根据存储单元阵列内的多个存储块中的每一个的位置，在程序/验证操作期间应用于字线和位线中的至少一个。

2. 发明授权

US07889564B2 Semiconductor memory device including memory cell array having dynamic memory cell, and sense amplifier thereof 有权
标题翻译：包括具有动态存储单元的存储单元阵列及其读出放大器的半导体存储器件
公开(公告)号：US07889564B2
公开(公告)日：2011-02-15
申请号：US12461746
申请日：2009-08-24
申请人： Han-Sung Joo , Jae-Wook Lee
发明人： Han-Sung Joo , Jae-Wook Lee
IPC分类号： G11C16/06
CPC分类号： G11C11/406 , G11C11/4091 , G11C2211/4016
摘要： A semiconductor memory device and a sense amplifier thereof are provided. The semiconductor memory device includes a memory cell array and a plurality of sense amplifiers. The memory cell array includes a memory cell array block having a plurality of memory cells. Each of the plurality of sense amplifiers is configured to apply, based on a restore signal, a first voltage to a corresponding bit line to restore a first data value in a selected memory cell of the plurality of memory cells if a read value in the selected memory cell is the first data value and apply a second voltage based on the restore signal to the corresponding bit line to prevent a second data value from being restored in the selected memory cell if the read value in the selected memory cell is the second data value.
摘要翻译：提供半导体存储器件及其读出放大器。半导体存储器件包括存储单元阵列和多个读出放大器。存储单元阵列包括具有多个存储单元的存储单元阵列块。多个读出放大器中的每一个被配置为基于恢复信号将第一电压应用于对应的位线，以便在所选择的多个存储器单元中的读取值中恢复所选择的多个存储单元的选定存储单元中的第一数据值存储器单元是第一数据值，并且基于还原信号将第二电压施加到相应的位线，以防止所选择的存储器单元中的读取值是第二数据值时在所选存储单元中恢复第二数据值。

3. 发明申请

US20100128532A1 NONVOLATILE MEMORY DEVICE AND PROGRAMMING METHOD 有权
标题翻译：非易失性存储器件和编程方法
公开(公告)号：US20100128532A1
公开(公告)日：2010-05-27
申请号：US12581479
申请日：2009-10-19
申请人： Soonwook HWANG , Kitae PARK , Jaewook LEE , Han Sung JOO
发明人： Soonwook HWANG , Kitae PARK , Jaewook LEE , Han Sung JOO
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/3404 , G11C16/344
摘要： A nonvolatile memory device includes; a memory cell array configured into a plurality of memory blocks, a decoder connected to the plurality of memory blocks via a word line, a page buffer connected to the plurality of memory blocks via a bit line, and control logic configured to define a control voltage applied to at least one of the word line and the bit line during a program/verify operation in accordance with a location of each one of the plurality of memory blocks within the memory cell array.
摘要翻译：非易失性存储装置包括：配置成多个存储器块的存储单元阵列，经由字线连接到多个存储器块的解码器，经由位线连接到多个存储器块的页缓冲器以及被配置为定义控制电压的控制逻辑根据存储单元阵列内的多个存储块中的每一个的位置，在程序/验证操作期间应用于字线和位线中的至少一个。

4. 发明申请

US20100046310A1 Semiconductor memory device including memory cell array having dynamic memory cell, and sense amplifier thereof 有权
标题翻译：包括具有动态存储单元的存储单元阵列及其读出放大器的半导体存储器件
公开(公告)号：US20100046310A1
公开(公告)日：2010-02-25
申请号：US12461746
申请日：2009-08-24
申请人： Han-Sung Joo , Jae-Wook Lee
发明人： Han-Sung Joo , Jae-Wook Lee
IPC分类号： G11C7/00 , G11C7/02
CPC分类号： G11C11/406 , G11C11/4091 , G11C2211/4016
摘要： A semiconductor memory device and a sense amplifier thereof are provided. The semiconductor memory device includes a memory cell array and a plurality of sense amplifiers. The memory cell array includes a memory cell array block having a plurality of memory cells. Each of the plurality of sense amplifiers is configured to apply, based on a restore signal, a first voltage to a corresponding bit line to restore a first data value in a selected memory cell of the plurality of memory cells if a read value in the selected memory cell is the first data value and apply a second voltage based on the restore signal to the corresponding bit line to prevent a second data value from being restored in the selected memory cell if the read value in the selected memory cell is the second data value.
摘要翻译：提供半导体存储器件及其读出放大器。半导体存储器件包括存储单元阵列和多个读出放大器。存储单元阵列包括具有多个存储单元的存储单元阵列块。多个读出放大器中的每一个被配置为基于恢复信号将第一电压应用于对应的位线，以便在所选择的多个存储器单元中的读取值中恢复所选择的多个存储单元的选定存储单元中的第一数据值存储器单元是第一数据值，并且基于还原信号将第二电压施加到相应的位线，以防止所选择的存储器单元中的读取值是第二数据值时在所选存储单元中恢复第二数据值。

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