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1. 发明授权

US06538614B2 Broadband antenna structure 有权
公开(公告)号：US06538614B2
公开(公告)日：2003-03-25
申请号：US09836024
申请日：2001-04-17
申请人： Debra A. Fleming , George Earl Peterson , John Thomson, Jr.
发明人： Debra A. Fleming , George Earl Peterson , John Thomson, Jr.
IPC分类号： H01Q1310
CPC分类号： H01Q9/045 , H01Q9/0457 , H01Q13/085
摘要： An antenna structure including at least one planar antenna element. In place of a balun, the antenna structure further includes a slotline for coupling the planar antenna element with an unbalanced load.

2. 发明授权

US5239744A Method for making multilayer magnetic components 失效
标题翻译：制造多层磁性元件的方法
公开(公告)号：US5239744A
公开(公告)日：1993-08-31
申请号：US818669
申请日：1992-01-09
申请人： Debra A. Fleming , David W. Johnson, Jr. , Warren W. Rhodes , Apurba Roy , John Thomson, Jr.
发明人： Debra A. Fleming , David W. Johnson, Jr. , Warren W. Rhodes , Apurba Roy , John Thomson, Jr.
IPC分类号： H01F41/00 , B28B1/48 , B28B7/34 , H01F41/04 , H01F41/16
CPC分类号： H01F41/16 , B28B1/48 , B28B7/342 , Y10T29/4902 , Y10T29/49833
摘要： Multilayer magnetic components can be made with reduced cracking and magnetic degradation by forming layers having patterns of magnetic and insulating regions separated by regions that are removable during sintering. Advantageously, when the layers are stacked, layers of removable material are also disposed between magnetic regions and insulating regions so as to produce upon sintering a magnetic core within an insulating body wherein the core is substantially completely surrounded by a thin layer of free space.

3. 发明授权

US5504385A Spaced-gate emission device and method for making same 失效
标题翻译：间隔栅极发射装置及其制造方法
公开(公告)号：US5504385A
公开(公告)日：1996-04-02
申请号：US299470
申请日：1994-08-31
申请人： Sungho Jin , Gregory P. Kochanski , John Thomson, Jr.
发明人： Sungho Jin , Gregory P. Kochanski , John Thomson, Jr.
IPC分类号： H01J1/304 , H01J9/02 , H01J31/12 , H01J1/30
CPC分类号： H01J9/025 , H01J2201/30403 , H01J2201/30457 , H01J2329/00
摘要： In accordance with the invention, a field emission device is made by disposing emitter material on an insulating substrate, applying a sacrificial film to the emitter material and forming over the sacrificial layer a conductive gate layer having a random distribution of apertures therein. In the preferred process, the gate is formed by applying masking particles to the sacrificial film, applying a conductive film over the masking particles and the sacrificial film and then removing the masking particles to reveal a random distribution of apertures. The sacrificial film is then removed. The apertures then extend to the emitter material. In a preferred embodiment, the sacrificial film contains dielectric spacer particles which remain after the film is removed to separate the emitter from the gate. The result is a novel and economical field emission device having numerous randomly distributed emission apertures which can be used to make low cost flat panel displays.
摘要翻译：根据本发明，通过将发射极材料设置在绝缘衬底上，将牺牲膜施加到发射极材料并在牺牲层上形成具有其中孔径随机分布的导电栅极层而形成场致发射器件。在优选的方法中，通过将掩模颗粒施加到牺牲膜，在掩模颗粒和牺牲膜上施加导电膜，然后去除掩模颗粒以显示孔的随机分布来形成栅极。然后去除牺牲膜。孔然后延伸到发射体材料。在优选实施例中，牺牲膜包含介电间隔物颗粒，其在除去膜之后保留，以将发射极与栅极分离。结果是一种新颖且经济的场致发射装置，其具有许多随机分布的发射孔，其可用于制造低成本的平板显示器。

4. 发明授权

US06716488B2 Ferrite film formation method 有权
标题翻译：铁素体成膜方法
公开(公告)号：US06716488B2
公开(公告)日：2004-04-06
申请号：US09887938
申请日：2001-06-22
申请人： Debra Anne Fleming , Gideon S. Grader , David Wilfred Johnson, Jr. , John Thomson, Jr. , Robert Bruce Van Dover
发明人： Debra Anne Fleming , Gideon S. Grader , David Wilfred Johnson, Jr. , John Thomson, Jr. , Robert Bruce Van Dover
IPC分类号： H01F100
CPC分类号： H01F41/24 , B82Y30/00 , C03C17/25 , C03C2217/216 , C03C2217/217 , C03C2217/23 , C04B41/009 , C04B41/5036 , C04B41/87 , C04B2111/00422 , C04B41/4543 , C04B41/455 , C04B35/10
摘要： A ferrite layer formation process that may be performed at a lower temperature than conventional ferrite formation processes. The formation process may produce highly anisotropic structures. A ferrite layer is deposited on a substrate while the substrate is exposed to a magnetic field. An intermediate layer may be positioned between the substrate and the ferrite to promote bonding of the ferrite to the substrate. The process may be performed at temperatures less than 300° C. Ferrite film anisotropy may be achieved by embodiments of the invention in the range of about 1000 dyn-cm/cm3 to about 2×106 dyn-cm/cm3.
摘要翻译：可以在比常规铁素体形成工艺更低的温度下进行的铁素体层形成工艺。形成过程可能产生高度各向异性的结构。在衬底暴露于磁场的同时，在衬底上沉积铁素体层。中间层可以位于基底和铁素体之间，以促进铁素体与基底的结合。该方法可以在低于300℃的温度下进行。铁氧体膜各向异性可以通过本发明的实施方案在约1000dyncm -1 / cm 3至约2×10 6 dyn-cm / cm 3的范围内实现。 3>。

5. 发明授权

US5802702A Method of making a device including a metallized magnetic substrate 失效
标题翻译：制造包括金属化磁性基板的装置的方法
公开(公告)号：US5802702A
公开(公告)日：1998-09-08
申请号：US923591
申请日：1997-09-04
申请人： Debra Anne Fleming , David Wilfred Johnson, Jr. , Vincent George Lambrecht, Jr. , Henry Hon Law , David Joseph Liptack , Apurba Roy , John Thomson, Jr.
发明人： Debra Anne Fleming , David Wilfred Johnson, Jr. , Vincent George Lambrecht, Jr. , Henry Hon Law , David Joseph Liptack , Apurba Roy , John Thomson, Jr.
IPC分类号： H01F17/00 , H01F41/04 , H01L21/48 , H05K1/03 , H05K1/09 , H05K1/11 , H05K3/00 , H05K3/24 , H05K3/40
CPC分类号： H01F17/0033 , H01F41/046 , H01L21/486 , H05K1/115 , H05K3/403 , H01F2017/004 , H05K1/0306 , H05K1/092 , H05K2201/09645 , H05K2201/09854 , H05K2203/1476 , H05K3/005 , H05K3/245 , H05K3/4061 , Y10T29/4902 , Y10T29/49076 , Y10T29/49165
摘要： The method of making a metallized magnetic substrate for devices including a magnetic component involves providing an unfired ceramic body. In one exemplary embodiment, the method further involves making one or more vias through the ceramic body, coating the via side walls with conductive material, forming an aperture through the ceramic body, such that an aperture edge intersects the via, and metallizing the unfired ceramic body such that a conductive pathway is formed that includes the conductive material in the via. Finally, the metallized unfired ceramic body is fired in conventional fashion, optionally followed by deposition of additional conductor material.
摘要翻译：制造包括磁性部件的装置的金属化磁性基板的方法包括提供未烧结的陶瓷体。在一个示例性实施例中，该方法还包括制造通过陶瓷体的一个或多个通孔，用导电材料涂覆通孔侧壁，通过陶瓷体形成孔，使得孔边缘与通孔相交，并且对未烧结的陶瓷进行金属化使得形成导电路径，其包括通孔中的导电材料。最后，金属化未焙烧陶瓷体以常规方式烧制，任选地随后沉积另外的导体材料。

6. 发明授权

US3938064A Devices using low loss dielectric material 失效
标题翻译：使用低损耗介电材料的器件
公开(公告)号：US3938064A
公开(公告)日：1976-02-10
申请号：US484559
申请日：1974-07-01
申请人： Henry Miles O'Bryan, Jr. , James Kevin Pluorde , John Thomson, Jr.
发明人： Henry Miles O'Bryan, Jr. , James Kevin Pluorde , John Thomson, Jr.
IPC分类号： C04B35/46 , C04B35/468 , H01B3/02 , H01B3/12 , H01L41/187 , H01P1/20 , H01P7/10 , H01P3/08 , H01B3/10 , H01P5/12 , H01P7/06
CPC分类号： H01L41/187 , C04B35/4686 , H01B3/025
摘要： Devices are described which utilize a low loss dielectric material. This dielectric material is unique in that it combines low dielectric loss with a high and temperature-stable dielectric constant. The material is made up of BaO and TiO.sub.2 and corresponds closely in composition to the compound Ba.sub.2 Ti.sub.9 O.sub.20. Devices utilizing this material are useful at a variety of frequencies, but are particularly advantageous in the microwave region above 0.5 GHz.
摘要翻译：描述了利用低损耗介电材料的器件。这种电介质材料是独特的，因为它将低介电损耗与高和温度稳定的介电常数相结合。该材料由BaO和TiO2组成，与组合物Ba2Ti9O20的组成密切相关。利用这种材料的装置在各种频率下是有用的，但是在0.5GHz以上的微波区域中是特别有利的。

7. 发明授权

US5914437A Fabrication including sol-gel float processing 失效
标题翻译：包括溶胶 - 凝胶浮法加工的制作
公开(公告)号：US5914437A
公开(公告)日：1999-06-22
申请号：US880319
申请日：1997-06-23
申请人： Edwin Arthur Chandross , David Wilfred Johnson, Jr. , John Burnette MacChesney , Eliezer M. Rabinovich , John Thomson, Jr.
发明人： Edwin Arthur Chandross , David Wilfred Johnson, Jr. , John Burnette MacChesney , Eliezer M. Rabinovich , John Thomson, Jr.
IPC分类号： C01B13/32 , C03B8/02 , C03B19/12 , C03C3/06 , C04B35/624 , C03B8/00
CPC分类号： C03B19/12 , C04B35/624 , Y02P40/57
摘要： Cracking in thin sheets of sol-gel-produced material is avoided by use of a support liquid during gelation and drying. Silica glass, as well as other glass and ceramic bodies, is contemplated.
摘要翻译：在凝胶化和干燥过程中，通过使用支持液来避免溶胶凝胶生产的材料薄片的破裂。预期二氧化硅玻璃以及其它玻璃和陶瓷体。

8. 发明授权

US5877666A Stackable, passively-tunable, cost-reduced inductor 失效
标题翻译：可堆叠，被动调谐，成本降低的电感
公开(公告)号：US5877666A
公开(公告)日：1999-03-02
申请号：US815618
申请日：1997-03-12
申请人： David Wilfred Johnson, Jr. , David A. Norte , John Thomson, Jr.
发明人： David Wilfred Johnson, Jr. , David A. Norte , John Thomson, Jr.
IPC分类号： H01F17/00 , H01F17/06 , H01F27/28 , H01F17/30
CPC分类号： H01F17/0006 , H01F17/062
摘要： An inductor (100) optimized for surface-mount vacuum-pickup automated circuit assembly eliminates the expense of an inductor housing. The inductor has a hollow rectangular ferrite core (101) and a winding defined by a stripline (102) deposited on the core surface. Winding ends are formed by conductive vias (103) in the core that open onto the core surface, where they connect and mount the inductor to a circuit board (150). A flat sheet (104) adhered to one face of the core provides a surface for vacuum pickup and for labeling of the inductor. The core of a passively tuneable inductor (200) defines multiple unconnected winding segments (102-103). Segment ends mount the inductor to the circuit board and connect the segments to circuit board striplines (254) that are laid out in a pattern to interconnect a number of the segments into a winding. The inductor is tuned by changing the stripline layout and thereby varying the number of interconnected segments. The core of an electromagnetic interference choke (300) defines two windings wound axially in parallel and radially in opposite directions. The core of a choke (500) that permits stacked mounting defines additional conductive vias (503) for connecting the windings of a second choke (300) mounted on the core to the circuit board. For electromagnetic isolation, the windings of the two chokes are oriented orthogonally to each other.
摘要翻译：为表面贴装真空拾取自动化电路组件而优化的电感器（100）消除了电感器外壳的费用。电感器具有中空矩形铁氧体磁芯（101）和由沉积在磁芯表面上的带状线（102）限定的绕组。卷绕端由芯体中的导电通路（103）形成，该通孔穿过芯体表面，其中它们将电感器连接并安装到电路板（150）上。粘附在芯的一个表面上的平板（104）提供用于真空吸收和用于标记电感器的表面。可调谐电感器（200）的核心限定多个未连接的绕组段（102-103）。段末端将电感器安装到电路板上，并将这些段连接到以图案布置的电路板带状线（254），以将多个段互连成一个绕组。通过改变带状线布局并因此改变互连段的数量来调整电感器。电磁干扰扼流圈（300）的核心限定了沿相反方向平行并径向缠绕的两个绕组。允许堆叠安装的扼流器（500）的核心定义了用于将安装在芯上的第二扼流器（300）的绕组连接到电路板的附加导电通孔（503）。对于电磁隔离，两个扼流圈的绕组彼此正交定向。

9. 发明授权

US5704820A Method for making improved pillar structure for field emission devices 失效
标题翻译：制造场发射器件柱状结构改进方法
公开(公告)号：US5704820A
公开(公告)日：1998-01-06
申请号：US381377
申请日：1995-01-31
申请人： Edwin Arthur Chandross , Sungho Jin , Gregory Peter Kochanski , John Thomson, Jr. , Wei Zhu
发明人： Edwin Arthur Chandross , Sungho Jin , Gregory Peter Kochanski , John Thomson, Jr. , Wei Zhu
IPC分类号： H01J31/12 , H01J9/18 , H01J9/24 , H01J29/87 , H01J1/88
CPC分类号： H01J9/242 , H01J31/123 , H01J2329/863 , H01J2329/8635 , H01J2329/864
摘要： The pillar structure according to the invention has a substantially longer surface path length from negative to positive electrodes resist breakdown in a high voltage environment. The processing and assembly methods in this invention permit low-cost manufacturing of high breakdown-voltage, dielectric pillars for the flat panel display.
摘要翻译：根据本发明的支柱结构具有从负电极到正极的基本上更长的表面路径长度，在高压环境中抵抗击穿。本发明的处理和组装方法允许用于平板显示器的高击穿电压，介电柱的低成本制造。

10. 发明授权

US5619791A Method for fabricating highly conductive vias 失效
标题翻译：制造高导电通孔的方法
公开(公告)号：US5619791A
公开(公告)日：1997-04-15
申请号：US430963
申请日：1995-04-28
申请人： Vincent G. Lambrecht, Jr. , Henry H. Law , Apurba Roy , John Thomson, Jr. , Te-Sung Wu
发明人： Vincent G. Lambrecht, Jr. , Henry H. Law , Apurba Roy , John Thomson, Jr. , Te-Sung Wu
IPC分类号： H05K3/42 , H01F17/00 , H01F41/04 , H01L21/48 , H05K1/03 , H05K1/09 , H05K1/11 , H05K3/00 , H05K3/24 , H05K3/40
CPC分类号： H01F17/0033 , H01F41/046 , H01L21/486 , H05K1/115 , H05K3/403 , H01F2017/004 , H05K1/0306 , H05K1/092 , H05K2201/09645 , H05K2201/09854 , H05K2203/1476 , H05K3/005 , H05K3/245 , H05K3/4061 , Y10T29/49165
摘要： The thickness uniformity of a plated metal layer inside a via hole can be enhanced by intersecting a conductive via with an insulating aperture before plating. The new via configuration improves the mass transfer of the plating. It is believed that the apertures lower the local solution ohmic resistance near the via holes. The method can be applied to the manufacture of a wide variety of circuit boards.
摘要翻译：通孔之间的电镀金属层的厚度均匀性可以通过在电镀之前与导电通孔与绝缘孔交叉来增强。新的通孔配置改善了电镀的传质。据信孔径降低了通孔附近的局部溶液欧姆电阻。该方法可应用于各种电路板的制造。

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