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1. 发明授权

US08198705B2 Ultra-thin die and method of fabricating same 有权
标题翻译：超薄模及其制造方法
公开(公告)号：US08198705B2
公开(公告)日：2012-06-12
申请号：US12211556
申请日：2008-09-16
申请人： David P. Mancini , Young Sir Chung , William J. Dauksher , Donald F. Weston , Steven R. Young , Robert W. Baird
发明人： David P. Mancini , Young Sir Chung , William J. Dauksher , Donald F. Weston , Steven R. Young , Robert W. Baird
IPC分类号： H01L29/06
CPC分类号： H01L21/3065 , H01L21/78 , Y10S438/977
摘要： In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.
摘要翻译：根据具体实施例，公开了一种处理半导体衬底的方法，由此使衬底变薄，并且通过公共工艺将形成在衬底上的裸片分割。沟槽区域形成在衬底的背面。背面的各向同性蚀刻导致衬底的薄化，同时保持沟槽的深度，从而有利于模具的分离。

2. 发明授权

US07507638B2 Ultra-thin die and method of fabricating same 有权
标题翻译：超薄模及其制造方法
公开(公告)号：US07507638B2
公开(公告)日：2009-03-24
申请号：US10881144
申请日：2004-06-30
申请人： David P. Mancini , Young Sir Chung , William J. Dauksher , Donald F. Weston , Steven R. Young , Robert W. Baird
发明人： David P. Mancini , Young Sir Chung , William J. Dauksher , Donald F. Weston , Steven R. Young , Robert W. Baird
IPC分类号： H01L21/30
CPC分类号： H01L21/3065 , H01L21/78 , Y10S438/977
摘要： In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.
摘要翻译：根据具体实施例，公开了一种处理半导体衬底的方法，由此使衬底变薄，并且通过公共工艺将形成在衬底上的裸片分割。沟槽区域形成在衬底的背面。背面的各向同性蚀刻导致衬底的薄化，同时保持沟槽的深度，从而有利于模具的分离。

3. 发明申请

US20090008748A1 ULTRA-THIN DIE AND METHOD OF FABRICATING SAME 有权
标题翻译：超薄薄膜及其制造方法
公开(公告)号：US20090008748A1
公开(公告)日：2009-01-08
申请号：US12211556
申请日：2008-09-16
申请人： David P. Mancini , Young Sir Chung , William J. Dauksher , Donald F. Watson , Steven R. Young , Robert W. Baird
发明人： David P. Mancini , Young Sir Chung , William J. Dauksher , Donald F. Watson , Steven R. Young , Robert W. Baird
IPC分类号： H01L29/06
CPC分类号： H01L21/3065 , H01L21/78 , Y10S438/977
摘要： In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.
摘要翻译：根据具体实施例，公开了一种处理半导体衬底的方法，由此使衬底变薄，并且通过公共工艺将形成在衬底上的裸片分割。沟槽区域形成在衬底的背面。背面的各向同性蚀刻导致衬底的薄化，同时保持沟槽的深度，从而有利于模具的分离。

4. 发明申请

US20080112214A1 Electronic assembly having magnetic tunnel junction voltage sensors and method for forming the same 审中-公开
标题翻译：具有磁隧道结电压传感器的电子组件及其形成方法
公开(公告)号：US20080112214A1
公开(公告)日：2008-05-15
申请号：US11590276
申请日：2006-10-30
申请人： Young Sir Chung , Robert W. Baird , Mark A. Durlam , Pon Sung Ku
发明人： Young Sir Chung , Robert W. Baird , Mark A. Durlam , Pon Sung Ku
IPC分类号： G11C11/00 , G11C11/14 , G11C7/02
CPC分类号： H01L27/088 , B82Y25/00 , G11C11/16 , H01L27/0623 , H01L27/228
摘要： A method and assembly for sensing a voltage with a memory cell (88) is provided. The memory cell includes first and second electrodes (96,112), first and second ferromagnetic bodies (104,108) positioned between the first and second electrodes and an insulating body (94) positioned between the first and second ferromagnetic bodies. The first electrode is electrically connected to a first portion of a microelectronic assembly (47). The second electrode is electrically connected to a second portion of the microelectronic assembly. The voltage across the first and second portions of the microelectronic assembly is determined based on an electrical resistance of the memory cell. The memory cell may be a magnetoresistive random access memory (MRAM) cell. In one embodiment, the memory cell is a magnetic tunnel junction (MTJ) memory cell.
摘要翻译：提供了一种用于利用存储单元（88）感测电压的方法和组件。存储单元包括位于第一和第二电极之间的第一和第二电极（96,112），第一和第二铁磁体（104,108）和位于第一和第二铁磁体之间的绝缘体（94）。第一电极电连接到微电子组件（47）的第一部分。第二电极电连接到微电子组件的第二部分。基于存储单元的电阻来确定微电子组件的第一和第二部分两端的电压。存储单元可以是磁阻随机存取存储器（MRAM）单元。在一个实施例中，存储器单元是磁性隧道结（MTJ）存储单元。

5. 发明授权

US07220602B2 Magnetic tunnel junction sensor method 有权
公开(公告)号：US07220602B2
公开(公告)日：2007-05-22
申请号：US11192570
申请日：2005-07-29
申请人： Young Sir Chung , Robert W. Baird
发明人： Young Sir Chung , Robert W. Baird
IPC分类号： H01L21/00
CPC分类号： G01R33/093 , B82Y25/00 , B82Y40/00 , G01R33/098 , G11C11/16 , H01F41/307
摘要： Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic electrode has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.

6. 发明授权

US07414396B2 Sensor with magnetic tunnel junction and moveable magnetic field source 失效
标题翻译：传感器具有磁性隧道结和可动磁场源
公开(公告)号：US07414396B2
公开(公告)日：2008-08-19
申请号：US11192802
申请日：2005-07-29
申请人： Young Sir Chung , Robert W. Baird
发明人： Young Sir Chung , Robert W. Baird
IPC分类号： G01R33/02
CPC分类号： G01R33/06 , B82Y25/00 , G01R33/093 , G01R33/098
摘要： Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. A magnetic shield is provided at least on a face of the MFS away from the MTJ. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic region has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
摘要翻译：提供了用于感测物理参数的方法和装置。该装置包括磁隧道结（MTJ）和磁场源，其磁场与MTJ重叠，并且其与MTJ的接近度响应于对传感器的输入而变化。至少在远离MTJ的MFS的面上设有磁屏蔽。 MTJ包括由电介质隔开的第一和第二磁极，其被配置为允许它们之间的显着的隧穿传导。第一磁性区域的自旋轴被固定，第二磁极的自由轴自由。磁场源比第一磁极更靠近第二磁极。通过提供多个电耦合传感器来接收相同的输入但是具有不同的单个响应曲线并且期望地但不是基本上形成在相同的基板上来扩展总传感器动态范围。

7. 发明授权

US07547480B2 Magnetic tunnel junction pressure sensors and methods 失效
标题翻译：磁隧道结压力传感器及方法
公开(公告)号：US07547480B2
公开(公告)日：2009-06-16
申请号：US11262064
申请日：2005-10-28
申请人： Young Sir Chung , Robert W. Baird , Bradley N. Engel
发明人： Young Sir Chung , Robert W. Baird , Bradley N. Engel
IPC分类号： H01L43/02 , G01L9/04 , G01L9/14 , G01L9/16
CPC分类号： G11C11/16 , G01L19/16 , Y10T428/1114 , Y10T428/1143 , Y10T428/1171
摘要： An integrated circuit device is provided which comprises a substrate, a conductive line configured to experience a pressure, and a magnetic tunnel junction (“MTJ”) core formed between the substrate and the current line. The conductive line is configured to move in response to the pressure, and carries a current which generates a magnetic field. The MTJ core has a resistance value which varies based on the magnetic field. The resistance of the MTJ core therefore varies with respect to changes in the pressure. The MTJ core is configured to produce an electrical output signal which varies as a function of the pressure.
摘要翻译：提供一种集成电路器件，其包括衬底，被配置为经历压力的导线和形成在衬底和电流线之间的磁性隧道结（“MTJ”）芯。导线被配置为响应于压力而移动，并且承载产生磁场的电流。 MTJ芯具有根据磁场而变化的电阻值。因此，MTJ芯的电阻因压力变化而变化。 MTJ内核被配置为产生作为压力的函数而变化的电输出信号。

8. 发明授权

US07510883B2 Magnetic tunnel junction temperature sensors and methods 失效
标题翻译：磁隧道结温度传感器及方法
公开(公告)号：US07510883B2
公开(公告)日：2009-03-31
申请号：US11239884
申请日：2005-09-30
申请人： Young Sir Chung , Robert W. Baird , Mark A. Durlam
发明人： Young Sir Chung , Robert W. Baird , Mark A. Durlam
IPC分类号： H01L21/00 , H01L27/14
CPC分类号： H01L27/228 , G01K7/36 , Y10T428/1114
摘要： Techniques of sensing a temperature of a heat source disposed in a substrate of an integrated circuit are provided. According to one exemplary method, a Magnetic Tunnel Junction (“MTJ”) temperature sensor is provided over the heat source. The MTJ temperature sensor comprises an MTJ core configured to output a current during operation thereof. The value of the current varies based on a resistance value of the particular MTJ core. The resistance value of the MTJ core varies as a function of the temperature of the heat source. A value of the current of the MTJ core can then be associated with a corresponding temperature of the heat source.
摘要翻译：提供了感测设置在集成电路的基板中的热源的温度的技术。根据一个示例性方法，在热源上提供磁隧道结（“MTJ”）温度传感器。 MTJ温度传感器包括被配置为在其操作期间输出电流的MTJ内核。电流值根据特定MTJ磁芯的电阻值而变化。 MTJ芯的电阻值随着热源的温度而变化。然后，MTJ芯的电流的值可以与热源的相应温度相关联。

9. 发明申请

US20080061309A1 Semiconductor device with under-filled heat extractor 审中-公开
标题翻译：半导体器件具有欠充电散热器
公开(公告)号：US20080061309A1
公开(公告)日：2008-03-13
申请号：US11490922
申请日：2006-07-21
申请人： Young Sir Chung , Robert W. Baird
发明人： Young Sir Chung , Robert W. Baird
IPC分类号： H01L33/00
CPC分类号： H01L29/0657 , H01L21/84 , H01L23/3677 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： Structure (40, 61-13, 61-15, 61-18, 61-19) and method (60-5 . . . 60-19, 100, 200) are provided for a semiconductor device (40, 61-13, 61-15, 61-18, 61-19) with under-filled heat extractor(s) (46, 46′, 78, 78′). The device (40, 61-13, 61-15, 61-18, 61-19) comprises a substrate (48, 72) with upper (37) and lower (63, 73) surfaces. A semiconductor (38, 72) is located proximate the upper surface (37) with a device region (26) therein. One or more cavities (67, 77) underlying the device region (26) are etched in the substrate (48, 72) from the lower surface (63, 73). A higher thermal conductivity material (68) versus the substrate (48, 72) fills the one or more cavities (67) and has an exposed surface (69, 69′, 79, 79′) underlying the device region (26) at or beyond the lower surface (63, 73). This provides the under-filled heat extractor(s) (46, 46′, 78, 78′). A composite substrate (48) is preferred, having a first semiconductor (38) extending to the upper surface (37) containing the device region (26), a second semiconductor (42) extending to the lower surface (63) and an insulating layer (36) therebetween, wherein the one or more cavities (67) extend from the lower surface (63) to the insulating layer (36) and the etch depth (671) is self limiting.
摘要翻译：提供了用于半导体器件（40,61-13,13）的方法（40,51-13,61-15,61-18,61-19）和方法（60-5。.60-19,190,200） 61 - 15，61 - 18，61 - 19）与充足的散热器（46,46'，78,78'）。装置（40,61-13,131-15,61-18,61-19）包括具有上部（37）和下部（63,73）表面的基底（48,72）。半导体（38,72）位于靠近上表面（37）处，其中具有器件区域（26）。下部表面（63,73）在衬底（48,72）中蚀刻位于器件区域（26）下面的一个或多个腔体（67,77）。相对于衬底（48,72），较高的导热材料（68）填充一个或多个空腔（67），并且在器件区域（26）下方具有暴露的表面（69,69'，79,79'）超出下表面（63,73）。这提供了未填充的散热器（46,46'，78,78'）。复合衬底（48）是优选的，具有延伸到包含器件区域（26）的上表面（37）的第一半导体（38），延伸到下表面（63）的第二半导体（42）和绝缘层（36），其中所述一个或多个空腔（67）从所述下表面（63）延伸到所述绝缘层（36），并且所述蚀刻深度（671）是自限制的。

10. 发明授权

US07262069B2 3-D inductor and transformer devices in MRAM embedded integrated circuits 失效
标题翻译： 3-D电感和变压器装置在MRAM嵌入式集成电路中
公开(公告)号：US07262069B2
公开(公告)日：2007-08-28
申请号：US11147599
申请日：2005-06-07
申请人： Young Sir Chung , Robert W. Baird , Mark A. Durlam , Bradley N. Engel
发明人： Young Sir Chung , Robert W. Baird , Mark A. Durlam , Bradley N. Engel
IPC分类号： H01L21/00
CPC分类号： H01L27/222 , G11C11/16 , H01F17/0006 , H01F19/04 , H01L23/5227 , H01L2924/0002 , H01L2924/00
摘要： An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and at least one inductance element formed on the same substrate using the same fabrication process technology. The inductance element, which may be an inductor or a transformer, is formed at the same metal layer (or layers) as the program lines of the MRAM architecture. Any available metal layer in addition to the program line layers can be added to the inductance element to enhance its efficiency. The concurrent fabrication of the MRAM architecture and the inductance element facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate, resulting in three-dimensional integration.
摘要翻译：集成电路器件包括磁性随机存取存储器（“MRAM”）结构以及使用相同的制造工艺技术在同一衬底上形成的至少一个电感元件。可以是电感器或变压器的电感元件形成在与MRAM架构的程序线相同的金属层（或多层）上。除了编程线层之外，可以将任何可用的金属层添加到电感元件以增强其效率。 MRAM架构和电感元件的并发制造有助于在衬底的有源电路块上可用的物理空间的有效和成本有效的使用，从而导致三维集成。

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