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    • 1. 发明授权
    • Digitally controlled crystal oscillator with integrated coarse and fine control
    • 数字控制晶体振荡器,集成粗细精细控制
    • US06747522B2
    • 2004-06-08
    • US10138027
    • 2002-05-03
    • David M. PietruszynskiDouglas R. Frey
    • David M. PietruszynskiDouglas R. Frey
    • H01G438
    • H03K3/0307H03B5/32H03B2201/025H03J2200/10H03L7/099
    • A method of tuning a DCXO includes the step of providing a coarse tuning array and a fine tuning array of capacitors fabricated on the same integrated circuit die. The coarse array is adjusted until the difference between a desired frequency and the output frequency corresponds to a change in capacitance no greater than half the range of the fine tuning array. In one embodiment, the fine tuning array is adjusted to mid-range before adjusting the coarse tuning array. A DCXO apparatus includes at least one integrated circuit segmented switched capacitor network providing a capacitance that is a nonmonotonic function of a composite input code. The segmented switched capacitor network includes parallel coupled binary weighted and thermometer coded switched capacitor networks for coarse and fine tuning, respectively.
    • 调谐DCXO的方法包括提供在同一集成电路管芯上制造的粗调谐阵列和电容器的微调阵列的步骤。 调整粗阵列,直到期望频率和输出频率之间的差值对应于不大于微调阵列范围的一半的电容变化。 在一个实施例中,在调整粗调谐阵列之前,将微调阵列调整到中等范围。 DCXO装置包括至少一个集成电路分段的开关电容器网络,其提供作为复合输入代码的非单调功能的电容。 分段开关电容网络分别包括用于粗调和微调的并联耦合二进制加权和温度计编码的开关电容器网络。
    • 3. 发明授权
    • Signal conditioning circuit for compressing audio signals
    • 用于压缩音频信号的信号调理电路
    • US5631968A
    • 1997-05-20
    • US469440
    • 1995-06-06
    • Douglas R. FreyPatrick Copley
    • Douglas R. FreyPatrick Copley
    • H03G7/00H03G7/06
    • H03G7/06H03G7/002
    • A signal conditioning circuit compresses an audio signal by producing a gain signal that is a function of the time-averaged audio signal and a compression ratio, and amplifying the audio signal by an exponential function of the gain signal. The conditioning circuit merges the functions of buffering the audio signal and producing a full-wave rectified version of the audio signal into a single buffer circuit. An averaging circuit generates a time-averaged signal in response to the full-wave rectified signal. An interface circuit includes downward expansion, compression and limiting circuits for scaling the time-averaged signal with a low compression ratio when it is less than a break point, with a selected compression ratio when it is between the break point and a rotation point, and with a high compression ratio when it exceeds the rotation point. The interface circuit produces the gain signal in response to the time-averaged signal and the corresponding compression ratio. A voltage controlled amplifier amplifies the buffered input signal by an exponential function of the gain signal to produce a compressed output signal.
    • 信号调理电路通过产生作为时间平均音频信号和压缩比的函数的增益信号来压缩音频信号,并且通过增益信号的指数函数来放大音频信号。 调理电路合并缓冲音频信号的功能,并将音频信号的全波整流版本合并成单个缓冲电路。 平均电路响应于全波整流信号产生时间平均信号。 接口电路包括向下扩展,压缩和限制电路,用于在小于断点时以低压缩比缩放时间平均信号,当其处于断点与旋转点之间时具有选定的压缩比,以及 当其超过旋转点时具有高压缩比。 接口电路响应于时间平均信号和相应的压缩比产生增益信号。 电压控制放大器通过增益信号的指数函数放大缓冲的输入信号,以产生压缩的输出信号。
    • 5. 发明授权
    • Voltage controlled element
    • 电压控制元件
    • US4471320A
    • 1984-09-11
    • US267691
    • 1981-05-27
    • Douglas R. Frey
    • Douglas R. Frey
    • H03G1/00H03F3/45H03G3/10
    • H03G1/0023
    • A voltage controlled element includes first and second pairs of transistors where bases of two of the transistors are connected to a reference voltage and bases of the remaining two transistors are connected to a control signal, emitters of transistors of respective pairs are connected together, differences in collector currents between transistors of said pairs define output signals from said element, including feedback means for providing as a portion of a signal input to means for drawing currents from said connected emitters signal outputs of said element.
    • 电压控制元件包括第一和第二对晶体管,其中两个晶体管的基极连接到参考电压,并且剩余的两个晶体管的基极连接到控制信号,各对的晶体管的发射极连接在一起, 所述对的晶体管之间的集电极电流限定来自所述元件的输出信号,包括用于将信号输入的一部分提供给用于从所述连接的发射器的所述元件的信号输出引出电流的装置的反馈装置。
    • 6. 发明授权
    • Universal battery charger
    • 通用电池充电器
    • US5113127A
    • 1992-05-12
    • US336065
    • 1989-04-11
    • Philip K. HoffmanDouglas R. Frey
    • Philip K. HoffmanDouglas R. Frey
    • H02J7/02
    • H02J7/022
    • A battery charger of the driven blocking oscillator type includes a three-winding transformer. The primary winding is connected in series with the collector-emitter path of a switching transistor. The secondary winding is connected in series with the collector-emitter path of a sense transistor which responds to the current flowing through the switching transistor. The tertiary winding is connected in series with the battery, series-connected batteries or series-connected battery packs sought to be recharged, via a diode, which may be connected in parallel with a capacitor. No smoothing capacitor is provided across the battery or batteries. The battery or batteries are charged by current pulses and discharge through the tertiary winding to repolarize the diode (and capacitor if present). The secondary winding is poled, with respect to the tertiary winding so that the blocking oscillator is driven by energy from the battery or batteries. The battery charger can operate over a wide range of input voltages with high efficiency, making it useful worldwide. The charger is effective to charge batteries and series connections thereof over a wide range of battery voltages. The charger will only function if at least one rechargeable battery is in circuit for charging. The charger may include circuitry for automatically taking substantially charged batteries or battery out of the charge path.
    • 驱动阻塞振荡器类型的电池充电器包括三绕组变压器。 初级绕组与开关晶体管的集电极 - 发射极路径串联连接。 次级绕组与响应于流过开关晶体管的电流的读出晶体管的集电极 - 发射极路径串联连接。 三次绕组与可与电容器并联连接的二极管与串联连接的电池或串联连接的电池或串联连接的电池组串联连接。 在电池或电池两端不提供平滑电容器。 电池或电池通过电流脉冲进行充电,并通过三级绕组进行放电,以使二极管(如果存在电容器)复极化。 次级绕组相对于三次绕组极化,使得阻挡振荡器由电池或电池的能量驱动。 电池充电器可以在多种输入电压下工作,效率高,使其在全球范围内有用。 该充电器有效地为电池充电和串联连接在宽范围的电池电压。 充电器只有在充电电池至少有一个充电电池充电时才起作用。 充电器可以包括用于自动地将充电电池或电池从充电路径中取出的电路。
    • 7. 发明授权
    • Monolithic voltage controlled element
    • 单片电压控制元件
    • US4560947A
    • 1985-12-24
    • US648889
    • 1984-09-10
    • Douglas R. Frey
    • Douglas R. Frey
    • H03G1/00H03F3/45H03G3/10
    • H03G1/0023
    • A monolithically fabricated voltage controlled element includes first and second pairs of transistors where bases of two of the transistors are connected to a reference voltage and bases of the remaining two transistors are connected to a control signal, emitters of transistors of respective pairs are connected together, where differences in collector currents between transistors of said pairs define output signals from said element, and includes circuitry providing variable compensation, user-selectable class A or class AB operation and distortion correction.
    • 单片制造的电压控制元件包括第一和第二对晶体管,其中两个晶体管的基极连接到参考电压,并且剩余的两个晶体管的基极连接到控制信号,各对晶体管的发射极连接在一起, 所述对的晶体管之间的集电极电流的差异限定来自所述元件的输出信号,并且包括提供可变补偿的电路,用户可选择的A类或AB类操作和失真校正。
    • 8. 发明申请
    • Power Supply with Digital Control Loop
    • 带数字控制回路的电源
    • US20090243701A1
    • 2009-10-01
    • US12060268
    • 2008-04-01
    • Geoffrey ThompsonSiddharth SundarDouglas R. FreyRussell J. ApfelMarius GoldenbergIon C. TesuRiad WahbyMichael J. Mills
    • Geoffrey ThompsonSiddharth SundarDouglas R. FreyRussell J. ApfelMarius GoldenbergIon C. TesuRiad WahbyMichael J. Mills
    • H03K17/56
    • H03K17/16
    • One embodiment of an apparatus for switching a transistor includes a first current mirror providing iB=K1i1, as a transistor base current, wherein the first current mirror is selectively driven by a current source i B   MAX K 1 . A second current mirror providing a feedback signal i2=K2iD to the first current mirror such that i 1 + i 2 = i B   MAX K 1 , wherein iD contributes to the transistor collector current, wherein iB=iBMAX−K1K2iD.
    • 用于切换晶体管的装置的一个实施例包括提供iB = K1i1的第一电流镜作为晶体管基极电流,其中第一电流镜由电流源选择性地驱动 B K 1 提供反馈信号的第二个电流镜 i2 = K2iD到第一个电流镜像,使得 1 + 2 mrow> = B “0.3em”height =“0.3ex”/> 最大 K 1
        • 9. 发明申请
        • Phase Error Cancellation
        • 相位误差消除
        • US20080211588A1
        • 2008-09-04
        • US11571077
        • 2005-06-28
        • Douglas R. FreyAxel ThomsenLigang Zhang
        • Douglas R. FreyAxel ThomsenLigang Zhang
        • H03L7/00H03B5/30
        • H03L7/0891H03L7/1976
        • A noise cancellation signal is generated for a fractional-N phase-locked loop (200). A divide value is provided to a first delta sigma modulator circuit (203), which generates a divide control signal to control a divide value of a feedback divider (208) in the phase-locked loop. An error term (e) is generated that is indicative of a difference between the generated divide control signal and the divide value supplied to the first delta sigma modulator circuit. The error term is integrated in an integrator (320) to generate an integrated error term (x), where xk+1=xk+ek; and a phase error correction circuit (209) utilizes the error term ek and the integrated error term xk to generate the phase error cancellation signal.
        • 对于分数N锁相环(200)产生噪声消除信号。 分频值被提供给第一ΔΣ调制器电路(203),其产生除法控制信号以控制锁相环中的反馈分频器(208)的除法值。 生成指示所生成的除法控制信号和提供给第一ΔΣ调制器电路的除法值之间的差异的误差项(e)。 误差项被集成在积分器(320)中,以产生积分误差项(x),其中x k + 1 + x + / SUP>; 并且相位误差校正电路(209)利用误差项e≠k和积分误差项x≠k来产生相位误差消除信号。