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    • 1. 发明授权
    • Audio dynamics processing control system with integration release window
    • US11641183B2
    • 2023-05-02
    • US16661954
    • 2019-10-23
    • James Kinney Waller, Jr.
    • James Kinney Waller, Jr.
    • H03G7/06H04R29/00H04R3/00
    • An improved dynamics processing control system incorporates an integration release window to virtually eliminate ripple in the final control signal used to control a Voltage Controlled Amplifier in a signal processor. The input audio signal is level detected using a logarithmic level detector and filtered to provide a very fast time constant. The fast release time constant signal is clamped at a maximum level equal to the user defined threshold and filtered by a second filter providing a very long release time constant. The long release time constant is dynamically varied by the fast time constant to provide an adaptive slow time constant. The fast time constant signal modifies the adaptive slow time constant when the difference between the fast time constant and the slow time constant exceeds a predefined integration release window. The integration release window is based on a minimum number of decibels which is larger than the maximum possible ripple in the fast time constant signal. The integration release window tracks the adaptive slow time constant signal to maintain the integration release window over the entire release range of the adaptive slow time constant decay. Once the difference between the fast time constant signal and adaptive slow time constant signal is less than the integration release window, the slow release signal reverts to the un-altered slow time constant release response.
    • 9. 发明授权
    • Logarithmic amplifier employing cascaded full-wave rectifiers including
emitter-coupled pairs with unbalanced emitter degeneration as
logarithmic elements
    • 采用级联全波整流器的对数放大器,包括具有不平衡发射极退化的发射极耦合对作为对数元件
    • US5561392A
    • 1996-10-01
    • US102493
    • 1993-08-05
    • Katsuji Kimura
    • Katsuji Kimura
    • G06G7/24H03G7/00H03G7/06H03G11/08G06F7/556G06G7/12
    • H03G7/001H03G7/06
    • A logarithmic amplification circuit is provided which is composed of a differential amplifier, a plurality of full-wave rectifiers including two half-wave rectifiers connected so as to have their input signals inverse in phase to each other and respectively receiving an output signal of the differential amplifier, and an adder for adding the output signals of the full-wave rectifier. Each of the half-wave rectifiers includes a differential transistor pair only one of which has an emitter resistor. Two sets of such differential transistor pair are arranged so that the collectors of transistors with emitter resistors are connected, the collectors of transistors without emitter resistors are connected, an output signal of the differential amplifier is applied to the base of one of the transistors having an emitter resistor and one of the transistors not having an emitter resistor, another output signal of the differential amplifier is applied to the base of the other of the transistors having an emitter resistor and the other of the transistors not having an emitter resistor, and the transistors of each pair are connected, respectively, to constant current sources.
    • 提供了一种对数放大电路,它由差分放大器组成,多个全波整流器包括两个半波整流器,它们连接成使它们的输入信号彼此相位相反,分别接收差分输出信号 放大器和用于相加全波整流器的输出信号的加法器。 每个半波整流器包括一个差分晶体管对,其中仅一个具有发射极电阻。 布置两组这样的差分晶体管对,使得具有发射极电阻的晶体管的集电极连接,没有发射极电阻的晶体管的集电极被连接,差分放大器的输出信号被施加到具有 发射极电阻器和不具有发射极电阻器的晶体管之一,差分放大器的另一个输出信号被施加到具有发射极电阻器的另一个晶体管的基极,而另一个晶体管没有发射极电阻器,晶体管 分别连接到恒定电流源。