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1. 发明授权

US07980694B2 Functional imaging of the retina 有权
标题翻译：视网膜的功能成像
公开(公告)号：US07980694B2
公开(公告)日：2011-07-19
申请号：US12305319
申请日：2007-06-19
申请人： David Keating , Stuart Parks
发明人： David Keating , Stuart Parks
IPC分类号： A61B3/14 , A61B3/00
CPC分类号： A61B3/1225 , A61B3/102
摘要： An apparatus and a method for obtaining, in vivo, a measurement of retinal response to an optical stimuli. Light sources provide optical stimuli to the retina in accordance with predetermined stimulation sequences, and images of the retina are obtained and correlated with the predetermined stimulation sequences so as to determine responses of the retina to the optical stimuli. In one particular embodiment, optical stimuli are provided according to m-sequences and correlated with corresponding optical coherence tomography images to determine a functional response of the retina.
摘要翻译：用于在体内获得对光学刺激的视网膜反应的测量的装置和方法。光源根据预定的刺激序列向视网膜提供光学刺激，并且获得视网膜的图像并与预定的刺激序列相关联，以便确定视网膜对光学刺激的响应。在一个具体实施例中，根据m序列提供光学刺激，并与相应的光学相干断层摄影图像相关联，以确定视网膜的功能响应。

2. 发明申请

US20090128776A1 FUNCTIONAL IMAGING OF THE RETINA 有权
标题翻译： RETINA的功能成像
公开(公告)号：US20090128776A1
公开(公告)日：2009-05-21
申请号：US12305319
申请日：2007-06-19
申请人： David Keating , Stuart Parks
发明人： David Keating , Stuart Parks
IPC分类号： A61B3/12 , A61B3/14
CPC分类号： A61B3/1225 , A61B3/102
摘要： An apparatus and a method for obtaining, in vivo, a measurement of retinal response to an optical stimuli. Light sources provide optical stimuli to the retina in accordance with predetermined stimulation sequences, and images of the retina are obtained and correlated with the predetermined stimulation sequences so as to determine responses of the retina to the optical stimuli. In one particular embodiment, optical stimuli are provided according to m-sequences and correlated with corresponding optical coherence tomography images to determine a functional response of the retina.
摘要翻译：用于在体内获得对光学刺激的视网膜反应的测量的装置和方法。光源根据预定的刺激序列向视网膜提供光学刺激，并且获得视网膜的图像并与预定的刺激序列相关联，以便确定视网膜对光学刺激的响应。在一个具体实施例中，根据m序列提供光学刺激，并与相应的光学相干断层摄影图像相关联，以确定视网膜的功能响应。

3. 发明授权

US06984156B2 Connector for surface mounting subassemblies vertically on a mother board and assemblies comprising the same 失效
标题翻译：表面安装子组件的连接器垂直放置在母板上，以及包括该组件的组件
公开(公告)号：US06984156B2
公开(公告)日：2006-01-10
申请号：US10715908
申请日：2003-11-18
申请人： David Keating , Antoin Russell
发明人： David Keating , Antoin Russell
IPC分类号： H01R4/02
CPC分类号： H01R12/57 , H01R12/52 , H01R13/03 , H05K3/3405 , H05K3/3426 , H05K3/366 , H05K2201/1031 , Y02P70/611
摘要： In accordance with the invention a surface mount connector is provided for vertically mounting one circuit device on another. By “vertically mounting” is meant that a circuit device with a major surface is mounted perpendicular to the major surface of another circuit device. The connector is a conductive body comprising a base section and a transverse section, the base section having a width greater than the transverse section and a length which extends beyond the transverse section. Advantageously, the base section extends beyond the transverse section in front, behind and on both sides. In typical use, a major surface of a subassembly can be connected to the transverse section and an edge of the subassembly can be connected to the base extensions. The base can then be connected to the mother board. With this mounting, problems of co-plurality are substantially eliminated, higher densities in the use of subassemblies can be achieved and low resistance, low inductance connection can be provided along with effective heat dissipation.
摘要翻译：根据本发明，提供了用于将一个电路装置垂直安装在另一电路装置上的表面安装连接器。 “垂直安装”是指具有主表面的电路装置垂直于另一个电路装置的主表面安装。连接器是导电体，其包括基部和横截面，所述基部具有大于横截面的宽度，并且延伸超过横截面的长度。有利地，基部在前部，后部和两侧延伸超过横截面。在典型的使用中，子组件的主表面可以连接到横截面，并且子组件的边缘可以连接到基部延伸部。然后可以将底座连接到母板。通过这种安装，基本上消除了共同的问题，可以实现使用子组件的更高的密度，并且可以提供低电阻，低电感连接以及有效的散热。

4. 发明授权

US4873652A Method of graphical manipulation in a potentially windowed display 失效
标题翻译：潜在的窗口显示中的图形操作方法
公开(公告)号：US4873652A
公开(公告)日：1989-10-10
申请号：US273627
申请日：1988-11-27
申请人： John Pilat , David Keating , Wayne Colella
发明人： John Pilat , David Keating , Wayne Colella
IPC分类号： G09G5/14
CPC分类号： G09G5/14
摘要： A method is disclosed which enhances the ability of digital computer system to manage displays, especially in an environment where a single physical display supports a plurality of logical displays (windows). Machine-language instructions are provided which, in conjunction with user-supplied form descriptors describing each of the windows, enable management and generation of display image data to be performed directly by the processing hardware of the digital computer system, eliminating any need for intervening interpretive software. Data computed from form descriptors may be encached, enhancing the speed of consecutive operations on windows. Graceful creation is enhanced by permitting processing control to escape to software fault handlers.
摘要翻译：公开了一种增强数字计算机系统管理显示器的能力的方法，特别是在单个物理显示器支持多个逻辑显示器（窗口）的环境中。提供了机器语言指令，其结合用户提供的描述每个窗口的形式描述符，使得能够由数字计算机系统的处理硬件直接执行显示图像数据的管理和生成，从而消除了对中间解释的任何需要软件。从表单描述符计算的数据可能会被加密，从而提高窗口上连续操作的速度。通过允许处理控制转移到软件故障处理程序来增强优雅的创建。

5. 发明授权

US06707288B2 Apparatus for producing and testing electronic units 失效
标题翻译：用于生产和测试电子单元的设备
公开(公告)号：US06707288B2
公开(公告)日：2004-03-16
申请号：US10106887
申请日：2002-03-26
申请人： David Keating
发明人： David Keating
IPC分类号： G01R3102
CPC分类号： H05K1/0268 , G01R31/2818 , H05K3/0052
摘要： A carrier board which has a plurality of conduction layers is provided. A plurality of electronic units are produced on surface regions of the board with electronic components arranged at regular spacing. The surface regions, for use in a separation operation, are held at predetermined separating regions to a frame. The frame has an externally contactable, connecting region for an operating voltage or load for electronic units. Each electronic unit can be acted upon with the operating voltage or a load, by way of supply, load and/or signal lines in the frame and at separating regions of the carrier board. The electronic units can be operated and tested by the supply as well as the load and/or signal lines in a full-load mode of operation.
摘要翻译：提供具有多个导电层的载体板。在板的表面区域上制造多个电子单元，电子部件以规则的间隔布置。用于分离操作的表面区域被保持在预定的分离区域到框架。框架具有用于电子单元的工作电压或负载的外部可接触的连接区域。每个电子单元可以通过工作电压或负载，通过框架中的电源，负载和/或信号线以及载板的分离区域进行操作。电子单元可以在满载运行模式下由电源以及负载和/或信号线进行操作和测试。

6. 发明授权

US06940724B2 DC-DC converter implemented in a land grid array package 失效
标题翻译： DC-DC转换器实现在一个平面阵列封装中
公开(公告)号：US06940724B2
公开(公告)日：2005-09-06
申请号：US10691833
申请日：2003-10-22
申请人： Mysore Purushotham Divakar , David Keating , Antoin Russell
发明人： Mysore Purushotham Divakar , David Keating , Antoin Russell
IPC分类号： H01L23/48 , H01L23/36 , H01L23/367 , H01L23/538 , H01L25/16 , H02M3/00 , H02M3/10 , H02M3/158 , H05K7/20
CPC分类号： H01L25/165 , H01L23/36 , H01L23/3677 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/32225 , H01L2224/48227 , H01L2224/48471 , H01L2224/49111 , H01L2924/00011 , H01L2924/00014 , H01L2924/01015 , H01L2924/01077 , H01L2924/01078 , H01L2924/10253 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H02M3/00 , H02M3/10 , H02M3/1588 , Y02B70/1466 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/01033
摘要： A semiconductor chip package that includes a DC—DC converter implemented with a land grid array (LGA) package for interconnection and surface mounting to a printed circuit board. The LGA package integrates all required active components of the DC—DC power converter, including a synchronous buck PWM controller, driver circuits, and MOSFET devices. In particular, the LGA package comprises a substrate having a top surface and a bottom surface, with a DC—DC converter provided on the substrate. The DC—DC converter including at least one power silicon die disposed on the top surface of the substrate. A plurality of electrically and thermally conductive pads are provided on the bottom surface of the substrate in electrical communication with the DC—DC converter through respective conductive vias. The plurality of pads include first pads having a first surface area and second pads having a second surface area, the second surface area being substantially larger than the first surface area. Heat generated by the DC—DC converter is conducted out of the LGA package through the plurality of pads.
摘要翻译：一种半导体芯片封装，其包括用陆架网格阵列（LGA）封装实现的DC-DC转换器，用于互连和表面安装到印刷电路板。 LGA封装集成了DC-DC电源转换器的所有必需的有源组件，包括同步降压PWM控制器，驱动器电路和MOSFET器件。特别地，LGA封装包括具有顶表面和底表面的衬底，其中设置在衬底上的DC-DC转换器。所述DC-DC转换器包括设置在所述衬底的顶表面上的至少一个功率硅片。多个导电和导热焊盘设置在基板的底表面上，通过相应的导电通孔与DC-DC转换器电连通。所述多个焊盘包括具有第一表面区域的第一焊盘和具有第二表面区域的第二焊盘，所述第二表面区域基本上大于所述第一表面区域。由DC-DC转换器产生的热量通过多个焊盘从LGA封装中导出。

7. 发明申请

US20050052849A1 Arrangement for surface mounting of subassemblies on a mother board 有权
标题翻译：组件表面安装在母板上的布置
公开(公告)号：US20050052849A1
公开(公告)日：2005-03-10
申请号：US10715907
申请日：2003-11-18
申请人： David Keating , Antoin Russell , Mysore Divakar , Thomas Templeton , John Maxwell
发明人： David Keating , Antoin Russell , Mysore Divakar , Thomas Templeton , John Maxwell
IPC分类号： H01R20060101 , H01R43/02 , H05K7/20
CPC分类号： H01R12/52 , H01R12/57 , H01R12/7064 , H01R43/0263
摘要： The invention provides arrangements to facilitate surface mounting of subassembly boards on a motherboard with reliable, high conductivity interconnection. In accordance with the invention, the subassembly interconnection arrangement is composed of separate power and sense connector arms formed on one or more base headers. The arrangement interconnects and supports the subassembly board on the motherboard surface. Each power arm advantageously comprises a plurality of split-based mounting lugs secured to the arm in a coplanar configuration. Each sense connector arm preferably comprises a plurality of connector pins secured to the arm in a coplanar configuration. Embodiments are disclosed for vertical and horizontal surface mounting.
摘要翻译：本发明提供了便于在具有可靠的高导电性互连的母板上表面安装子组件板的布置。根据本发明，子组件互连装置由形成在一个或多个底部集管上的分开的功率和感测连接臂构成。该布置将主组件板上的子组件板互连并支撑。每个动力臂有利地包括以共面构造固定到臂的多个基于分组的安装凸耳。每个感测连接器臂优选地包括以共面构造固定到臂的多个连接器销。公开了用于垂直和水平表面安装的实施例。

8. 发明授权

US06815614B1 Arrangement for co-planar vertical surface mounting of subassemblies on a mother board 有权
标题翻译：组件在母板上的共面垂直表面安装的布置
公开(公告)号：US06815614B1
公开(公告)日：2004-11-09
申请号：US10716134
申请日：2003-11-18
申请人： David Keating , Antoin Russell
发明人： David Keating , Antoin Russell
IPC分类号： H02G308
CPC分类号： H05K3/366 , H05K3/303 , H05K7/1431 , H05K2203/0195 , H05K2203/082
摘要： The invention provides a subassembly to facilitate co-planar vertical surface mounting of subassembly boards. By “vertically mounting” is meant that a subassembly circuit board with a major surface is mounted perpendicular to the major surface of a circuit motherboard. In accordance with the invention, a subassembly for co-planar vertical surface mounting comprises a subassembly board coupled between a pair of base headers. Advantageously one base header comprises a plurality of mounting lugs secured to a transverse element in a co-planar configuration. The other base header conveniently comprises a plurality of connector pins secured to an elongated header element in co-planar configuration. The two headers interlock with the board to provide connection and co-planar support. A pickup cap attached at the board edge opposite the base permits pick-and-place positioning of the subassembly by conventional equipment without the need for special grippers.
摘要翻译：本发明提供了一种子组件，以便于子组件板的共面垂直表面安装。 “垂直安装”是指具有主表面的子组装电路板垂直于电路母板的主表面安装。根据本发明，用于共面垂直表面安装的子组件包括联接在一对基座之间的子组件板。有利地，一个基座头部包括以共平面构造固定到横向元件的多个安装凸耳。另一个基座头部方便地包括多个连接器销，该连接器销以共平面构造固定到细长的头部元件。两个头部与电路板互锁以提供连接和共面支撑。连接在与基座相对的板边缘处的拾取盖允许通过常规设备的子组件的拾取和定位定位，而不需要特殊的夹具。

9. 发明授权

US07253506B2 Micro lead frame package 有权
标题翻译：微型引线框架封装
公开(公告)号：US07253506B2
公开(公告)日：2007-08-07
申请号：US10602100
申请日：2003-06-23
申请人： David Keating
发明人： David Keating
IPC分类号： H01L23/495 , H01L21/00 , H01R9/00
CPC分类号： H01L23/3135 , H01L21/561 , H01L21/565 , H01L23/49575 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48257 , H01L2224/49111 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1433 , H01L2924/181 , H01L2924/19041 , H01L2924/3011 , H01L2924/00014 , H01L2224/85 , H01L2924/00 , H01L2924/00012
摘要： The present invention comprises a lead frame substrate adapted to receive semiconductor die and multiple passive components. The lead frame substrate is preferably formed from a single piece of electrically conductive material, such as copper, and may be mounted within a lead frame package or directly onto a circuit board. The lead frame substrate includes mounting surfaces adapted to receive the semiconductor dice and passive components. The mounting surfaces are linked together by temporary and/or permanent connection bars. A method to manufacture the lead frame package includes, among other steps, forming a lead frame substrate, applying a molding compound to the lead frame substrate to fix each mounting surface and connection bar in place, removing the temporary connection bars, mounting the semiconductor components on the lead frame substrate, and applying a packaging material over the lead frame substrate to encapsulate the semiconductor components.
摘要翻译：本发明包括适于接收半导体管芯和多个无源部件的引线框架基板。引线框架基板优选由诸如铜的单片导电材料形成，并且可以安装在引线框架封装内或直接安装到电路板上。引线框架基板包括适于接收半导体管芯和无源部件的安装表面。安装表面通过临时和/或永久连接杆连接在一起。制造引线框架封装的方法包括形成引线框架基板，将引导框架基板施加到引线框架基板上以将每个安装表面和连接条固定到位，移除临时连接杆，安装半导体部件在所述引线框架基板上，并且在所述引线框架基板上施加封装材料以封装所述半导体部件。

10. 发明授权

US07027305B2 Arrangement for surface mounting of subassemblies on a mother board 有权
标题翻译：组件表面安装在母板上的布置
公开(公告)号：US07027305B2
公开(公告)日：2006-04-11
申请号：US10715907
申请日：2003-11-18
申请人： David Keating , Antoin Russell , Mysore P. Divakar , Thomas H. Templeton , John Alan Maxwell
发明人： David Keating , Antoin Russell , Mysore P. Divakar , Thomas H. Templeton , John Alan Maxwell
IPC分类号： H05K7/20
CPC分类号： H01R12/52 , H01R12/57 , H01R12/7064 , H01R43/0263
摘要： The invention provides arrangements to facilitate surface mounting of subassembly boards on a motherboard with reliable, high conductivity interconnection. In accordance with the invention, the subassembly interconnection arrangement is composed of separate power and sense connector arms formed on one or more base headers. The arrangement interconnects and supports the subassembly board on the motherboard surface. Each power arm advantageously comprises a plurality of split-based mounting lugs secured to the arm in a coplanar configuration. Each sense connector arm preferably comprises a plurality of connector pins secured to the arm in a coplanar configuration. Embodiments are disclosed for vertical and horizontal surface mounting.
摘要翻译：本发明提供了便于在具有可靠的高导电性互连的母板上表面安装子组件板的布置。根据本发明，子组件互连装置由形成在一个或多个底部集管上的分开的功率和感测连接臂构成。该布置将主组件板上的子组件板互连并支撑。每个动力臂有利地包括以共面构造固定到臂的多个基于分组的安装凸耳。每个感测连接器臂优选地包括以共面构造固定到臂的多个连接器销。公开了用于垂直和水平表面安装的实施例。

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