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    • 2. 发明授权
      US07165110B2 System and method for simultaneously establishing multiple connections 有权
    • System and method for simultaneously establishing multiple connections
    • 同时建立多个连接的系统和方法
    • US07165110B2
    • 2007-01-16
    • US09903725
    • 2001-07-12
    • Danny Marvin Neal , Gregory Francis Pfister , Renato John Recio
    • Danny Marvin Neal , Gregory Francis Pfister , Renato John Recio
    • G06F15/16 , G06F11/30 , G06F12/14 , H04L9/32 , H04L9/00
    • H04L29/06 , H04L69/14 , H04L69/22 , Y02D50/30
    • A system and method for establishing multiple connections using a private data field of a communication management protocol is provided. With the present invention, a Service ID identifies a specific consumer and the private data field contains a list of connection attributes for each connection that is to be established. An active side requests a connection and the passive side replies to the connection request. The active side sends the passive side a connection establishment request. This connection establishment request includes a Service ID which identifies a passive side process associated with a service. This connection establishment request also includes communication attributes of one or more connected services and datagram services associated with the Service ID. The passive passes the connection request to a process associated with the service. If the passive side process does not wish to carry out the service, a negative reply message is returned to the active side. If the passive side process does wish to carry out the service, a positive reply is returned to the active side and the reply includes the communication attributes for the connection and unreliable services associated with the Service ID used in the connection establishment request.
    • 提供了一种使用通信管理协议的私有数据字段建立多个连接的系统和方法。 利用本发明，服务ID标识特定消费者，并且专用数据字段包含要建立的每个连接的连接属性的列表。 主动端请求连接，被动方回复连接请求。 主动端将被动方发送连接建立请求。 该连接建立请求包括识别与服务相关联的被动侧进程的服务ID。 该连接建立请求还包括与服务ID相关联的一个或多个连接的服务和数据报服务的通信属性。 被动将连接请求传递给与服务关联的进程。 如果被动侧进程不希望执行该服务，则将一个否定的回复消息返回到主动端。 如果被动侧进程确实希望执行该服务，则肯定的答复返回到主动侧，并且回复包括用于连接的通信属性和与在连接建立请求中使用的服务ID相关联的不可靠服务。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 9. 发明授权
      US06324612B1 Associating buffers in a bus bridge with corresponding peripheral devices to facilitate transaction merging 失效
    • Associating buffers in a bus bridge with corresponding peripheral devices to facilitate transaction merging
    • 将总线桥中的缓冲区与对应的外围设备相关联，以便于事务合并
    • US06324612B1
    • 2001-11-27
    • US09210133
    • 1998-12-10
    • Wen-Tzer Thomas Chen , Richard A. Kelley , Danny Marvin Neal , Steven Mark Thurber
    • Wen-Tzer Thomas Chen , Richard A. Kelley , Danny Marvin Neal , Steven Mark Thurber
    • G06F1340
    • G06F13/4059 , G06F13/4031
    • A bus bridge including a buffer pool and steering logic where the buffer pool is organized as a plurality of buffers sets including at least first and second buffer sets and the steering logic is adapted to store transactions originating with a first peripheral device in the first buffer set and transactions originating with a second peripheral device in the second buffer set. Transactions may arrive via a secondary bus, such as a PCI bus, coupled to the bus bridge. The bridge further allows relaxed transaction ordering rules compared to conventional PCI transaction ordering rules by identifying transactions by grant signals and thus allows steering of transactions from the first and second devices to first and second buffer sets respectively. The bridge is suitably adapted for combining or merging two or more transactions within each buffer set. Each buffer set preferably includes one or more buffers for temporarily storing transactions arriving from the secondary bus and bound for a primary bus. The primary bus may comprise a host bus connected to one or more processors or an additional PCI bus or other peripheral bus. The invention further contemplates a computer system including at least one processor, a bridge coupled to the processor via a host bus, and a plurality of peripheral devices including first and second peripheral devices coupled to the bridge via a secondary bus. In one embodiment, the bridge is configured to receive first and second request signals from the first and second peripheral devices respectively. The bridge preferably further includes arbitration logic for arbitrating mastership of the secondary bus in response to the request signals to produce first and second grant signals. The steering logic is suitably configured to utilize the first and second grant signals to determine the source of a subsequent transaction.
    • 一种包括缓冲池和转向逻辑的总线桥，其中所述缓冲池被组织为包括至少第一和第二缓冲器组的多个缓冲器组，并且所述转向逻辑适于将始发于第一外围设备的事务存储在所述第一缓冲器组中 以及在第二缓冲器组中产生具有第二外围设备的交易。 事务可以通过耦合到总线桥的辅助总线（诸如PCI总线）到达。 与传统PCI事务排序规则相比，通过由授权信号识别事务并且因此允许将事务从第一和第二设备分别转向第一和第二缓冲器组，桥还允许轻松的事务排序规则。 该桥适用于组合或合并每个缓冲区内的两个或多个事务。 每个缓冲器组优选地包括一个或多个缓冲器，用于临时存储从次级总线到达并且被绑定到主总线的事务。 主总线可以包括连接到一个或多个处理器或附加PCI总线或其他外围总线的主机总线。 本发明进一步考虑了一种包括至少一个处理器，经由主机总线耦合到处理器的桥的计算机系统，以及包括通过次级总线耦合到桥接器的第一和第二外围设备的多个外围设备。 在一个实施例中，桥被配置为分别从第一和第二外围设备接收第一和第二请求信号。 桥接器优选地还包括用于响应于请求信号来仲裁辅助总线的主管以产生第一和第二授权信号的仲裁逻辑。 转向逻辑被适当地配置为利用第一和第二授权信号来确定后续交易的来源。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
    • 10. 发明授权
      US06301630B1 Interrupt response in a multiple set buffer pool bus bridge 失效
    • Interrupt response in a multiple set buffer pool bus bridge
    • 多组缓冲池总线桥中的中断响应
    • US06301630B1
    • 2001-10-09
    • US09210127
    • 1998-12-10
    • Wen-Tzer Thomas Chen , Richard A. Kelley , Danny Marvin Neal , Steven Mark Thurber
    • Wen-Tzer Thomas Chen , Richard A. Kelley , Danny Marvin Neal , Steven Mark Thurber
    • G06F1300
    • G06F13/4059
    • A bus bridge including a buffer pool comprised of a first and a second buffer sets. The first and second buffer sets are associated with first and second peripheral devices respectively. The bridge is configured to receive an interrupt and identify the interrupt source. A buffer set associated with the interrupt source is selected and transactions in the selected buffer set flushed prior to forwarding the interrupt to a processor. The bridge is preferably configured to identify the interrupt source by receiving a first interrupt signal from the first peripheral device and a second interrupt signal from the second peripheral device. Preferably, the bridge is configured to flush the transactions by pushing them into system memory via a primary bus such as a host bus of a processor. The invention further contemplates a system including a processor coupled to a host bus, a system memory, a bus bridge as described coupled between the host bus and a secondary bus, and first and second peripheral devices coupled to the secondary bus. Upon receiving an interrupt, the bridge is configured to identify the interrupt source, select a buffer set associated with the interrupt source, and flush posted memory write transactions in the selected buffer set, all prior to forwarding the interrupt to the processor. In one embodiment, the bridge, the first and second peripheral devices, and the secondary bus are compliant with the PCI specification. The bridge is configured in one embodiment to receive unique first and second interrupt signals from the first and second peripheral devices respectively.
    • 包括由第一和第二缓冲器组构成的缓冲池的总线桥。 第一和第二缓冲器组分别与第一和第二外围设备相关联。 桥接器配置为接收中断并识别中断源。 选择与中断源关联的缓冲区，并将所选缓冲区中的事务刷新，然后再将中断转发给处理器。 优选地，桥被配置为通过从第一外围设备接收第一中断信号和来自第二外围设备的第二中断信号来识别中断源。 优选地，桥被配置为通过经由诸如处理器的主机总线的主总线将其推入系统存储器来刷新事务。 本发明进一步考虑了一种系统，其包括耦合到主机总线的处理器，系统存储器，耦合在主机总线和辅助总线之间的总线桥，以及耦合到次级总线的第一和第二外围设备。 在接收到中断时，桥被配置为识别中断源，选择与中断源相关联的缓冲区集合，以及在将中断转发到处理器之前清除所选缓冲区中的已发布的存储器写入事务。 在一个实施例中，桥接器，第一和第二外围器件以及辅助总线符合PCI规范。 在一个实施例中，桥被配置为分别从第一和第二外围设备接收唯一的第一和第二中断信号。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
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