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    • 4. 发明授权
    • Protective layer for large-scale production of thin-film solar cells
    • 用于大规模生产薄膜太阳能电池的保护层
    • US08110738B2
    • 2012-02-07
    • US12379427
    • 2009-02-20
    • Chris SchmidtJohn Corson
    • Chris SchmidtJohn Corson
    • H01L31/00
    • H01L31/022425H01L31/022466H01L31/0392H01L31/03928H01L31/056Y02E10/52Y02E10/541
    • A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 μm, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
    • 太阳能电池包括基板,位于基板的第一表面上的保护层,位于基板的第二表面上的第一电极,位于第一电极上方的至少一个p型半导体吸收层,n型 半导体层位于p型半导体吸收体层上方,第二电极位于n型半导体层的上方。 p型半导体吸收层包括基于铜铟硒(CIS)的合金材料,第二电极是透明和导电的。 保护层的波长为2μm时的发射率大于0.25,与含有硒的气体的反应性低于衬底的反应性,并且与第一电极的组成,厚度,密度, 发射率,电导率或应力状态。 保护层的发射率曲线可以是均匀的或不均匀的。
    • 5. 发明申请
    • Composition and Method of Forming an Insulating Layer in a Photovoltaic Device
    • 在光伏器件中形成绝缘层的组成和方法
    • US20110318941A1
    • 2011-12-29
    • US13223826
    • 2011-09-01
    • Chris SchmidtBruce Hachtmann
    • Chris SchmidtBruce Hachtmann
    • H01L21/314C09D5/25
    • H01L31/072C23C14/086C23C14/562H01L31/0322H01L31/18Y02E10/541Y02P70/521
    • A solar cell includes a first electrode located over a substrate, at least one p-type semiconductor absorber layer located over the first electrode, the p-type semiconductor absorber layer comprising a copper indium selenide (CIS) based alloy material, an n-type semiconductor layer located over the p-type semiconductor absorber layer, an insulating aluminum zinc oxide layer located over the n-type semiconductor layer, the insulating aluminum zinc oxide having an aluminum content of 100 ppm to 5000 ppm and a second electrode over the insulating aluminum layer, the second electrode being transparent and electrically conductive. The insulating aluminum zinc oxide having an aluminum content of 100 ppm to 5000 ppm, may be deposited by pulsed DC, non-pulsed DC, or AC sputtering from an aluminum doped zinc oxide having an aluminum content of 100 ppm to 5000 ppm.
    • 太阳能电池包括位于基板上的第一电极,位于第一电极上方的至少一个p型半导体吸收体层,包含铜铟硒(CIS)基合金材料的p型半导体吸收层,n型 位于p型半导体吸收体层上的半导体层,位于n型半导体层上方的绝缘铝氧化锌层,铝含量为100ppm〜5000ppm的绝缘铝氧化锌和绝缘铝上的第二电极 层,第二电极是透明和导电的。 铝含量为100ppm至5000ppm的绝缘铝氧化锌可以通过脉冲DC,非脉冲DC或AC溅射从铝含量为100ppm至5000ppm的铝掺杂氧化锌中沉积。
    • 6. 发明申请
    • Protective Layer for Large-Scale Production of Thin-Film Solar Cells
    • 薄膜太阳能电池大规模生产保护层
    • US20110318868A1
    • 2011-12-29
    • US13230305
    • 2011-09-12
    • Chris SchmidtJohn Corson
    • Chris SchmidtJohn Corson
    • H01L31/0264
    • H01L31/022425H01L31/022466H01L31/0392H01L31/03928H01L31/056Y02E10/52Y02E10/541
    • A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 μm, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
    • 太阳能电池包括基板,位于基板的第一表面上的保护层,位于基板的第二表面上的第一电极,位于第一电极上方的至少一个p型半导体吸收层,n型 半导体层位于p型半导体吸收体层上方,第二电极位于n型半导体层的上方。 p型半导体吸收层包括基于铜铟硒(CIS)的合金材料,第二电极是透明和导电的。 保护层的波长为2μm时的发射率大于0.25,与含有硒的气体的反应性低于衬底的反应性,并且与第一电极的组成,厚度,密度, 发射率,电导率或应力状态。 保护层的发射率曲线可以是均匀的或不均匀的。
    • 8. 发明授权
    • Protective layer for large-scale production of thin-film solar cells
    • 用于大规模生产薄膜太阳能电池的保护层
    • US08389321B2
    • 2013-03-05
    • US13230305
    • 2011-09-12
    • Chris SchmidtJohn Corson
    • Chris SchmidtJohn Corson
    • H01L21/00
    • H01L31/022425H01L31/022466H01L31/0392H01L31/03928H01L31/056Y02E10/52Y02E10/541
    • A solar cell includes a substrate, a protective layer located over a first surface of the substrate, a first electrode located over a second surface of the substrate, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode over the n-type semiconductor layer. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material, and the second electrode is transparent and electrically conductive. The protective layer has an emissivity greater than 0.25 at a wavelength of 2 μm, has a reactivity with a selenium-containing gas lower than that of the substrate, and may differ from the first electrode in at least one of composition, thickness, density, emissivity, conductivity or stress state. The emissivity profile of the protective layer may be uniform or non-uniform.
    • 太阳能电池包括基板,位于基板的第一表面上的保护层,位于基板的第二表面上的第一电极,位于第一电极上方的至少一个p型半导体吸收层,n型 半导体层位于p型半导体吸收体层上方,第二电极位于n型半导体层的上方。 p型半导体吸收层包括基于铜铟硒(CIS)的合金材料,第二电极是透明和导电的。 保护层的波长为2μm时的发射率大于0.25,与含有硒的气体的反应性低于衬底的反应性,并且与第一电极的组成,厚度,密度, 发射率,电导率或应力状态。 保护层的发射率曲线可以是均匀的或不均匀的。
    • 10. 发明授权
    • Method for construction and fabrication of submicron field-effect
transistors by optimization of poly oxide process
    • 通过优化多晶氧化物工艺构建和制造亚微米场效应晶体管的方法
    • US5858844A
    • 1999-01-12
    • US485871
    • 1995-06-07
    • Hao FangFarrokh Omid-ZehoorTodd LukancChris Schmidt
    • Hao FangFarrokh Omid-ZehoorTodd LukancChris Schmidt
    • H01L21/28H01L21/336H01L29/423H01L21/31H01L21/469
    • H01L21/28211H01L21/28114H01L29/42368H01L29/6659
    • The present invention comprises an innovative gate oxidation process after the disposition of the gate and prior to the disposition of the source and the drain by exposing the gate to oxygen at a predetermined temperature and for a predetermined time period for the optimized transistor performance. During the innovative gate oxidation process, oxygen penetrates into the interfaces of the gate conductive layer gate oxide and the gate dielectric layer silicon substrate and oxidizes portions of the gate conductive layer at the interfaces due to the oxygen smiling or the bird beak effect, which results in an increased effective thickness of the gate dielectric layer. Optionally, HCl can be introduced at a predetermined flowrate during the innovative gate oxidation process. A particular embodiment of the present invention is the fabrication of MOS transistors with polysilicon as the gate conductive layer and silicon oxide as the gate dielectric layer, and with the source and drain fabricated by the low doped drain (LDD) implant. In this particular case, the innovative gate oxidation process is a polysilicon oxidation (POX) process grown before LDD implant. The oxidation temperature and oxidation time duration for optimized transistor performances have been found to be 850.degree. C. and 115 minutes, respectively. This present invention is utilized to achieve maximum speed and performance by optimizing the POX process.
    • 本发明包括在门的配置之后并且在通过在预定温度下将栅极暴露于氧气并在预定时间段内对于优化的晶体管性能进行设置之前的创新的栅极氧化工艺。 在创新的栅极氧化过程中,氧气渗透入栅极导电层栅极氧化物和栅极电介质层硅衬底的界面,并由于氧气微笑或鸟喙效应而在界面处氧化栅极导电层的部分,从而导致 在栅介电层的有效厚度增加。 任选地,可以在创新的栅极氧化过程期间以预定流量引入HCl。 本发明的一个具体实施例是制造具有多晶硅作为栅极导电层和氧化硅作为栅极介电层的MOS晶体管,并且通过低掺杂漏极(LDD)注入制造源极和漏极。 在这种特殊情况下,创新的栅极氧化工艺是在LDD植入之前生长的多晶硅氧化(POX)工艺。 已经发现优化的晶体管性能的氧化温度和氧化时间分别为850℃和115分钟。 本发明用于通过优化POX过程来实现最大速度和性能。