会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • OXIDE THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME
    • 氧化物薄膜晶体管及其制造方法
    • US20120146017A1
    • 2012-06-14
    • US13324751
    • 2011-12-13
    • Dae-Hwan KIMByung-Kook ChoiSul LeeHoon Yim
    • Dae-Hwan KIMByung-Kook ChoiSul LeeHoon Yim
    • H01L33/08H01L21/34
    • H01L29/7869H01L27/1225
    • A method for fabricating an oxide thin film transistor includes sequentially forming a gate insulating film, an oxide semiconductor layer, and a first insulating layer; selectively patterning the oxide semiconductor layer and the first insulating layer to form an active layer and an insulating layer pattern on the gate electrode; forming a second insulating layer on the substrate having the active layer and the insulating layer pattern formed thereon; and selectively patterning the insulating layer pattern and the second insulating layer to form first and second etch stoppers on the active layer. The oxide semiconductor layer may be a ternary system or quaternary system oxide semiconductor comprising a combination of AxByCzO (A, B, C═Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z≧0).
    • 一种制造氧化物薄膜晶体管的方法,包括顺序地形成栅极绝缘膜,氧化物半导体层和第一绝缘层; 选择性地图案化氧化物半导体层和第一绝缘层以在栅电极上形成有源层和绝缘层图案; 在其上形成有活性层和绝缘层图案的基板上形成第二绝缘层; 以及选择性地图案化所述绝缘层图案和所述第二绝缘层以在所述有源层上形成第一和第二蚀刻阻挡层。 氧化物半导体层可以是包含AxByCzO(A,B,C = Zn,Cd,Ga,In,Sn,Hf,Zr; x,y,z≥0)的组合的三元系或四元系氧化物半导体。
    • 2. 发明授权
    • Oxide thin film transistor and method of fabricating the same
    • 氧化物薄膜晶体管及其制造方法
    • US08735883B2
    • 2014-05-27
    • US13324751
    • 2011-12-13
    • Dae-Hwan KimByung-Kook ChoiSul LeeHoon Yim
    • Dae-Hwan KimByung-Kook ChoiSul LeeHoon Yim
    • H01L29/10H01L29/786H01L27/12
    • H01L29/7869H01L27/1225
    • A method for fabricating an oxide thin film transistor includes sequentially forming a gate insulating film, an oxide semiconductor layer, and a first insulating layer; selectively patterning the oxide semiconductor layer and the first insulating layer to form an active layer and an insulating layer pattern on the gate electrode; forming a second insulating layer on the substrate having the active layer and the insulating layer pattern formed thereon; and selectively patterning the insulating layer pattern and the second insulating layer to form first and second etch stoppers on the active layer. The oxide semiconductor layer may be a ternary system or quaternary system oxide semiconductor comprising a combination of AxByCzO (A, B, C=Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z≧0).
    • 一种制造氧化物薄膜晶体管的方法,包括顺序地形成栅极绝缘膜,氧化物半导体层和第一绝缘层; 选择性地图案化氧化物半导体层和第一绝缘层以在栅电极上形成有源层和绝缘层图案; 在其上形成有活性层和绝缘层图案的基板上形成第二绝缘层; 以及选择性地图案化所述绝缘层图案和所述第二绝缘层以在所述有源层上形成第一和第二蚀刻阻挡层。 氧化物半导体层可以是包含AxByCzO(A,B,C = Zn,Cd,Ga,In,Sn,Hf,Zr; x,y,z≥0)的组合的三元系或四元系氧化物半导体。
    • 5. 发明授权
    • IPS LCD having a first common electrode directly extending from the common line and a second common electrode contacts the common line only through a contact hole of the gate insulating layer
    • IPS LCD具有从公共线直接延伸的第一公共电极和第二公共电极仅通过栅极绝缘层的接触孔接触公共线
    • US08687158B2
    • 2014-04-01
    • US11818319
    • 2007-06-14
    • Byung-Kook ChoiHyo-Uk KimChang-Bin Lee
    • Byung-Kook ChoiHyo-Uk KimChang-Bin Lee
    • G02F1/1345
    • H01L27/1288G02F1/134363G02F1/13439G02F1/1368H01L27/124H01L29/41733
    • An array substrate for an in-plane switching mode liquid crystal display device includes: a gate line on a substrate; a data line crossing the gate line to define a pixel region on the substrate; a common line parallel to and spaced apart from the gate line; a gate electrode connected to the gate line; a semiconductor layer disposed over the gate electrode, wherein an area of the semiconductor layer is less than an area of the gate electrode; a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode, the source and drain electrodes disposed on the semiconductor layer; a plurality of pixel electrodes integrated with the drain electrode and extending from the drain electrode in the pixel region; and a plurality of common electrodes connected to the common line and alternately arranged with the plurality of pixel electrodes, wherein each of the source electrode, the drain electrode, the data line and the plurality of pixel electrodes are comprised from a first conductive material layer and a second conductive material layer, wherein the second conductive material layer is disposed on the first conductive material layer.
    • 面内切换模式液晶显示装置的阵列基板包括:基板上的栅极线; 跨越所述栅极线以限定所述衬底上的像素区域的数据线; 与栅极线平行并间隔开的公共线; 连接到栅极线的栅电极; 设置在所述栅电极上的半导体层,其中所述半导体层的面积小于所述栅电极的面积; 连接到数据线的源电极和与源电极间隔开的漏电极,设置在半导体层上的源电极和漏电极; 多个像素电极,与漏电极集成并在像素区域中从漏电极延伸; 以及连接到所述公共线并与所述多个像素电极交替布置的多个公共电极,其中所述源电极,所述漏电极,所述数据线和所述多个像素电极中的每一个包括第一导电材料层和 第二导电材料层,其中所述第二导电材料层设置在所述第一导电材料层上。
    • 8. 发明申请
    • In-plane switching mode liquid crystal display device and method of fabricating the same
    • 面内切换模式液晶显示装置及其制造方法
    • US20080013026A1
    • 2008-01-17
    • US11818319
    • 2007-06-14
    • Byung-Kook ChoiHyo-Uk KimChang-Bin Lee
    • Byung-Kook ChoiHyo-Uk KimChang-Bin Lee
    • G02F1/1343H01L21/82
    • H01L27/1288G02F1/134363G02F1/13439G02F1/1368H01L27/124H01L29/41733
    • An array substrate for an in-plane switching mode liquid crystal display device includes: a gate line on a substrate; a data line crossing the gate line to define a pixel region on the substrate; a common line parallel to and spaced apart from the gate line; a gate electrode connected to the gate line; a semiconductor layer disposed over the gate electrode, wherein an area of the semiconductor layer is less than an area of the gate electrode; a source electrode connected to the data line, and a drain electrode spaced apart from the source electrode, the source and drain electrodes disposed on the semiconductor layer; a plurality of pixel electrodes integrated with the drain electrode and extending from the drain electrode in the pixel region; and a plurality of common electrodes connected to the common line and alternately arranged with the plurality of pixel electrodes, wherein each of the source electrode, the drain electrode, the data line and the plurality of pixel electrodes are comprised from a first conductive material layer and a second conductive material layer, wherein the second conductive material layer is disposed on the first conductive material layer.
    • 面内切换模式液晶显示装置的阵列基板包括:基板上的栅极线; 跨越所述栅极线以限定所述衬底上的像素区域的数据线; 与栅极线平行并间隔开的公共线; 连接到栅极线的栅电极; 设置在所述栅电极上的半导体层,其中所述半导体层的面积小于所述栅电极的面积; 连接到数据线的源电极和与源电极间隔开的漏电极,设置在半导体层上的源电极和漏电极; 多个像素电极,与漏电极集成并在像素区域中从漏电极延伸; 以及连接到所述公共线并与所述多个像素电极交替布置的多个公共电极,其中所述源电极,所述漏电极,所述数据线和所述多个像素电极中的每一个包括第一导电材料层和 第二导电材料层,其中所述第二导电材料层设置在所述第一导电材料层上。