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1. 发明申请

US20100129963A1 INTEGRATED CIRCUIT PACKAGE AND FABRICATING METHOD THEREOF 有权
标题翻译：集成电路封装及其制作方法
公开(公告)号：US20100129963A1
公开(公告)日：2010-05-27
申请号：US12694239
申请日：2010-01-26
申请人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
发明人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
IPC分类号： H01L21/60
CPC分类号： H01L23/3735 , H01L23/3677 , H01L24/48 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.
摘要翻译：本发明公开了一种集成电路封装。集成电路封装包括具有第一表面和与其相对的第二表面的基板以及从第一表面到第二表面穿过基板的第一孔。多个导电线设置在基板的第二表面的一部分上。半导体芯片设置在衬底的第二表面上方，其中在半导体芯片和衬底之间形成腔室。多个接合焊盘设置在半导体芯片的朝向衬底的第二表面的一侧上，其中至少一个接合焊盘电连接到多条导线之一。第一散热层设置在第一孔中并延伸到腔室中。还提供了一种用于制造集成电路封装的方法。

2. 发明申请

US20090179324A1 Integrated circuit package and fabricating method thereof 有权
标题翻译：集成电路封装及其制造方法
公开(公告)号：US20090179324A1
公开(公告)日：2009-07-16
申请号：US12102439
申请日：2008-04-14
申请人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
发明人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
IPC分类号： H01L23/36 , H01L21/56
CPC分类号： H01L23/3735 , H01L23/3677 , H01L24/48 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.
摘要翻译：本发明公开了一种集成电路封装。集成电路封装包括具有第一表面和与其相对的第二表面的基板以及从第一表面到第二表面穿过基板的第一孔。多个导电线设置在基板的第二表面的一部分上。半导体芯片设置在衬底的第二表面上方，其中在半导体芯片和衬底之间形成腔室。多个接合焊盘设置在半导体芯片的朝向衬底的第二表面的一侧上，其中至少一个接合焊盘电连接到多条导线之一。第一散热层设置在第一孔中并延伸到腔室中。还提供了一种用于制造集成电路封装的方法。

3. 发明授权

US08102379B2 Touch sensing device and touch sensing apparatus 有权
标题翻译：触摸感应装置和触摸感应装置
公开(公告)号：US08102379B2
公开(公告)日：2012-01-24
申请号：US12139833
申请日：2008-06-16
申请人： Chung-Cheng Chou , William Wang , Chia-Hung Hsu , Chin-Yung Chen
发明人： Chung-Cheng Chou , William Wang , Chia-Hung Hsu , Chin-Yung Chen
IPC分类号： G06F3/041 , B41J2/41 , G02B26/00
CPC分类号： G06F3/041
摘要： The invention discloses a touch sensing device, which includes a containing space, a first substrate layer, a second substrate layer, a driver, and a sensor. The first substrate layer and the second substrate layer define the containing space for containing a fluid. The driver can provide charges to a first conducting layer of the first substrate layer, a second conducting layer of the second substrate layer, and the fluid. The sensor can sense the electric characteristics of the fluid. When a point unit approaches the touch sensing device and influences the charges, the appearance of the fluid could be changed and then the electric characteristics could also be changed.
摘要翻译：本发明公开了一种触摸感测装置，其包括容纳空间，第一基板层，第二基板层，驱动器和传感器。第一衬底层和第二衬底层限定用于容纳流体的容纳空间。驱动器可以向第一衬底层的第一导电层，第二衬底层的第二导电层和流体提供电荷。传感器可感测流体的电气特性。当点单元接近触摸感测装置并影响电荷时，可以改变流体的外观，然后电特性也可以改变。

4. 发明授权

US07829388B2 Integrated circuit package and fabricating method thereof 有权
标题翻译：集成电路封装及其制造方法
公开(公告)号：US07829388B2
公开(公告)日：2010-11-09
申请号：US12694239
申请日：2010-01-26
申请人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
发明人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
IPC分类号： H01L21/00
CPC分类号： H01L23/3735 , H01L23/3677 , H01L24/48 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.
摘要翻译：本发明公开了一种集成电路封装。集成电路封装包括具有第一表面和与其相对的第二表面的基板以及从第一表面到第二表面穿过基板的第一孔。多个导电线设置在基板的第二表面的一部分上。半导体芯片设置在衬底的第二表面上方，其中在半导体芯片和衬底之间形成腔室。多个接合焊盘设置在半导体芯片的朝向衬底的第二表面的一侧上，其中至少一个接合焊盘电连接到多条导线之一。第一散热层设置在第一孔中并延伸到腔室中。还提供了一种用于制造集成电路封装的方法。

5. 发明授权

US07804169B2 Integrated circuit package and fabricating method thereof 有权
公开(公告)号：US07804169B2
公开(公告)日：2010-09-28
申请号：US12102439
申请日：2008-04-14
申请人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
发明人： Chin-Yung Chen , Chia-Hung Hsu , William Wang , Chung-Cheng Chou
IPC分类号： H01L23/10
CPC分类号： H01L23/3735 , H01L23/3677 , H01L24/48 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.

6. 发明申请

US20090179326A1 SEMICONDUCTOR DEVICE PACKAGE 审中-公开
标题翻译：半导体器件封装
公开(公告)号：US20090179326A1
公开(公告)日：2009-07-16
申请号：US12106148
申请日：2008-04-18
申请人： Ko-Yang Tso , Chung-Cheng Chou , William Wang , Chia-Hung Hsu
发明人： Ko-Yang Tso , Chung-Cheng Chou , William Wang , Chia-Hung Hsu
IPC分类号： H01L23/49
CPC分类号： H01L24/06 , H01L23/49838 , H01L24/16 , H01L24/48 , H01L24/49 , H01L2224/0401 , H01L2224/05553 , H01L2224/05554 , H01L2224/05647 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/32225 , H01L2224/48227 , H01L2224/48235 , H01L2224/49175 , H01L2224/4943 , H01L2224/73204 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/014 , H01L2924/10161 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The invention provides a semiconductor device package. The package includes a chip disposed on a supported board and a conductive path formed between the chip and the supported board, on the backside of the supported board, or on the chip, so that the conductive path does not have to go around a region where the chip is located. Accordingly, the dimensions of the semiconductor device package are reduced.
摘要翻译：本发明提供一种半导体器件封装。该封装包括设置在支撑板上的芯片和形成在芯片和支撑板之间，支撑板的背面或芯片上的导电路径，使得导电路径不必绕过芯片位于。因此，半导体器件封装的尺寸减小。

7. 发明授权

US08518743B2 Die structure and die connecting method 有权
标题翻译：模具结构和模具连接方法
公开(公告)号：US08518743B2
公开(公告)日：2013-08-27
申请号：US13089480
申请日：2011-04-19
申请人： Chia-Hung Hsu , Ching-San Lin , Chin-Yung Chen
发明人： Chia-Hung Hsu , Ching-San Lin , Chin-Yung Chen
IPC分类号： H01L21/00
CPC分类号： H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/13562 , H01L2224/13564 , H01L2224/1357 , H01L2224/13611 , H01L2224/13644 , H01L2224/8101 , H01L2224/81193 , H01L2224/81801 , H01L2924/00013 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00015 , H01L2924/00014 , H01L2224/13099 , H01L2924/00
摘要： A die structure and a die connecting method using the same are provided. The die structure includes a die and a bump structure. The bump structure includes a body and a solder layer. The body is disposed on the die. The solder layer is disposed on the body. The method includes providing a die structure mentioned above, providing a circuit board mentioned above, and soldering the solder layer of the die structure with the tine layer on the copper block of the circuit board. In different embodiments, a tin layer is omitted from the circuit board, wherein the solder layer of the die structure is directly soldered onto the surface of the copper block.
摘要翻译：提供了使用其的管芯结构和管芯连接方法。模具结构包括模具和凸块结构。凸块结构包括主体和焊料层。身体被放置在模具上。焊料层设置在主体上。该方法包括提供上述的模具结构，提供上述电路板，并将模具结构的焊料层与尖齿层焊接在电路板的铜块上。在不同的实施例中，从电路板中省略锡层，其中将模具结构的焊料层直接焊接到铜块的表面上。

8. 发明申请

US20110254153A1 DIE STRUCTURE AND DIE CONNECTING METHOD 有权
标题翻译： DIE结构和DIE连接方法
公开(公告)号：US20110254153A1
公开(公告)日：2011-10-20
申请号：US13089480
申请日：2011-04-19
申请人： Chia-Hung Hsu , Ching-San Lin , Chin-Yung Chen
发明人： Chia-Hung Hsu , Ching-San Lin , Chin-Yung Chen
IPC分类号： H01L23/485 , H01L21/58
CPC分类号： H01L24/13 , H01L24/16 , H01L24/81 , H01L2224/1308 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/13562 , H01L2224/13564 , H01L2224/1357 , H01L2224/13611 , H01L2224/13644 , H01L2224/8101 , H01L2224/81193 , H01L2224/81801 , H01L2924/00013 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/00015 , H01L2924/00014 , H01L2224/13099 , H01L2924/00
摘要： A die structure and a die connecting method using the same are provided. The die structure includes a die and a bump structure. The bump structure includes a body and a solder layer. The body is disposed on the die. The solder layer is disposed on the body. The method includes providing a die structure mentioned above, providing a circuit board mentioned above, and soldering the solder layer of the die structure with the tine layer on the copper block of the circuit board. In different embodiments, a tin layer is omitted from the circuit board, wherein the solder layer of the die structure is directly soldered onto the surface of the copper block.
摘要翻译：提供了使用其的管芯结构和管芯连接方法。模具结构包括模具和凸块结构。凸块结构包括主体和焊料层。身体被放置在模具上。焊料层设置在主体上。该方法包括提供上述的模具结构，提供上述电路板，并将模具结构的焊料层与尖齿层焊接在电路板的铜块上。在不同的实施例中，从电路板中省略锡层，其中将模具结构的焊料层直接焊接到铜块的表面上。

9. 发明授权

US07993046B2 Flexible light-emitting apparatus 失效
标题翻译：柔性发光装置
公开(公告)号：US07993046B2
公开(公告)日：2011-08-09
申请号：US12426962
申请日：2009-04-21
申请人： Chiang-Ching Wang , Chi-Wen Kuo , Jun-Zhou Chen , Chien-Hua Wu , Tsung-Hsien Chou , Chia-Hung Hsu
发明人： Chiang-Ching Wang , Chi-Wen Kuo , Jun-Zhou Chen , Chien-Hua Wu , Tsung-Hsien Chou , Chia-Hung Hsu
IPC分类号： F21V7/04 , H01L33/00
CPC分类号： F21V7/04 , G02B6/001 , Y10S362/80
摘要： A flexible light-emitting apparatus including a side light-emitting flexible light guide rod, two light emitting diodes, and two lenses is provided. The side light-emitting flexible light guide rod has a first end, a second end opposite to the first end, and a light-emitting surface connecting the first and the second ends. The LEDs are respectively disposed beside the first end and the second end and adapted for emitting light beams toward the side light-emitting flexible light guide rod, respectively. One of the lenses is located between the first end and the LED disposed beside the first end, and the other lens is located between the second end and the LED disposed beside the second end. Each of the light beams enters the side light-emitting flexible light guide rod through the corresponding lens and is transmitted to the outside of the side light-emitting flexible light guide rod through the light-emitting surface.
摘要翻译：提供了包括侧发光柔性导光杆，两个发光二极管和两个透镜的柔性发光装置。侧发光柔性导光杆具有第一端，与第一端相对的第二端和连接第一端和第二端的发光面。 LED分别设置在第一端和第二端的旁边，并且分别用于朝向侧面发光柔性导光棒发射光束。其中一个透镜位于第一端和设置在第一端旁边的LED之间，另一透镜位于第二端和位于第二端旁边的LED之间。每个光束通过相应的透镜进入侧发光柔性导光杆，并通过发光表面传输到侧发光柔性导光杆的外侧。

10. 发明授权

US07638956B2 Method of calibrating monochromatic light beams outputted by light emitting diodes and related light emitting diode control system 有权
标题翻译：校准由发光二极管和相关发光二极管控制系统输出的单色光束的方法
公开(公告)号：US07638956B2
公开(公告)日：2009-12-29
申请号：US11775236
申请日：2007-07-10
申请人： Ming-Dah Liu , Yu-Chuan Wen , Chia-Hung Hsu
发明人： Ming-Dah Liu , Yu-Chuan Wen , Chia-Hung Hsu
IPC分类号： G05F1/00
CPC分类号： G01J1/4228 , G01J1/0488 , G01J1/18 , G01J1/32 , G01J3/51 , G01J3/513 , G01J2001/4252
摘要： To control chroma and brightness in a backlight module, a plurality of reference values of a plurality of monochromatic light beams are provided, and a brightness reference value is provided for the light formed of the monochromatic light beams. Then, a plurality of first light signals of the monochromatic light beams, and a second light signal of the light formed of the monochromatic light beams are sensed and compared with the reference values and the brightness reference value, respectively. Finally, the monochromatic light beams outputted by the plurality of LEDs is calibrated according to a comparison result of the plurality of first light signals with the plurality of reference values and a comparison result of the second light signal with the brightness reference value.
摘要翻译：为了控制背光模块中的色度和亮度，提供多个单色光束的多个参考值，并且为由单色光束形成的光提供亮度基准值。然后，分别检测单色光束的多个第一光信号和由单色光束形成的光的第二光信号，并将其与基准值和亮度基准值进行比较。最后，根据具有多个参考值的多个第一光信号的比较结果和第二光信号与亮度参考值的比较结果，校准由多个LED输出的单色光束。

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