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1. 发明申请

US20110285575A1 INTEGRATED CIRCUIT COMPRISING FREQUENCY GENERATION CIRCUITRY FOR CONTROLLING A FREQUENCY SOURCE 有权
标题翻译：包含用于控制频率源的频率发生电路的集成电路
公开(公告)号：US20110285575A1
公开(公告)日：2011-11-24
申请号：US13145122
申请日：2009-02-13
申请人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
发明人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
IPC分类号： G01S13/02
CPC分类号： G01S7/35 , G01S7/032 , G01S13/34 , G01S13/931 , G01S2013/9325 , H03C3/0925 , H03L7/1976
摘要： An integrated circuit comprises frequency generation circuitry for controlling a frequency source for an automotive radar system. The frequency generation circuitry comprises a Phase Locked Loop (PLL) arranged to generate a control signal for controlling the frequency source, a fractional-N divider located within a feedback loop of the PLL, and frequency pattern control logic operably coupled to the fractional-N divider and arranged to control the fractional-N divider, by way of a frequency control signal, such that the PLL generates a Frequency Modulated Continuous Wave (FMCW) control signal.
摘要翻译：集成电路包括用于控制汽车雷达系统的频率源的频率产生电路。频率产生电路包括被锁定环路（PLL），该锁相环路被配置为产生用于控制频率源的控制信号，位于PLL的反馈环路内的分数N分频器，以及可操作地耦合到分数N的频率模式控制逻辑并且被布置成通过频率控制信号来控制分数N分频器，使得PLL产生调频连续波（FMCW）控制信号。

2. 发明授权

US08654006B2 Integrated circuit comprising frequency generation circuitry for controlling a frequency source 有权
标题翻译：集成电路，包括用于控制频率源的频率产生电路
公开(公告)号：US08654006B2
公开(公告)日：2014-02-18
申请号：US13145122
申请日：2009-02-13
申请人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
发明人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
IPC分类号： G01S7/28
CPC分类号： G01S7/35 , G01S7/032 , G01S13/34 , G01S13/931 , G01S2013/9325 , H03C3/0925 , H03L7/1976
摘要： An integrated circuit comprises frequency generation circuitry for controlling a frequency source for an automotive radar system. The frequency generation circuitry comprises a Phase Locked Loop (PLL) arranged to generate a control signal for controlling the frequency source, a fractional-N divider located within a feedback loop of the PLL, and frequency pattern control logic operably coupled to the fractional-N divider and arranged to control the fractional-N divider, by way of a frequency control signal, such that the PLL generates a Frequency Modulated Continuous Wave (FMCW) control signal.
摘要翻译：集成电路包括用于控制汽车雷达系统的频率源的频率产生电路。频率产生电路包括被锁定环路（PLL），该锁相环路被配置为产生用于控制频率源的控制信号，位于PLL的反馈环路内的分数N分频器，以及可操作地耦合到分数N的频率模式控制逻辑并且被布置成通过频率控制信号来控制分数N分频器，使得PLL产生调频连续波（FMCW）控制信号。

3. 发明申请

US20100184389A1 WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD FOR BIASING A POWER AMPLIFIER 审中-公开
标题翻译：无线通信单元，集成电路和放大功率放大器的方法
公开(公告)号：US20100184389A1
公开(公告)日：2010-07-22
申请号：US12063425
申请日：2005-08-09
申请人： Frederic Fraysse , Gilles Montoriol , Didier Salle
发明人： Frederic Fraysse , Gilles Montoriol , Didier Salle
IPC分类号： H04B1/02
CPC分类号： H04B1/04
摘要： A wireless communication unit (100) comprises a transmitter (120) arranged to transmit an envelope modulated signal. The transmitter (120) comprises a radio frequency power amplifier (124) operably coupled to a logarithmic detector (210, 310) and a bias control circuit (126) arranged to set a direct current bias level of the radio frequency power amplifier (124) via a bias signal. The logarithmic detector (210, 310) is arranged to detect the envelope modulated signal and provide the detected envelope modulated signal to the bias control circuit such that the bias signal applied to the radio frequency power amplifier (124) comprises both a direct current and a low frequency component based on the detected envelope modulated signal. In this manner, the present invention supports a tradeoff of linearity for additional efficiency, as well as providing more margin on adjacent channel power levels, whilst maintaining a good overall power added efficiency.
摘要翻译：无线通信单元（100）包括被布置为发射包络调制信号的发射机（120）。发射机（120）包括可操作地耦合到对数检测器（210,310）的射频功率放大器（124）和被布置成设置射频功率放大器（124）的直流偏置电平的偏置控制电路（126）通过偏置信号。对数检测器（210,310）被布置成检测包络调制信号，并将检测到的包络调制信号提供给偏置控制电路，使得施加到射频功率放大器（124）的偏置信号包括直流电和基于检测到的包络调制信号的低频分量。以这种方式，本发明支持对于附加效率的线性的折衷，并且在相邻信道功率电平上提供更多的余量，同时保持良好的整体功率附加效率。

4. 发明授权

US09628093B2 Charge pump circuit, phase locked loop apparatus, integrated circuit, and method of manufacture of a charge pump 有权
公开(公告)号：US09628093B2
公开(公告)日：2017-04-18
申请号：US14899499
申请日：2013-07-18
申请人： Birama Goumballa , Gilles Montoriol , Didier Salle
发明人： Birama Goumballa , Gilles Montoriol , Didier Salle
IPC分类号： H03L7/06 , H03L7/089 , H03K17/567 , H03L7/18
CPC分类号： H03L7/0896 , H03K17/567 , H03L7/18
摘要： A charge pump circuit comprises a first bipolar transistor device and a second bipolar switching device arranged in a differential pair configuration. A first terminal of each of the first and second bipolar switching devices are coupled to a supply. A second like terminal of each of the first and second bipolar switching devices are coupled together and to ground potential via a pulsed current source. A field effect switching device is also provided and the first terminal of the first bipolar switching device is coupled to the voltage supply via the field effect switching device.

5. 发明授权

US09401723B2 XOR phase detector, phase-locked loop, and method of operating a PLL 有权
标题翻译： XOR相位检测器，锁相环和操作PLL的方法
公开(公告)号：US09401723B2
公开(公告)日：2016-07-26
申请号：US14709686
申请日：2015-05-12
申请人： Gilles Montoriol , Olivier Vincent Doare , Birama Goumballa , Didier Salle
发明人： Gilles Montoriol , Olivier Vincent Doare , Birama Goumballa , Didier Salle
IPC分类号： H03L7/06 , H03L7/097 , H03L7/093 , H03L7/095
CPC分类号： H03L7/1976 , H03L7/085
摘要： An XOR phase detector for a phase-locked loop PLL comprises an XOR gate which has an input for a periodic reference signal and another input connected to a frequency divider of the PLL. A level shifter has a level shifter input connected to an output of the XOR gate and a level shifter output connectable to a voltage-controlled oscillator VCO of the PLL. The level shifter is connectable between low and high voltage providers and has a high level and a low level. The level shifter is arranged to deliver at its output the high level or the low level depending on whether the voltage at the output of the XOR phase detector is low or high. The level shifter further has a setpoint input for setting the high level to a setpoint level.
摘要翻译：用于锁相环PLL的XOR相位检测器包括具有用于周期性参考信号的输入的XOR门和连接到PLL的分频器的另一输入。电平移位器具有连接到异或门的输出的电平移位器输入和可连接到PLL的压控振荡器VCO的电平移位器输出。电平转换器可连接低电压供电器和高电平供电器之间，具有高电平和低电平。电平移位器被设置为根据XOR相位检测器的输出端的电压是低还是高来在其输出端输出高电平或低电平。电平移位器还具有用于将高电平设置为设定值电平的设定值输入。

6. 发明申请

US20140152481A1 INTEGRATED CIRCUIT DEVICE AND METHOD OF DYNAMICALLY MODIFYING AT LEAST ONE CHARACTERISTIC WITHIN A DIGITAL TO ANALOGUE CONVERTER MODULE 有权
标题翻译：集成电路设备和数字模拟转换器模块中的至少一个特性动态修改的方法
公开(公告)号：US20140152481A1
公开(公告)日：2014-06-05
申请号：US14233762
申请日：2011-07-20
申请人： Stephane Dugalleix , Birama Goumballa , Gilles Montoriol
发明人： Stephane Dugalleix , Birama Goumballa , Gilles Montoriol
IPC分类号： H03M1/06
CPC分类号： H03M1/06 , H03M1/0626 , H03M1/0863 , H03M1/745
摘要： An integrated circuit device comprises at least one digital to analogue converter module. The DAC module includes at least one current replicator component having a first channel terminal, a second channel terminal and a reference voltage terminal arranged to receive a reference voltage signal; the at least one current replicator component being arranged to moderate a current flowing between the first and second channel terminals based at least partly on the received reference voltage signal. The DAC module also includes at least one filter component coupled to the reference voltage terminal to perform filtering of the reference voltage signal.
摘要翻译：集成电路装置包括至少一个数模转换器模块。 DAC模块包括具有第一通道端子，第二通道端子和布置成接收参考电压信号的参考电压端子的至少一个电流复制器部件; 所述至少一个当前复制器组件被布置成至少部分地基于接收到的参考电压信号来调节在第一和第二通道端子之间流动的电流。 DAC模块还包括耦合到参考电压端子的至少一个滤波器组件以执行参考电压信号的滤波。

7. 发明授权

US09835715B2 Integrated circuit, radar device and method of calibrating a receiver 有权
公开(公告)号：US09835715B2
公开(公告)日：2017-12-05
申请号：US14660471
申请日：2015-03-17
申请人： Dominique Delbecq , Olivier Doare , Gilles Montoriol
发明人： Dominique Delbecq , Olivier Doare , Gilles Montoriol
IPC分类号： G01S7/40 , G01S13/34 , G01S13/93
CPC分类号： G01S7/4056 , G01S13/34 , G01S13/931 , G01S2007/4073
摘要： An integrated circuit for a radar device comprises at least one transmitter and at least one receiver. The integrated circuit comprises: a direct digital synthesizer, DDS, configured to output a control signal; and a multiplier configured to receive a local oscillator input signal and a further input signal from the DDS. In a first mode of operation, the DDS and multiplier cooperate to generate at least one transmitter signal to be transmitted from the radar device; and in a second mode of operation the DDS and multiplier cooperate to generate at least one low frequency modulated transmitter signal to be internally routed to the at least one receiver for calibrating the at least one receiver.

8. 发明授权

US09094032B2 Integrated circuit device and method of dynamically modifying at least one characteristic within a digital to analogue converter module 有权
标题翻译：集成电路装置和动态地修改数模转换器模块内的至少一个特性的方法
公开(公告)号：US09094032B2
公开(公告)日：2015-07-28
申请号：US14233762
申请日：2011-07-20
申请人： Stephane Dugalleix , Birama Goumballa , Gilles Montoriol
发明人： Stephane Dugalleix , Birama Goumballa , Gilles Montoriol
IPC分类号： H03M1/66 , H03M1/06 , H03M1/08 , H03M1/74
CPC分类号： H03M1/06 , H03M1/0626 , H03M1/0863 , H03M1/745
摘要： An integrated circuit device comprises at least one digital to analogue converter module. The DAC module includes at least one current replicator component having a first channel terminal, a second channel terminal and a reference voltage terminal arranged to receive a reference voltage signal; the at least one current replicator component being arranged to moderate a current flowing between the first and second channel terminals based at least partly on the received reference voltage signal. The DAC module also includes at least one filter component coupled to the reference voltage terminal to perform filtering of the reference voltage signal.
摘要翻译：集成电路装置包括至少一个数模转换器模块。 DAC模块包括具有第一通道端子，第二通道端子和布置成接收参考电压信号的参考电压端子的至少一个电流复制器部件; 所述至少一个当前复制器组件被布置成至少部分地基于接收到的参考电压信号来调节在第一和第二通道端子之间流动的电流。 DAC模块还包括耦合到参考电压端子的至少一个滤波器组件以执行参考电压信号的滤波。

9. 发明申请

US20060084403A1 Radio frequency power amplifier 有权
标题翻译：射频功率放大器
公开(公告)号：US20060084403A1
公开(公告)日：2006-04-20
申请号：US10970098
申请日：2004-10-20
申请人： Benjamin Gilsdorf , Gilles Montoriol , David Newman , Jacques Trichet
发明人： Benjamin Gilsdorf , Gilles Montoriol , David Newman , Jacques Trichet
IPC分类号： H04B1/06
CPC分类号： H03F1/30 , H03F1/0211 , H03F3/24 , H03F3/72 , H03F2200/78 , H04B2001/0408
摘要： A radio frequency (RF) power amplification circuit including a power amplifier is provided for preventing breakdown of the power amplifier. The power amplifier includes an input for receiving RF signals and an output for providing amplified RF signals. The RF power amplification circuit also includes a bias circuit coupled to the input of the power amplifier to permit normal operation of the power amplifier when the base current is below a predetermined current threshold and to prevent normal operation of the power amplifier when the base current is above the predetermined current threshold.
摘要翻译：提供了包括功率放大器的射频（RF）功率放大电路，用于防止功率放大器的击穿。功率放大器包括用于接收RF信号的输入和用于提供放大的RF信号的输出。 RF功率放大电路还包括耦合到功率放大器的输入端的偏置电路，以便当基极电流低于预定电流阈值时允许功率放大器的正常操作，并且当基极电流为基极电流时，防止功率放大器的正常工作高于预定电流阈值。

10. 发明申请

US20080211585A1 Adaptive Protection Circuit For a Power Amplifier 有权
标题翻译：功率放大器的自适应保护电路
公开(公告)号：US20080211585A1
公开(公告)日：2008-09-04
申请号：US11911930
申请日：2005-04-18
申请人： Walid Karoui , Gilles Montoriol , Philippe Riondet
发明人： Walid Karoui , Gilles Montoriol , Philippe Riondet
IPC分类号： H03F1/52 , H03F3/04
CPC分类号： H03F1/52 , H03F1/30 , H03F3/19 , H03F2200/451 , H03F2200/462 , H03F2200/477 , H03F2200/78
摘要： A radio frequency device comprises a radio frequency (RF) power amplifier (PA) operably coupled to a protection circuit for minimising voltage standing wave ratio effects, wherein the protection circuit comprises a current limiter indexed to a power supplied to the RF PA.In this manner, the protection circuit combines detection of both current and voltage increase in order to provide a direct feedback on the final RF PA stage via a bias control.
摘要翻译：射频设备包括可操作地耦合到保护电路以用于最小化电压驻波比效应的射频（RF）功率放大器（PA），其中保护电路包括被分配到提供给RF PA的功率的限流器。以这种方式，保护电路组合了电流和电压增加的检测，以便通过偏置控制在最终RF PA级上提供直接反馈。

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