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1. 发明授权

US09401723B2 XOR phase detector, phase-locked loop, and method of operating a PLL 有权
标题翻译： XOR相位检测器，锁相环和操作PLL的方法
公开(公告)号：US09401723B2
公开(公告)日：2016-07-26
申请号：US14709686
申请日：2015-05-12
申请人： Gilles Montoriol , Olivier Vincent Doare , Birama Goumballa , Didier Salle
发明人： Gilles Montoriol , Olivier Vincent Doare , Birama Goumballa , Didier Salle
IPC分类号： H03L7/06 , H03L7/097 , H03L7/093 , H03L7/095
CPC分类号： H03L7/1976 , H03L7/085
摘要： An XOR phase detector for a phase-locked loop PLL comprises an XOR gate which has an input for a periodic reference signal and another input connected to a frequency divider of the PLL. A level shifter has a level shifter input connected to an output of the XOR gate and a level shifter output connectable to a voltage-controlled oscillator VCO of the PLL. The level shifter is connectable between low and high voltage providers and has a high level and a low level. The level shifter is arranged to deliver at its output the high level or the low level depending on whether the voltage at the output of the XOR phase detector is low or high. The level shifter further has a setpoint input for setting the high level to a setpoint level.
摘要翻译：用于锁相环PLL的XOR相位检测器包括具有用于周期性参考信号的输入的XOR门和连接到PLL的分频器的另一输入。电平移位器具有连接到异或门的输出的电平移位器输入和可连接到PLL的压控振荡器VCO的电平移位器输出。电平转换器可连接低电压供电器和高电平供电器之间，具有高电平和低电平。电平移位器被设置为根据XOR相位检测器的输出端的电压是低还是高来在其输出端输出高电平或低电平。电平移位器还具有用于将高电平设置为设定值电平的设定值输入。

2. 发明授权

US09628093B2 Charge pump circuit, phase locked loop apparatus, integrated circuit, and method of manufacture of a charge pump 有权
公开(公告)号：US09628093B2
公开(公告)日：2017-04-18
申请号：US14899499
申请日：2013-07-18
申请人： Birama Goumballa , Gilles Montoriol , Didier Salle
发明人： Birama Goumballa , Gilles Montoriol , Didier Salle
IPC分类号： H03L7/06 , H03L7/089 , H03K17/567 , H03L7/18
CPC分类号： H03L7/0896 , H03K17/567 , H03L7/18
摘要： A charge pump circuit comprises a first bipolar transistor device and a second bipolar switching device arranged in a differential pair configuration. A first terminal of each of the first and second bipolar switching devices are coupled to a supply. A second like terminal of each of the first and second bipolar switching devices are coupled together and to ground potential via a pulsed current source. A field effect switching device is also provided and the first terminal of the first bipolar switching device is coupled to the voltage supply via the field effect switching device.

3. 发明授权

US10033367B2 Integrated circuit for saturation detection, wireless device and method of detecting saturation 有权
公开(公告)号：US10033367B2
公开(公告)日：2018-07-24
申请号：US14702809
申请日：2015-05-04
申请人： Cristian Pavao-Moreira , Dominique Delbecq , Birama Goumballa , Didier Salle
发明人： Cristian Pavao-Moreira , Dominique Delbecq , Birama Goumballa , Didier Salle
IPC分类号： G01S7/32 , H03K5/19 , H03K19/0175 , G01S7/03 , G01S7/35 , G01S7/40 , G01S13/34 , G01S13/93
摘要： An integrated circuit for saturation detection comprises: a plurality of gain components; a plurality of saturation detectors with each saturation detector operably coupled to an output of one of the gain components; a plurality of logic elements with a first input of each logic element associated with an output of one of the saturation detectors; and a controller operably coupled to the plurality of logic elements. The controller is arranged to apply a signal to a second input of individual ones of the plurality of logic elements such that an output of the respective logic element identifies a saturation event of the saturation detector associated with that respective logic element.

4. 发明授权

US09395740B2 Temperature coefficient factor circuit, semiconductor device, and radar device 有权
标题翻译：温度系数因子电路，半导体器件和雷达装置
公开(公告)号：US09395740B2
公开(公告)日：2016-07-19
申请号：US14441246
申请日：2012-11-07
申请人： Cristian Pavao-Moreira , Birama Goumballa , Didier Salle
发明人： Cristian Pavao-Moreira , Birama Goumballa , Didier Salle
IPC分类号： H01L35/00 , G05F3/26 , G05F3/24
CPC分类号： G05F3/262 , G05F3/24 , G05F3/245
摘要： A temperature coefficient factor circuit is provided which generates a current which varies with temperature according to a programmable temperature coefficient factor. The temperature coefficient factor circuit comprises a first current source providing a first current with a positive temperature coefficient factor, a second current source providing a second current with a negative temperature coefficient factor, a common terminal, a first programmable amplifying current mirror, a second programmable amplifying current mirror and a current output circuit. The first programmable amplifying current mirror provides in dependence of a control signal ctrl an amplified first current to the common terminal. The second programmable amplifying current mirror conducts away in dependence of the control signal ctrl an amplified second current from the common terminal. The current output circuit provides the output current based on a difference current between the amplified first current and the amplified second current.
摘要翻译：提供一种温度系数因子电路，其产生根据可编程温度系数因子随温度变化的电流。温度系数因子电路包括提供具有正温度系数因子的第一电流的第一电流源，提供具有负温度系数因子的第二电流的第二电流源，公共端，第一可编程放大电流镜，第二可编程放大电流镜和电流输出电路。第一个可编程放大电流镜根据控制信号控制放大的第一电流到公共端。第二可编程放大电流镜根据控制信号控制从公共端子放大的第二电流。电流输出电路基于放大的第一电流和放大的第二电流之间的差电流提供输出电流。

5. 发明授权

US09843255B1 Charge pump apparatus, phase-locked loop, and method of operating a charge pump apparatus 有权
公开(公告)号：US09843255B1
公开(公告)日：2017-12-12
申请号：US14707179
申请日：2015-05-08
申请人： Birama Goumballa , Cristian Pavao-Moreira , Didier Salle
发明人： Birama Goumballa , Cristian Pavao-Moreira , Didier Salle
IPC分类号： H03F3/45 , H02M3/07 , H03L7/099 , G01S7/282 , G01S7/02
CPC分类号： G01S7/02 , G01S7/032 , G01S7/282 , G01S7/35 , G01S13/931 , H03L7/0895 , H03L7/0898 , H03L7/093
摘要： A charge pump comprises a charge pump circuit with bipolar switching devices with a common emitter. A collector line which comprises a first current source connects to the high potential provider. An emitter line connects the common emitter to a low potential provider and comprises a second current source. The output is provided by or connected to the collector of the second bipolar switching device and provides said output voltage.A driving stage circuit applies a charge pump circuit driving signal across the bases of the bipolar switching devices and controls the charge pump circuit driving signal in accordance with a driving stage input signal. The driving stage circuit effects a shift of a DC operating point of the charge pump circuit driving signal as an increasing function of the output voltage function of the output voltage of the charge pump circuit.

6. 发明申请

US20110285575A1 INTEGRATED CIRCUIT COMPRISING FREQUENCY GENERATION CIRCUITRY FOR CONTROLLING A FREQUENCY SOURCE 有权
标题翻译：包含用于控制频率源的频率发生电路的集成电路
公开(公告)号：US20110285575A1
公开(公告)日：2011-11-24
申请号：US13145122
申请日：2009-02-13
申请人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
发明人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
IPC分类号： G01S13/02
CPC分类号： G01S7/35 , G01S7/032 , G01S13/34 , G01S13/931 , G01S2013/9325 , H03C3/0925 , H03L7/1976
摘要： An integrated circuit comprises frequency generation circuitry for controlling a frequency source for an automotive radar system. The frequency generation circuitry comprises a Phase Locked Loop (PLL) arranged to generate a control signal for controlling the frequency source, a fractional-N divider located within a feedback loop of the PLL, and frequency pattern control logic operably coupled to the fractional-N divider and arranged to control the fractional-N divider, by way of a frequency control signal, such that the PLL generates a Frequency Modulated Continuous Wave (FMCW) control signal.
摘要翻译：集成电路包括用于控制汽车雷达系统的频率源的频率产生电路。频率产生电路包括被锁定环路（PLL），该锁相环路被配置为产生用于控制频率源的控制信号，位于PLL的反馈环路内的分数N分频器，以及可操作地耦合到分数N的频率模式控制逻辑并且被布置成通过频率控制信号来控制分数N分频器，使得PLL产生调频连续波（FMCW）控制信号。

7. 发明授权

US08654006B2 Integrated circuit comprising frequency generation circuitry for controlling a frequency source 有权
标题翻译：集成电路，包括用于控制频率源的频率产生电路
公开(公告)号：US08654006B2
公开(公告)日：2014-02-18
申请号：US13145122
申请日：2009-02-13
申请人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
发明人： Christophe Landez , Hugues Beaulaton , Thierry Cassagnes , Stephane Colomines , Robert G. Gach , Akbar Ghazinour , Hao Li , Gilles Montoriol , Didier Salle , Pierre Savary
IPC分类号： G01S7/28
CPC分类号： G01S7/35 , G01S7/032 , G01S13/34 , G01S13/931 , G01S2013/9325 , H03C3/0925 , H03L7/1976
摘要： An integrated circuit comprises frequency generation circuitry for controlling a frequency source for an automotive radar system. The frequency generation circuitry comprises a Phase Locked Loop (PLL) arranged to generate a control signal for controlling the frequency source, a fractional-N divider located within a feedback loop of the PLL, and frequency pattern control logic operably coupled to the fractional-N divider and arranged to control the fractional-N divider, by way of a frequency control signal, such that the PLL generates a Frequency Modulated Continuous Wave (FMCW) control signal.
摘要翻译：集成电路包括用于控制汽车雷达系统的频率源的频率产生电路。频率产生电路包括被锁定环路（PLL），该锁相环路被配置为产生用于控制频率源的控制信号，位于PLL的反馈环路内的分数N分频器，以及可操作地耦合到分数N的频率模式控制逻辑并且被布置成通过频率控制信号来控制分数N分频器，使得PLL产生调频连续波（FMCW）控制信号。

8. 发明申请

US20100184389A1 WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD FOR BIASING A POWER AMPLIFIER 审中-公开
标题翻译：无线通信单元，集成电路和放大功率放大器的方法
公开(公告)号：US20100184389A1
公开(公告)日：2010-07-22
申请号：US12063425
申请日：2005-08-09
申请人： Frederic Fraysse , Gilles Montoriol , Didier Salle
发明人： Frederic Fraysse , Gilles Montoriol , Didier Salle
IPC分类号： H04B1/02
CPC分类号： H04B1/04
摘要： A wireless communication unit (100) comprises a transmitter (120) arranged to transmit an envelope modulated signal. The transmitter (120) comprises a radio frequency power amplifier (124) operably coupled to a logarithmic detector (210, 310) and a bias control circuit (126) arranged to set a direct current bias level of the radio frequency power amplifier (124) via a bias signal. The logarithmic detector (210, 310) is arranged to detect the envelope modulated signal and provide the detected envelope modulated signal to the bias control circuit such that the bias signal applied to the radio frequency power amplifier (124) comprises both a direct current and a low frequency component based on the detected envelope modulated signal. In this manner, the present invention supports a tradeoff of linearity for additional efficiency, as well as providing more margin on adjacent channel power levels, whilst maintaining a good overall power added efficiency.
摘要翻译：无线通信单元（100）包括被布置为发射包络调制信号的发射机（120）。发射机（120）包括可操作地耦合到对数检测器（210,310）的射频功率放大器（124）和被布置成设置射频功率放大器（124）的直流偏置电平的偏置控制电路（126）通过偏置信号。对数检测器（210,310）被布置成检测包络调制信号，并将检测到的包络调制信号提供给偏置控制电路，使得施加到射频功率放大器（124）的偏置信号包括直流电和基于检测到的包络调制信号的低频分量。以这种方式，本发明支持对于附加效率的线性的折衷，并且在相邻信道功率电平上提供更多的余量，同时保持良好的整体功率附加效率。

9. 发明授权

US09720074B2 Circuitry for and method of generating a frequency modulated radar transmitter signal, a radar transceiver circuit and a radar system 有权
公开(公告)号：US09720074B2
公开(公告)日：2017-08-01
申请号：US14324322
申请日：2014-07-07
申请人： Didier Salle , Olivier Doare , Christophe Landez
发明人： Didier Salle , Olivier Doare , Christophe Landez
IPC分类号： G01S7/40 , G01S13/02 , G01S7/03 , G01S13/34 , H03C3/09 , G01S13/58 , G01S13/93
CPC分类号： G01S7/4008 , G01S7/032 , G01S13/02 , G01S13/343 , G01S13/584 , G01S13/931 , H03C3/0925
摘要： A circuitry for and a method of generating a frequency modulated radar transmitter signal are provided. The circuitry comprises a modulation signal generator for generating a modulation signal having a waveform describing a required frequency modulation of the frequency modulated radar transmitter signal and comprises a PLL circuitry for generating the frequency modulated radar transmitter signal in dependence of the modulation signal. In the PLL circuitry a controllable frequency divider controls the output frequency of the PLL circuitry in dependence of the modulation signal. The PLL circuitry further comprises a phase detector, a controllable oscillator and possibly a low pass filter. The PLL circuitry further comprises a calibration circuitry being configured to control a parameter of at least one of the phase detector and the controllable oscillator to maintain a loop gain of PLL circuitry.

10. 发明授权

US08731502B2 Integrated circuit comprising frequency generation circuitry for controlling a frequency source 有权
标题翻译：集成电路，包括用于控制频率源的频率产生电路
公开(公告)号：US08731502B2
公开(公告)日：2014-05-20
申请号：US13145125
申请日：2010-02-10
申请人： Didier Salle , Olivier Doare , Stephane Dugalleix
发明人： Didier Salle , Olivier Doare , Stephane Dugalleix
IPC分类号： H04B1/18
CPC分类号： G01S7/35 , G01S7/032 , G01S13/34 , G01S13/931 , G01S2013/9325 , H03C3/0925 , H03L7/1976
摘要： An integrated circuit comprises frequency generation circuitry for controlling a frequency source for use in an automotive radar system. The frequency generation circuitry comprises low-path modulation circuitry arranged to generate a first, low-path control signal for providing lower frequency modulation of the frequency source, the low-path modulation circuitry comprising a Phase Locked Loop (PLL) arranged to generate the low-path control signal for controlling the frequency source and a fractional-N divider located within a feedback loop of the PLL, and frequency pattern control module operably coupled to the fractional-N divider and arranged to control the fractional-N divider, by way of at least a first, lower frequency pattern control signal. The frequency generation circuitry further comprises high-path modulation circuitry arranged to generate a second, high-path control signal for providing higher frequency modulation of the frequency source.
摘要翻译：集成电路包括用于控制在汽车雷达系统中使用的频率源的频率产生电路。频率产生电路包括低通道调制电路，其被布置为产生用于提供频率源的较低频率调制的第一低路径控制信号，该低通道调制电路包括被配置为产生低电平的锁相环（PLL）用于控制频率源的PATH控制信号和位于PLL的反馈环路内的分数N分频器，以及频率模式控制模块，其可操作地耦合到分数N分频器，并被布置成通过以下方式控制分数N分频器至少第一低频模式控制信号。频率产生电路还包括被设置为产生用于提供频率源的更高频率调制的第二高路径控制信号的高路径调制电路。

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