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1. 发明申请

US20120144140A1 Memory Protection Unit and a Method for Controlling an Access to a Memory Device 有权
标题翻译：存储器保护单元和用于控制对存储器件的访问的方法
公开(公告)号：US20120144140A1
公开(公告)日：2012-06-07
申请号：US13306715
申请日：2011-11-29
申请人： Christine Rossa , Bernd Mueller , Markus Ferch , Carsten Gebauer , Dieter Thoss , Michael Ebert
发明人： Christine Rossa , Bernd Mueller , Markus Ferch , Carsten Gebauer , Dieter Thoss , Michael Ebert
IPC分类号： G06F12/14
CPC分类号： G06F12/1425 , G06F21/79
摘要： A memory protection unit includes at least a first access control unit and a second access control unit programmed for controlling an access to a memory device. Further a method to operate a processing system comprising multiple processing devices and multiple memory protection units associated to the multiple processing devices, The access to the memory by a processing device is approved if first access control unit and second access control unit of the memory protection associated to the processing device approves the access and access is rejected if first access control unit or second access control unit rejects the access. The first access control unit is programmable by the associated processing device alone and the programming of the second access control unit is readable by an additional processing device which is to be used in a system with multiple programming devices, not the associate processing device.
摘要翻译：存储器保护单元至少包括第一访问控制单元和被编程用于控制对存储器设备的访问的第二访问控制单元。此外，操作包括与多个处理设备相关联的多个处理设备和多个存储器保护单元的处理系统的方法。如果存储器保护的第一访问控制单元和第二访问控制单元相关联，则由处理设备访问存储器被批准如果第一访问控制单元或第二访问控制单元拒绝该访问，则处理设备批准该访问和访问被拒绝。第一访问控制单元可以由相关联的处理设备单独编程，并且第二访问控制单元的编程可由附加处理设备读取，该附加处理设备将用于具有多个编程设备的系统中，而不是关联处理设备。

2. 发明授权

US08984245B2 Memory protection unit and method for controlling an access to memory device 有权
标题翻译：用于控制对存储器件的访问的存储器保护单元和方法
公开(公告)号：US08984245B2
公开(公告)日：2015-03-17
申请号：US13306715
申请日：2011-11-29
申请人： Christine Rossa , Bernd Mueller , Markus Ferch , Carsten Gebauer , Dieter Thoss , Michael Ebert
发明人： Christine Rossa , Bernd Mueller , Markus Ferch , Carsten Gebauer , Dieter Thoss , Michael Ebert
IPC分类号： G06F12/14 , G06F21/79
CPC分类号： G06F12/1425 , G06F21/79
摘要： A memory protection unit includes at least a first access control unit and a second access control unit programmed for controlling an access to a memory device. Further a method to operate a processing system comprising multiple processing devices and multiple memory protection units associated to the multiple processing devices. The access to the memory by a processing device is approved if first access control unit and second access control unit of the memory protection associated to the processing device approves the access and access is rejected if first access control unit or second access control unit rejects the access. The first access control unit is programmable by the associated processing device alone and the programming of the second access control unit is readable by an additional processing device which is to be used in a system with multiple programming devices, not the associate processing device.
摘要翻译：存储器保护单元至少包括第一访问控制单元和被编程用于控制对存储器设备的访问的第二访问控制单元。另外，一种操作处理系统的方法，该处理系统包括与多个处理设备相关联的多个处理设备和多个存储器保护单元。如果与处理设备相关联的存储器保护的第一访问控制单元和第二访问控制单元批准访问并且如果第一访问控制单元或第二访问控制单元拒绝访问则访问被拒绝，由处理设备访问存储器被批准。第一访问控制单元可以由相关联的处理设备单独编程，并且第二访问控制单元的编程可由附加处理设备读取，该附加处理设备将用于具有多个编程设备的系统中，而不是关联处理设备。

3. 发明授权

US09170875B2 Method for monitoring a data memory 有权
标题翻译：监视数据存储器的方法
公开(公告)号：US09170875B2
公开(公告)日：2015-10-27
申请号：US13809764
申请日：2011-06-27
申请人： Bernd Mueller , Carsten Gebauer , Dieter Thoss
发明人： Bernd Mueller , Carsten Gebauer , Dieter Thoss
IPC分类号： G11C29/00 , G06F11/10 , G11C29/04
CPC分类号： G06F11/10 , G06F11/1048 , G11C2029/0411
摘要： A method is described for monitoring a data memory in which an error detection method is used to detect and/or correct incorrect data words stored in memory lines of the data memory, an address of the data memory at which a data word evaluated as incorrect by the error detection method is stored being written to an auxiliary memory and being made available to a checking program.
摘要翻译：描述了一种用于监视数据存储器的方法，其中使用错误检测方法来检测和/或校正存储在数据存储器的存储器行中的不正确的数据字，数据存储器的地址，其中被评估为不正确的数据字由该错误检测方法被存储在辅助存储器中，并被提供给检查程序。

4. 发明申请

US20130191701A1 METHOD FOR MONITORING A DATA MEMORY 有权
标题翻译：监控数据存储器的方法
公开(公告)号：US20130191701A1
公开(公告)日：2013-07-25
申请号：US13809764
申请日：2011-06-27
申请人： Bernd Mueller , Carsten Gebauer , Dieter Thoss
发明人： Bernd Mueller , Carsten Gebauer , Dieter Thoss
IPC分类号： G06F11/10
CPC分类号： G06F11/10 , G06F11/1048 , G11C2029/0411
摘要： A method is described for monitoring a data memory in which an error detection method is used to detect and/or correct incorrect data words stored in memory lines of the data memory, an address of the data memory at which a data word evaluated as incorrect by the error detection method is stored being written to an auxiliary memory and being made available to a checking program.
摘要翻译：描述了一种用于监视数据存储器的方法，其中使用错误检测方法来检测和/或校正存储在数据存储器的存储器行中的不正确的数据字，数据存储器的地址，其中被评估为不正确的数据字由该错误检测方法被存储在辅助存储器中，并被提供给检查程序。

5. 发明申请

US20130111189A1 Circuit Arrangement for a Data Processing System and Method for Data Processing 有权
标题翻译：数据处理系统的电路布置和数据处理方法
公开(公告)号：US20130111189A1
公开(公告)日：2013-05-02
申请号：US13638125
申请日：2011-03-18
申请人： Eberhard Boehl , Ruben Bartholomae , Matthias Knauss , Stephen Schmitt , Thomas Wagner , Andreas Hempel , Dieter Thoss , Bernhard Mader , Achim Schaefer , Juergen Hanisch , Uwe Scheurer , Andreas Merker , Rolf Kurrer , Bernd Becker , Bernard Pawlok
发明人： Eberhard Boehl , Ruben Bartholomae , Matthias Knauss , Stephen Schmitt , Thomas Wagner , Andreas Hempel , Dieter Thoss , Bernhard Mader , Achim Schaefer , Juergen Hanisch , Uwe Scheurer , Andreas Merker , Rolf Kurrer , Bernd Becker , Bernard Pawlok
IPC分类号： G06F15/76
CPC分类号： G06F15/76 , G06F1/04
摘要： A circuit arrangement for a data processing system is configured to process data in multiple modules. The circuit arrangement is configured to provide a clock as well as a time base and/or a base of at least one further physical quantity for each of the multiple modules. The circuit arrangement also comprises a central routing unit, which is connected to several of the multiple modules. Via the central routing unit, the modules can periodically exchange data based on the time base and/or on the base of the at least one further physical quantity. The several modules are configured to process data independently of and in parallel to other modules of the several modules.
摘要翻译：用于数据处理系统的电路装置被配置为处理多个模块中的数据。电路布置被配置为为多个模块中的每一个提供时钟以及时基和/或至少一个另外的物理量的基极。电路装置还包括中央路由单元，其连接到多个模块中的若干个。通过中央路由单元，模块可以基于时基和/或基于至少一个其他物理量周期性地交换数据。多个模块被配置为独立于和并行地处理数个模块的其他模块的数据。

6. 发明授权

US09678917B2 Communications assembly having logic multichannel communication via a physical transmission path for serial interchip data transmission 有权
公开(公告)号：US09678917B2
公开(公告)日：2017-06-13
申请号：US14346943
申请日：2012-08-06
申请人： Andreas-Juergen Rohatschek , Dieter Thoss , Thorsten Huck , Stoyan Todorov
发明人： Andreas-Juergen Rohatschek , Dieter Thoss , Thorsten Huck , Stoyan Todorov
IPC分类号： G06F13/24 , G06F13/42
CPC分类号： G06F13/4256 , G06F13/24 , G06F13/4247 , G06F13/4282
摘要： In a communications assembly having multiple users, one user is designated as a master and additional users are designated as peripheral modules, at least two of the peripheral modules as well as at least two interface modules are integrated into a shared physical implementation unit, and at least one interface module, which is designated as a slave, is unambiguously assigned to each of the at least two peripheral modules.

7. 发明授权

US09367516B2 Circuit arrangement for a data processing system and method for data processing 有权
标题翻译：数据处理系统的电路布置和数据处理方法
公开(公告)号：US09367516B2
公开(公告)日：2016-06-14
申请号：US13638125
申请日：2011-03-18
申请人： Eberhard Boehl , Ruben Bartholomae , Matthias Knauss , Stephen Schmitt , Thomas Wagner , Andreas Hempel , Dieter Thoss , Bernhard Mader , Achim Schaefer , Juergen Hanisch , Uwe Scheurer , Andreas Merker , Rolf Kurrer , Bernd Becker , Bernard Pawlok
发明人： Eberhard Boehl , Ruben Bartholomae , Matthias Knauss , Stephen Schmitt , Thomas Wagner , Andreas Hempel , Dieter Thoss , Bernhard Mader , Achim Schaefer , Juergen Hanisch , Uwe Scheurer , Andreas Merker , Rolf Kurrer , Bernd Becker , Bernard Pawlok
IPC分类号： G06F1/12 , G06F15/76 , G06F1/04
CPC分类号： G06F15/76 , G06F1/04
摘要： A circuit arrangement for a data processing system is configured to process data in multiple modules. The circuit arrangement is configured to provide a clock as well as a time base and/or a base of at least one further physical quantity for each of the multiple modules. The circuit arrangement also comprises a central routing unit, which is connected to several of the multiple modules. Via the central routing unit, the modules can periodically exchange data based on the time base and/or on the base of the at least one further physical quantity. The several modules are configured to process data independently of and in parallel to other modules of the several modules.
摘要翻译：用于数据处理系统的电路装置被配置为处理多个模块中的数据。电路布置被配置为为多个模块中的每一个提供时钟以及时基和/或至少一个另外的物理量的基极。电路装置还包括中央路由单元，其连接到多个模块中的若干个。通过中央路由单元，模块可以基于时基和/或基于至少一个其他物理量周期性地交换数据。多个模块被配置为独立于和并行地处理数个模块的其他模块的数据。

8. 发明授权

US09065732B2 Communication configuration and method for debugging, respectively for programming one or more participants of the communication configuration 有权
标题翻译：通信配置和调试方法分别用于编程一个或多个参与者的通信配置
公开(公告)号：US09065732B2
公开(公告)日：2015-06-23
申请号：US13849861
申请日：2013-03-25
申请人： Andreas-Juergen Rohatschek , Dieter Thoss , Thorsten Huck , Daniel Drescher , Michael Frischke , Stoyan Todorov
发明人： Andreas-Juergen Rohatschek , Dieter Thoss , Thorsten Huck , Daniel Drescher , Michael Frischke , Stoyan Todorov
IPC分类号： G01R31/08 , H04L12/24 , H04L12/26 , H04L12/42 , H04L12/437
CPC分类号： H04L41/0803 , H04L12/42 , H04L12/437 , H04L43/50
摘要： A communication system configuration has an annular design and includes multiple participants which are serially interconnected, one participant being configured as a master and the remaining participants being configured as slaves. The master is configured for transmitting a data packet to one or a plurality of slaves, and each slave has a shift register. The communication system includes a participant which has an external interface and is adapted for receiving data via the external interface from outside of the communication system to implement a debugging or a programming of one or a plurality of participants of the communication system or for transmitting data to outside of the communication system.
摘要翻译：通信系统配置具有环形设计，并且包括串行互连的多个参与者，一个参与者被配置为主节点，其余参与者被配置为从站。主机被配置为将数据分组发送到一个或多个从机，并且每个从机具有移位寄存器。通信系统包括参与者，其具有外部接口，并且适于经由外部接口从通信系统外部接收数据，以实现通信系统的一个或多个参与者的调试或编程，或用于将数据发送到在通信系统之外。

9. 发明申请

US20130262610A1 COMMUNICATION SYSTEM AND METHOD FOR CONFIGURING PROGRAMMABLE HARDWARE 审中-公开
标题翻译：用于配置可编程硬件的通信系统和方法
公开(公告)号：US20130262610A1
公开(公告)日：2013-10-03
申请号：US13853358
申请日：2013-03-29
申请人： Andreas-Juergen ROHATSCHEK , Thorsten Huck , Dieter Thoss , Daniel Drescher , Michael Kuhnert , Stoyan Todorov
发明人： Andreas-Juergen ROHATSCHEK , Thorsten Huck , Dieter Thoss , Daniel Drescher , Michael Kuhnert , Stoyan Todorov
IPC分类号： H04L12/24
CPC分类号： H04L41/08 , H04L49/15
摘要： A communication system which has a ring-shaped configuration and has at least two users. The users are connected to one another in series, one user being configured as the master and the remaining users being configured as slaves. The master is configured to transmit a data packet to one or multiple slaves. Each slave has a shift register. At least one user in the communication system includes a programmable hardware module, and at least one user in the communication system includes a memory arrangement. The programmable hardware module is configured so that it may be configured by reading out data of the memory arrangement.
摘要翻译：具有环形配置并且具有至少两个用户的通信系统。用户彼此串联连接，一个用户被配置为主服务器，其余用户被配置为从设备。主器件被配置为将数据包发送到一个或多个从器件。每个从站都有一个移位寄存器。通信系统中的至少一个用户包括可编程硬件模块，并且通信系统中的至少一个用户包括存储器装置。可编程硬件模块被配置为使得可以通过读出存储器装置的数据来配置可编程硬件模块。

10. 发明申请

US20080212668A1 Data Transmission Method, Transmitter and Receiver Therefor 审中-公开
标题翻译：数据传输方式，发射机和接收机
公开(公告)号：US20080212668A1
公开(公告)日：2008-09-04
申请号：US11885722
申请日：2006-03-02
申请人： Dieter Thoss , Jens Boettcher , Andreas Kneer , Michael Besemer
发明人： Dieter Thoss , Jens Boettcher , Andreas Kneer , Michael Besemer
IPC分类号： H03K7/08
CPC分类号： H04L25/4902
摘要： A method for serial data transmission from a transmitter to a receiver has the following steps: a) establishing at least one digital data word which is representative of a data value to be transmitted; b) establishing a pulse duration which is proportional to a non-negative integer represented by the data word plus a constant positive allowance; c) transmitting a pulse (IH, IM, IL) having the established pulse duration from the transmitter to the receiver; and d) detecting the pulse duration at the receiver and reconstructing the data word.
摘要翻译：用于从发射机到接收机的串行数据传输的方法具有以下步骤：a）建立表示要传输的数据值的至少一个数字数据字; b）建立与由数据字表示的非负整数加上常数正容限成比例的脉冲持续时间; c）从所述发射机向所述接收机发送具有建立的脉冲持续时间的脉冲（IH，IM，IL）; 以及d）检测接收机的脉冲持续时间并重构数据字。

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