专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090035906A1 Method of manufacturing a non-volatile semiconductor device 有权
标题翻译：制造非易失性半导体器件的方法
公开(公告)号：US20090035906A1
公开(公告)日：2009-02-05
申请号：US12222074
申请日：2008-08-01
申请人： Choong-Ho Lee , Jai-Hyuk Song , Dong-Uk Choi , Suk-Kang Sung
发明人： Choong-Ho Lee , Jai-Hyuk Song , Dong-Uk Choi , Suk-Kang Sung
IPC分类号： H01L21/336
CPC分类号： H01L21/324 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Example embodiments relate to methods of fabricating a non-volatile memory device. According to example embodiments, a method of fabricating a non-volatile memory device may include forming at least one gate structure on an upper face of a substrate. The at least one gate structure may include a tunnel insulation layer pattern, a charge storing layer pattern, a dielectric layer pattern and a control gate. According to example embodiments, a method of fabricating a non-volatile memory device may also include forming a silicon nitride layer on the upper face of the substrate to cover the at least one gate structure, forming an insulating interlayer on the silicon nitride layer on the upper face of the substrate, and providing an annealing gas toward the upper face of the substrate and a lower face of the substrate to cure defects of the tunnel insulation layer pattern.
摘要翻译：示例实施例涉及制造非易失性存储器件的方法。根据示例性实施例，制造非易失性存储器件的方法可以包括在衬底的上表面上形成至少一个栅极结构。至少一个栅极结构可以包括隧道绝缘层图案，电荷存储层图案，电介质层图案和控制栅极。根据示例实施例，制造非易失性存储器件的方法还可以包括在衬底的上表面上形成氮化硅层以覆盖至少一个栅极结构，在氮化硅层上形成绝缘中间层并且朝向基板的上表面和基板的下表面提供退火气体，以固化隧道绝缘层图案的缺陷。

2. 发明授权

US07867849B2 Method of manufacturing a non-volatile semiconductor device 有权
标题翻译：制造非易失性半导体器件的方法
公开(公告)号：US07867849B2
公开(公告)日：2011-01-11
申请号：US12222074
申请日：2008-08-01
申请人： Choong-Ho Lee , Jai-Hyuk Song , Dong-Uk Choi , Suk-Kang Sung
发明人： Choong-Ho Lee , Jai-Hyuk Song , Dong-Uk Choi , Suk-Kang Sung
IPC分类号： H01L21/336
CPC分类号： H01L21/324 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L27/11568
摘要： Example embodiments relate to methods of fabricating a non-volatile memory device. According to example embodiments, a method of fabricating a non-volatile memory device may include forming at least one gate structure on an upper face of a substrate. The at least one gate structure may include a tunnel insulation layer pattern, a charge storing layer pattern, a dielectric layer pattern and a control gate. According to example embodiments, a method of fabricating a non-volatile memory device may also include forming a silicon nitride layer on the upper face of the substrate to cover the at least one gate structure, forming an insulating interlayer on the silicon nitride layer on the upper face of the substrate, and providing an annealing gas toward the upper face of the substrate and a lower face of the substrate to cure defects of the tunnel insulation layer pattern.
摘要翻译：示例实施例涉及制造非易失性存储器件的方法。根据示例性实施例，制造非易失性存储器件的方法可以包括在衬底的上表面上形成至少一个栅极结构。至少一个栅极结构可以包括隧道绝缘层图案，电荷存储层图案，电介质层图案和控制栅极。根据示例实施例，制造非易失性存储器件的方法还可以包括在衬底的上表面上形成氮化硅层以覆盖至少一个栅极结构，在氮化硅层上形成绝缘中间层并且朝向基板的上表面和基板的下表面提供退火气体，以固化隧道绝缘层图案的缺陷。

3. 发明授权

US08044453B2 Non-volatile memory device with a charge trapping layer 有权
标题翻译：具有电荷捕获层的非易失性存储器件
公开(公告)号：US08044453B2
公开(公告)日：2011-10-25
申请号：US12318451
申请日：2008-12-30
申请人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
发明人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
IPC分类号： H01L29/792
CPC分类号： H01L27/11568
摘要： A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.
摘要翻译：非易失性存储器件包括在衬底上的场绝缘层图案，以限定衬底的有源区，场绝缘层图案的上部突出在衬底的上表面上，在有源区上的隧道绝缘层，隧道绝缘层上的电荷俘获层，电荷俘获层上的阻挡层，场绝缘层图案的上表面上的第一绝缘层，以及阻挡层和第一绝缘层上的字线结构。

4. 发明授权

US08455344B2 Method of manufacturing non-volatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08455344B2
公开(公告)日：2013-06-04
申请号：US13238084
申请日：2011-09-21
申请人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
发明人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
IPC分类号： H01L21/28
CPC分类号： H01L27/11568
摘要： A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.
摘要翻译：非易失性存储器件包括在衬底上的场绝缘层图案，以限定衬底的有源区，场绝缘层图案的上部突出在衬底的上表面上，在有源区上的隧道绝缘层，隧道绝缘层上的电荷俘获层，电荷俘获层上的阻挡层，场绝缘层图案的上表面上的第一绝缘层，以及阻挡层和第一绝缘层上的字线结构。

5. 发明授权

US08120091B2 Non-volatile memory devices including a floating gate and methods of manufacturing the same 有权
标题翻译：包括浮动栅极的非易失性存储器件及其制造方法
公开(公告)号：US08120091B2
公开(公告)日：2012-02-21
申请号：US12128078
申请日：2008-05-28
申请人： Suk-Kang Sung , Choong-Ho Lee , Sang-wook Lim , Dong-Uk Choi , Hee-Soo Kang , Kyu-Charn Park
发明人： Suk-Kang Sung , Choong-Ho Lee , Sang-wook Lim , Dong-Uk Choi , Hee-Soo Kang , Kyu-Charn Park
IPC分类号： H01L29/788
CPC分类号： H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A non-volatile memory device includes a substrate and a tunnel insulation layer pattern, such that each portion of the tunnel insulation pattern extends along a first direction and adjacent portions of the tunnel insulation layer pattern may be separated in a second direction that is substantially perpendicular to the first direction. A non-volatile memory device may include a gate structure formed on the tunnel insulation layer pattern. The gate structure may include a floating gate formed on the tunnel insulation layer pattern along the second direction, a first conductive layer pattern formed on the floating gate in the second direction, a dielectric layer pattern formed on the first conductive layer pattern along the second direction, and a control gate formed on the dielectric layer pattern in the second direction.
摘要翻译：非易失性存储器件包括衬底和隧道绝缘层图案，使得隧道绝缘图案的每个部分沿着第一方向延伸，并且隧道绝缘层图案的相邻部分可以在基本垂直的第二方向上分离到第一个方向。非易失性存储器件可以包括形成在隧道绝缘层图案上的栅极结构。栅极结构可以包括沿着第二方向形成在隧道绝缘层图案上的浮动栅极，在第二方向上形成在浮置栅极上的第一导电层图案，沿着第二方向形成在第一导电层图案上的电介质层图案以及在第二方向上形成在电介质层图案上的控制栅极。

6. 发明申请

US20080296657A1 Non-Volatile Memory Devices and Methods of Manufacturing Non-Volatile Memory Devices 有权
标题翻译：非易失性存储器件和制造非易失性存储器件的方法
公开(公告)号：US20080296657A1
公开(公告)日：2008-12-04
申请号：US12128078
申请日：2008-05-28
申请人： Suk-Kang Sung , Choong-Ho Lee , Sang-wook Lim , Dong-Uk Choi , Hee-Soo Kang , Kyu-Charn Park
发明人： Suk-Kang Sung , Choong-Ho Lee , Sang-wook Lim , Dong-Uk Choi , Hee-Soo Kang , Kyu-Charn Park
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A non-volatile memory device includes a substrate and a tunnel insulation layer pattern, such that each portion of the tunnel insulation pattern extends along a first direction and adjacent portions of the tunnel insulation layer pattern may be separated in a second direction that is substantially perpendicular to the first direction. A non-volatile memory device may include a gate structure formed on the tunnel insulation layer pattern. The gate structure may include a floating gate formed on the tunnel insulation layer pattern along the second direction, a first conductive layer pattern formed on the floating gate in the second direction, a dielectric layer pattern formed on the first conductive layer pattern along the second direction, and a control gate formed on the dielectric layer pattern in the second direction.
摘要翻译：非易失性存储器件包括衬底和隧道绝缘层图案，使得隧道绝缘图案的每个部分沿着第一方向延伸，并且隧道绝缘层图案的相邻部分可以在基本垂直的第二方向上分离到第一个方向。非易失性存储器件可以包括形成在隧道绝缘层图案上的栅极结构。栅极结构可以包括沿着第二方向形成在隧道绝缘层图案上的浮动栅极，在第二方向上形成在浮置栅极上的第一导电层图案，沿着第二方向形成在第一导电层图案上的电介质层图案以及在第二方向上形成在电介质层图案上的控制栅极。

7. 发明申请

US20120015512A1 METHOD OF MANUFACTURING NON-VOLATILE MEMORY DEVICE 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20120015512A1
公开(公告)日：2012-01-19
申请号：US13238084
申请日：2011-09-21
申请人： Suk-Kang SUNG , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
发明人： Suk-Kang SUNG , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
IPC分类号： H01L21/28
CPC分类号： H01L27/11568
摘要： A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.
摘要翻译：非易失性存储器件包括在衬底上的场绝缘层图案，以限定衬底的有源区，场绝缘层图案的上部突出在衬底的上表面上，在有源区上的隧道绝缘层，隧道绝缘层上的电荷俘获层，电荷俘获层上的阻挡层，场绝缘层图案的上表面上的第一绝缘层，以及阻挡层和第一绝缘层上的字线结构。

8. 发明申请

US20090166714A1 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US20090166714A1
公开(公告)日：2009-07-02
申请号：US12318451
申请日：2008-12-30
申请人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
发明人： Suk-Kang Sung , Choong-Ho Lee , Dong-Uk Choi , Hee-Soo Kang
IPC分类号： H01L29/792
CPC分类号： H01L27/11568
摘要： A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.
摘要翻译：非易失性存储器件包括在衬底上的场绝缘层图案，以限定衬底的有源区，场绝缘层图案的上部突出在衬底的上表面上，在有源区上的隧道绝缘层，隧道绝缘层上的电荷俘获层，电荷俘获层上的阻挡层，场绝缘层图案的上表面上的第一绝缘层，以及阻挡层和第一绝缘层上的字线结构。

9. 发明授权

US08422290B2 Methods of reading data in a NAND flash memory device with a fringe voltage applied to a conductive layer 有权
标题翻译：在具有施加到导电层的条纹电压的NAND闪存器件中读取数据的方法
公开(公告)号：US08422290B2
公开(公告)日：2013-04-16
申请号：US13072022
申请日：2011-03-25
申请人： Hee-Soo Kang , Choong-Ho Lee , Dong-Uk Choi
发明人： Hee-Soo Kang , Choong-Ho Lee , Dong-Uk Choi
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C16/0483 , H01L27/11524
摘要： Methods of programming data in a non-volatile memory cell are provided. A memory cell according to some embodiments may include a gate structure that includes a tunnel oxide layer pattern, a floating gate, a dielectric layer and a control gate sequentially stacked on a substrate, impurity regions that are formed in the substrate at both sides of the gate structure, and a conductive layer pattern that is arranged spaced apart from and facing the floating gate. Embodiments of such methods may include applying a programming voltage to the control gate, grounding the impurity regions and applying a fringe voltage to the conductive layer pattern to generate a fringe field in the floating gate.
摘要翻译：提供了在非易失性存储单元中编程数据的方法。根据一些实施例的存储器单元可以包括栅极结构，其包括隧道氧化物层图案，浮动栅极，电介质层和顺序堆叠在衬底上的控制栅极，杂质区域形成在衬底的两侧的衬底中栅极结构以及与浮动栅极间隔开并面对浮栅的导电层图案。这种方法的实施例可以包括将编程电压施加到控制栅极，使杂质区域接地并且向导电层图案施加边缘电压以在浮动栅极中产生边缘场。

10. 发明授权

US07978522B2 Flash memory device including a dummy cell 有权
标题翻译：包括虚拟单元的闪存设备
公开(公告)号：US07978522B2
公开(公告)日：2011-07-12
申请号：US12416477
申请日：2009-04-01
申请人： Hee-Soo Kang , Dong-Uk Choi , Choong-Ho Lee , Sang-Gu Kang
发明人： Hee-Soo Kang , Dong-Uk Choi , Choong-Ho Lee , Sang-Gu Kang
IPC分类号： G11C11/34
CPC分类号： G11C11/5628 , G11C16/0483
摘要： A non-volatile memory device includes a selection transistor coupled to a bit line. The device also includes a plurality of memory cells serially coupled to the selection transistor and at least one dummy cell located between the plurality of memory cells. The dummy cell is turned off during a programming operation of a memory cell located between the dummy cell and the selection transistor.
摘要翻译：非易失性存储器件包括耦合到位线的选择晶体管。该装置还包括串联耦合到选择晶体管的多个存储单元和位于多个存储单元之间的至少一个虚拟单元。在位于虚设单元和选择晶体管之间的存储单元的编程操作期间，虚设单元关闭。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式