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    • 2. 发明授权
    • Overlay mark and method of measuring the same
    • 叠加标记和测量方法
    • US08908181B2
    • 2014-12-09
    • US13536855
    • 2012-06-28
    • Chen-Yu ChenMing-Feng ShiehChing-Yu Chang
    • Chen-Yu ChenMing-Feng ShiehChing-Yu Chang
    • G01B11/00
    • H01L23/544G03F7/70633G03F7/70683H01L21/302H01L29/0649H01L29/78H01L2924/0002H01L2924/00
    • A device having an overlay mark over a substrate and a method of adjusting multi-layer overlay alignment using the overlay mark for accuracy are disclosed. The overlay mark includes a first feature in a first layer, having a plurality of first alignment segments substantially parallel to each other extending only along an X direction; a second feature in a second layer over the first layer, having a plurality of second alignment segments substantially parallel to each other extending along a Y direction different from the X direction; and a third feature in a third layer over the second layer, having a plurality of third alignment segments substantially parallel to each other extending along the X direction and a plurality of fourth alignment segments substantially parallel to each other extending along the Y direction.
    • 公开了一种在衬底上具有覆盖标记的器件以及使用覆盖标记来精确调整多层覆盖对准的方法。 覆盖标记包括第一层中的第一特征,具有基本上彼此平行的多个第一对准段,其仅沿着X方向延伸; 在第一层上的第二层中的第二特征,具有沿着与X方向不同的Y方向彼此平行的多个第二对准段; 以及在第二层上的第三层中的第三特征,具有沿着X方向彼此基本平行的多个第三对准段和沿Y方向延伸的彼此大致平行的多个第四对准段。
    • 6. 发明申请
    • METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
    • 制造半导体器件的方法
    • US20130244434A1
    • 2013-09-19
    • US13418589
    • 2012-03-13
    • Kuei-Liang LuMing-Feng ShiehChing-Yu Chang
    • Kuei-Liang LuMing-Feng ShiehChing-Yu Chang
    • H01L21/312
    • H01L21/0332H01L21/31058H01L21/31144H01L21/76802H01L21/76819H01L21/76837
    • The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a plurality of circuit devices over a substrate. The method includes forming an organic layer over the substrate. The organic layer is formed over the plurality of circuit devices. The method includes polishing the organic layer to planarize a surface of the organic layer. The organic layer is free of being thermally treated prior to the polishing. The organic material is un-cross-linked during the polishing. The method includes depositing a LT-film over the planarized surface of the organic layer. The depositing is performed at a temperature less than about 150 degrees Celsius. The depositing is also performed without using a spin coating process. The method includes forming a patterned photoresist layer over the LT-film.
    • 本公开提供了制造半导体器件的方法。 该方法包括在衬底上形成多个电路器件。 该方法包括在衬底上形成有机层。 有机层形成在多个电路装置上。 该方法包括抛光有机层以使有机层的表面平坦化。 有机层在抛光之前不需要进行热处理。 有机材料在抛光期间是未交联的。 该方法包括在有机层的平坦化表面上沉积LT膜。 沉积在小于约150摄氏度的温度下进行。 也可以不使用旋涂法进行沉积。 该方法包括在LT膜上形成图案化的光致抗蚀剂层。