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1. 发明授权

US07652949B2 Memory module and register with minimized routing path 失效
标题翻译：内存模块和注册最小化路由路径
公开(公告)号：US07652949B2
公开(公告)日：2010-01-26
申请号：US11633353
申请日：2006-12-04
申请人： Chil-Nam Yoon , Young-Man Ahn , Young-Jun Park , Sung-Joo Park
发明人： Chil-Nam Yoon , Young-Man Ahn , Young-Jun Park , Sung-Joo Park
IPC分类号： G11C8/18
CPC分类号： G11C8/18 , G11C5/04 , G11C5/063
摘要： A memory module includes a first memory group including a plurality of memory devices, a second memory group including a less number of memory devices with respect to the memory devices in the first memory group, a register configured to provide a command/address signal to the first memory group and a delayed command/address signal to the second memory group, a first signal line configured to transfer the command/address signal to the first memory group, and a second signal line configured to transfer the delayed command/address signal to the second memory group.
摘要翻译：存储器模块包括包括多个存储器件的第一存储器组，包括相对于第一存储器组中的存储器件的较少数量的存储器件的第二存储器组，配置成向第一存储器组件提供命令/地址信号的寄存器第一存储器组和延迟的命令/地址信号到第二存储器组，第一信号线，被配置为将命令/地址信号传送到第一存储器组;以及第二信号线，被配置为将延迟的命令/地址信号传送到第二内存组。

2. 发明申请

US20070127304A1 Memory module and register with minimized routing path 失效
标题翻译：内存模块和注册最小化路由路径
公开(公告)号：US20070127304A1
公开(公告)日：2007-06-07
申请号：US11633353
申请日：2006-12-04
申请人： Chil-Nam Yoon , Young-Man Ahn , Young-Jun Park , Sung-Joo Park
发明人： Chil-Nam Yoon , Young-Man Ahn , Young-Jun Park , Sung-Joo Park
IPC分类号： G11C8/00
CPC分类号： G11C8/18 , G11C5/04 , G11C5/063
摘要： A memory module includes a first memory group including a plurality of memory devices, a second memory group including a less number of memory devices with respect to the memory devices in the first memory group, a register configured to provide a command/address signal to the first memory group and a delayed command/address signal to the second memory group, a first signal line configured to transfer the command/address signal to the first memory group, and a second signal line configured to transfer the delayed command/address signal to the second memory group.
摘要翻译：存储器模块包括包括多个存储器件的第一存储器组，包括相对于第一存储器组中的存储器件的较少数量的存储器件的第二存储器组，配置成向第一存储器组件提供命令/地址信号的寄存器第一存储器组和延迟的命令/地址信号到第二存储器组，第一信号线，被配置为将命令/地址信号传送到第一存储器组;以及第二信号线，被配置为将延迟的命令/地址信号传送到第二内存组。

3. 发明申请

US20050002241A1 Memory system with improved signal integrity 审中-公开
标题翻译：具有改善信号完整性的存储系统
公开(公告)号：US20050002241A1
公开(公告)日：2005-01-06
申请号：US10837610
申请日：2004-05-04
申请人： Sung-Joo Park , Byung-Se So , Jung-Joon Lee , Jae-Jun Lee , Chil-Nam Yoon
发明人： Sung-Joo Park , Byung-Se So , Jung-Joon Lee , Jae-Jun Lee , Chil-Nam Yoon
IPC分类号： G06F12/00 , G06F13/40 , G11C5/00 , G11C5/06
CPC分类号： G06F13/4086
摘要： A memory system includes a memory controller, a memory bus connected to the memory controller, and a plurality of memory modules connected along the memory bus, where each of the memory modules includes a plurality of memory devices. The system also includes a dummy stub or a dummy module connected to the memory bus between the memory controller and the memory module closest to the memory controller among the plurality of memory modules. The dummy stub or dummy module improves a signal integrity of at least the memory module closest to the memory controller.
摘要翻译：存储器系统包括存储器控制器，连接到存储器控制器的存储器总线以及沿着存储器总线连接的多个存储器模块，其中每个存储器模块包括多个存储器件。该系统还包括连接到存储器总线之间的存储器控制器和位于多个存储器模块中最靠近存储器控制器的存储器模块之间的虚拟存根或虚拟模块。虚拟短线或虚拟模块改善了至少与存储器控制器最接近的存储器模块的信号完整性。

4. 发明授权

US08399301B2 Mounting structures for integrated circuit modules 有权
标题翻译：集成电路模块的安装结构
公开(公告)号：US08399301B2
公开(公告)日：2013-03-19
申请号：US13064081
申请日：2011-03-04
申请人： Sung-Joo Park , Ki-Hyun Ko , Young Yun , Soo-Kyung Kim
发明人： Sung-Joo Park , Ki-Hyun Ko , Young Yun , Soo-Kyung Kim
IPC分类号： H01L21/02
CPC分类号： H05K1/0246 , H01L2924/0002 , H05K1/181 , H05K2201/10022 , H05K2201/10159 , H05K2201/10522 , H01L2924/00
摘要： A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.
摘要翻译：集成电路模块的结构包括布线板，多个集成电路和至少一个终端电阻电路。布线板在其至少一个表面上具有安装区域。多个集成电路安装在布线板的安装区域中并沿第一方向彼此间隔开。至少一个终端电阻电路被布置在至少两个相邻的集成电路之间，并且耦合到多个集成电路的最后一个的输出端。

5. 发明授权

US06836138B1 Module having test architecture for facilitating the testing of ball grid array packages, and test method using the same 失效
标题翻译：具有用于促进球栅阵列封装测试的测试架构的模块，以及使用其的测试方法
公开(公告)号：US06836138B1
公开(公告)日：2004-12-28
申请号：US10795507
申请日：2004-03-09
申请人： Sung-Joo Park , Byung-Se So , Jung-Joon Lee
发明人： Sung-Joo Park , Byung-Se So , Jung-Joon Lee
IPC分类号： G01R3126
CPC分类号： H05K1/0268 , G01R1/0483 , G01R31/31905 , G11C29/48 , G11C2029/5602 , H01L2224/48091 , H01L2224/859 , H01L2924/15311 , H01L2924/3011 , H05K1/111 , H05K2201/10734 , H01L2924/00014
摘要： A ball grid array (BGA) package test module includes BGA packages, a module board, and test architecture for use in testing the BGA packages while they are mounted to the module board. The test architecture of the BGA package test module includes package test signal lines connected to solder balls of the BGA packages as extending along a bottom surface of the BGA packages, board test signal lines extending along the module board, and electrical junctions that interconnect the package and board test signal lines. Signals from the BGA packages can be picked up by the probe of a testing apparatus via the board test signal lines. The present invention is advantageous in that it minimizes the effect of stubbing by the test signal lines when the memory module is operating.
摘要翻译：球栅阵列（BGA）封装测试模块包括BGA封装，模块板和测试架构，用于在安装到模块板时测试BGA封装。 BGA封装测试模块的测试架构包括连接到BGA封装的焊球的封装测试信号线，沿BGA封装的底表面延伸，沿着模块板延伸的板测试信号线，以及将封装相互连接的电连接和板测试信号线。来自BGA封装的信号可以由测试装置的探头通过板测试信号线拾取。本发明的优点在于，当存储器模块运行时，其最小化由测试信号线引起的短截线的影响。

6. 发明授权

US08044506B2 Thermal-emitting memory module, thermal-emitting module socket, and computer system 失效
标题翻译：发光存储模块，散热模块插座和计算机系统
公开(公告)号：US08044506B2
公开(公告)日：2011-10-25
申请号：US12181488
申请日：2008-07-29
申请人： Young Yun , Soo-Kyung Kim , Kwang-Seop Kim , Ki-Hyun Ko , Sung-Joo Park
发明人： Young Yun , Soo-Kyung Kim , Kwang-Seop Kim , Ki-Hyun Ko , Sung-Joo Park
IPC分类号： H01L23/34
CPC分类号： H01L23/467 , G11C5/04 , H01L2924/0002 , H05K1/0209 , H05K2201/0394 , H05K2201/09781 , H01L2924/00
摘要： The invention provides a thermal-emitting memory module, a thermal-emitting module socket, and a computer system comprising the thermal-emitting memory module and the thermal-emitting module socket. An embodiment of the thermal-emitting module includes: a module substrate having electrically-conductive traces; and a semiconductor device disposed on the module substrate and coupled to the electrically-conductive traces, the module substrate including a thermal-emitting portion disposed in proximity of the semiconductor device without directly contacting the semiconductor device.
摘要翻译：本发明提供了一种发热存储器模块，热发射模块插座和包括热发射存储器模块和热发射模块插座的计算机系统。热发射模块的一个实施例包括：具有导电迹线的模块衬底; 以及设置在所述模块基板上并耦合到所述导电迹线的半导体器件，所述模块基板包括设置在所述半导体器件附近的热发射部分而不直接接触所述半导体器件。

7. 发明申请

US20110163418A1 Mounting structures for integrated circuit modules 审中-公开
公开(公告)号：US20110163418A1
公开(公告)日：2011-07-07
申请号：US13064082
申请日：2011-03-04
申请人： Sung-Joo Park , Ki-Hyun Ko , Young Yun , Soo-Kyung Kim
发明人： Sung-Joo Park , Ki-Hyun Ko , Young Yun , Soo-Kyung Kim
IPC分类号： H01L27/02
CPC分类号： H05K1/0246 , H01L2924/0002 , H05K1/181 , H05K2201/10022 , H05K2201/10159 , H05K2201/10522 , H01L2924/00
摘要： A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.

8. 发明申请

US20090154212A1 Memory module 有权
标题翻译：内存模块
公开(公告)号：US20090154212A1
公开(公告)日：2009-06-18
申请号：US12292700
申请日：2008-11-24
申请人： Sung-Joo Park , Kyoung-Sun Kim , Young-Ho Lee , Jea-Eun Lee
发明人： Sung-Joo Park , Kyoung-Sun Kim , Young-Ho Lee , Jea-Eun Lee
IPC分类号： G11C5/02 , G11C5/06 , G11C7/00
CPC分类号： G11C7/20 , G11C5/04 , G11C5/066 , G11C7/1078 , G11C7/1084 , G11C7/1093 , G11C2207/105
摘要： A memory module, includes a memory module board and a plurality of memory devices on the memory module board. The memory module board includes one or more first input terminals configured to receive first signals to individually control the memory devices, and one or more second input terminals configured to receive second signals to commonly control the memory devices. Each of the memory devices includes a plurality of first signal input units configured to receive the first signals through one or more first input pins, a plurality of second signal input units configured to receive the second signals through one or more second input pins, and a plurality of dummy units, the dummy units being respectively connected to the first signal input units in parallel, and being configured to receive the first signals through one or more third input pins and to compensate for a signal line load.
摘要翻译：存储器模块包括存储器模块板和存储器模块板上的多个存储器件。存储器模块板包括被配置为接收第一信号以单独控制存储器件的一个或多个第一输入端子，以及被配置为接收第二信号以共同控制存储器件的一个或多个第二输入端子。每个存储器件包括多个第一信号输入单元，其被配置为通过一个或多个第一输入引脚接收第一信号;多个第二信号输入单元，被配置为通过一个或多个第二输入引脚接收第二信号;以及多个虚拟单元，虚拟单元分别并联连接到第一信号输入单元，并且被配置为通过一个或多个第三输入引脚接收第一信号并补偿信号线负载。

9. 发明授权

US08036051B2 Semiconductor memory device and semiconductor memory system for compensating crosstalk 失效
标题翻译：用于补偿串扰的半导体存储器件和半导体存储器系统
公开(公告)号：US08036051B2
公开(公告)日：2011-10-11
申请号：US12355421
申请日：2009-01-16
申请人： Sung-Joo Park , Jae-Jun Lee
发明人： Sung-Joo Park , Jae-Jun Lee
IPC分类号： G11C7/00
CPC分类号： G11C7/02 , G11C7/1048 , G11C7/12 , G11C29/02 , G11C29/025
摘要： A semiconductor memory device and a semiconductor memory system. The semiconductor memory device includes channels configured to transmit signals from a transmitter to a receiver, and a crosstalk compensator. The crosstalk compensator may be connected between the channels to compensate for crosstalk. The crosstalk compensator may comprise a capacitor connected in parallel between the channels, and a switching unit connected between the capacitor and one of the channels. The switching unit may control connections or disconnections between the capacitor and the channel. Therefore, the semiconductor memory device and the semiconductor memory system compensate for crosstalk occurring between transmitted signals that are out of phase with each other.
摘要翻译：半导体存储器件和半导体存储器系统。半导体存储器件包括被配置为将信号从发送器发送到接收器的通道和串扰补偿器。串扰补偿器可以连接在通道之间以补偿串扰。串扰补偿器可以包括在通道之间并联连接的电容器，以及连接在电容器和其中一个通道之间的开关单元。开关单元可以控制电容器和通道之间的连接或断开。因此，半导体存储器件和半导体存储器系统补偿在彼此不同相位的发射信号之间发生的串扰。

10. 发明申请

US20070120843A1 Apparatus and method for creating 3-dimensional image 失效
标题翻译：用于创建三维图像的装置和方法
公开(公告)号：US20070120843A1
公开(公告)日：2007-05-31
申请号：US10574705
申请日：2004-10-06
申请人： Sung-Joo Park , Se-Yern Oh
发明人： Sung-Joo Park , Se-Yern Oh
IPC分类号： G06T15/00
CPC分类号： G03B35/00 , G06T1/0007
摘要： The present invention relates to a apparatus and method for generating 3-dimensional image, which comprises a image photographing part composed of a camera part, a turn table part, a photographing angle adjustment part, a X-axis adjustment part, and a Y-axis adjustment part; a image photographing control part that creates movement control signals, transmits to said image photographing part, and receives plural digital images photographed by said camera part; a 3-dimensional image generating part that creates 3 dimensional images by using said plural digital images; and a storage part that stores said plural digital images and said 3-dimensional images. The present invention thus provides 3-dimensional images to consumers to see a certain product with its actual view by rotating at a wanted angle.
摘要翻译：本发明涉及一种用于生成三维图像的装置和方法，该装置和方法包括由相机部分，转台部分，拍摄角度调节部分，X轴调节部分和Y轴调节部分组成的图像拍摄部分，轴调整部; 创建移动控制信号的图像拍摄控制部分，发送到所述图像拍摄部分，并且接收由所述相机部分拍摄的多个数字图像; 通过使用所述多个数字图像来生成3维图像的3维图像生成部; 以及存储所述多个数字图像和所述3维图像的存储部。因此，本发明为消费者提供了三维图像，以通过以所需角度旋转来观察具有实际视角的某种产品。

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