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    • 5. 发明申请
    • MICRO-ELECTRO-MECHANICAL SYSTEMS (MEMS) DEVICE AND METHOD FOR FABRICATING THE SAME
    • 微电子机械系统(MEMS)装置及其制造方法
    • US20130056841A1
    • 2013-03-07
    • US13224297
    • 2011-09-01
    • Tsung-Min HsiehChien-Hsing LeeJhyy-Cheng Liou
    • Tsung-Min HsiehChien-Hsing LeeJhyy-Cheng Liou
    • H01L29/84H01L21/02
    • B81C1/00698B81C1/00682H01G5/18H04R19/005H04R19/04
    • A MEMS device includes a substrate. The substrate has a plurality of through holes in the substrate within a diaphragm region and optionally an indent space from the second surface at the diaphragm region. A first dielectric structural layer is then disposed over the substrate from the first surface, wherein the first dielectric structural layer has a plurality of openings corresponding to the through holes, wherein each of the through holes remains exposed by the first dielectric structural layer. A second dielectric structural layer with a chamber is disposed over the first dielectric structural layer, wherein the chamber exposes the openings of the first dielectric structural layer and the through holes of the substrate to connect to the indent space. A MEMS diaphragm is embedded in the second dielectric structural layer above the chamber, wherein an air gap is formed between the substrate and the MEMS diaphragm.
    • MEMS器件包括衬底。 衬底在膜片区域内的衬底中具有多个通孔,并且可选地在隔膜区域处具有与第二表面相邻的凹陷空间。 然后,第一介电结构层从第一表面设置在衬底上,其中第一介电结构层具有对应于通孔的多个开口,其中每个通孔保持被第一介电结构层暴露。 具有腔室的第二电介质结构层设置在第一介电结构层上,其中腔室暴露第一介电结构层的开口和衬底的通孔以连接到凹陷空间。 MEMS隔膜嵌入在腔室上方的第二电介质结构层中,其中在衬底和MEMS隔膜之间形成气隙。
    • 6. 发明授权
    • Method for fabricating MEMS device
    • 制造MEMS器件的方法
    • US08093087B2
    • 2012-01-10
    • US13209461
    • 2011-08-15
    • Tsung-Min HsiehChien-Hsing LeeJhyy-Cheng Liou
    • Tsung-Min HsiehChien-Hsing LeeJhyy-Cheng Liou
    • H01L21/00
    • B81C1/00246B81B2203/0315B81B2207/015B81C2201/016B81C2203/0714H04R19/005H04R19/04H04R31/00
    • Method for fabricating MEMS device has a first surface and a second surface and having a MEMS region and an IC region. A MEMS structure is formed over the first surface. A structural dielectric layer is formed over the first surface. The structural dielectric layer has a dielectric member and the spaces surrounding the MEMS structure is filled with the dielectric member. The substrate is patterned by etching process from the second surface of the substrate to expose a portion of the dielectric member filled in the space surrounding the MEMS structure. A wettable thin layer is formed to cover an exposed portion of the substrate at the second surface. An etching process is performed on the dielectric member filled in the spaces surrounding the MEMS structure. The MEMS structure is exposed and released by the etching process. The etching process comprises an isotropic etching process with a wet etchant.
    • 制造MEMS器件的方法具有第一表面和第二表面,并且具有MEMS区域和IC区域。 在第一表面上形成MEMS结构。 在第一表面上形成结构介电层。 结构介电层具有电介质构件,并且围绕MEMS结构的空间填充有电介质构件。 通过从衬底的第二表面的蚀刻工艺对衬底进行构图,以暴露在围绕MEMS结构的空间中填充的电介质构件的一部分。 形成可湿性薄层以覆盖第二表面处的基板的暴露部分。 对填充在围绕MEMS结构的空间的电介质构件进行蚀刻处理。 通过蚀刻工艺暴露和释放MEMS结构。 蚀刻工艺包括具有湿蚀刻剂的各向同性蚀刻工艺。
    • 7. 发明申请
    • METHOD FOR FABRICATING MEMS DEVICE
    • 制造MEMS器件的方法
    • US20110300659A1
    • 2011-12-08
    • US13209461
    • 2011-08-15
    • Tsung-Min HsiehChien-Hsing LeeJhyy-Cheng Liou
    • Tsung-Min HsiehChien-Hsing LeeJhyy-Cheng Liou
    • H01L21/311
    • B81C1/00246B81B2203/0315B81B2207/015B81C2201/016B81C2203/0714H04R19/005H04R19/04H04R31/00
    • Method for fabricating MEMS device has a first surface and a second surface and having a MEMS region and an IC region. A MEMS structure is formed over the first surface. A structural dielectric layer is formed over the first surface. The structural dielectric layer has a dielectric member and the spaces surrounding the MEMS structure is filled with the dielectric member. The substrate is patterned by etching process from the second surface of the substrate to expose a portion of the dielectric member filled in the space surrounding the MEMS structure. A wettable thin layer is formed to cover an exposed portion of the substrate at the second surface. An etching process is performed on the dielectric member filled in the spaces surrounding the MEMS structure. The MEMS structure is exposed and released by the etching process. The etching process comprises an isotropic etching process with a wet etchant.
    • 制造MEMS器件的方法具有第一表面和第二表面,并且具有MEMS区域和IC区域。 在第一表面上形成MEMS结构。 在第一表面上形成结构介电层。 结构介电层具有电介质构件,并且围绕MEMS结构的空间填充有电介质构件。 通过从衬底的第二表面的蚀刻工艺对衬底进行构图,以暴露在围绕MEMS结构的空间中填充的电介质构件的一部分。 形成可湿性薄层以覆盖第二表面处的基板的暴露部分。 对填充在围绕MEMS结构的空间的电介质构件进行蚀刻处理。 通过蚀刻工艺暴露和释放MEMS结构。 蚀刻工艺包括具有湿蚀刻剂的各向同性蚀刻工艺。
    • 9. 发明申请
    • METHOD FOR FABRICATING NON-VOLATILE MEMORY
    • 制造非易失性存储器的方法
    • US20080032470A1
    • 2008-02-07
    • US11462372
    • 2006-08-04
    • Chien-Hsing LeeTsung-Min HsiehJhyy-Cheng Liou
    • Chien-Hsing LeeTsung-Min HsiehJhyy-Cheng Liou
    • H01L21/8244
    • H01L27/11568H01L27/0207H01L27/115
    • A method for fabricating non-volatile memory on a substrate includes forming a plurality of doped lines in the substrate along a first direction, wherein the doped lines serve as a plurality of bit lines, and portions of each of the doped lines serves as source/drain regions for a plurality of memory cells. A charge storage stacked layer is formed over the substrate, wherein the charge storage stacked layer includes a charge trapping layer. A conductive layer is formed over the charge storage layer. The conductive layer and the charge storage stacked layer are patterned to form a plurality of word lines along a second direction, intersecting with the first directing. The remaining portion of the charge trapping layer is just under the word lines, not covering the isolation region between the word lines.
    • 用于在衬底上制造非易失性存储器的方法包括沿着第一方向在衬底中形成多个掺杂线,其中掺杂线用作多个位线,并且每个掺杂线的部分用作源极/ 漏极区域用于多个存储单元。 电荷存储堆叠层形成在衬底上,其中电荷存储层叠层包括电荷俘获层。 在电荷存储层上形成导电层。 图案化导电层和电荷存储堆叠层,以沿与第一定向相交的第二方向形成多个字线。 电荷俘获层的剩余部分刚好在字线之下,不覆盖字线之间的隔离区域。
    • 10. 发明申请
    • Structure of a non-volatile memory device and operation method
    • 非易失性存储器件的结构和操作方法
    • US20060284234A1
    • 2006-12-21
    • US11154378
    • 2005-06-15
    • Tsung-Min HsiehChien-Hsing LeeChin-Hsi LinJhyy-Cheng Liou
    • Tsung-Min HsiehChien-Hsing LeeChin-Hsi LinJhyy-Cheng Liou
    • H01L29/76
    • H01L27/115H01L27/11521H01L27/11524
    • A nonvolatile memory device, including composite gate structures formed on a substrate in series along a bit line (BL) direction. Each of the composite gate structures has a first storage gate, a second storage gate, and a selection gate between the two storage gates. Each of the composite gate structures is respectively coupled to two world line (WL) connection terminals at the two storage gates and a selection terminal at the selection gate. Each of the storage gates corresponds to a memory bit cell. Multiple doped regions are in the substrate between the composite gate structures. A first selection doped region are formed in the substrate and coupled between a BL connection terminal and a first edge one of the composite gate structure. A second selection doped region is formed in the substrate and coupled between a second edge one of the composite gate structures and a voltage terminal.
    • 一种非易失性存储器件,包括沿着位线(BL)方向串联形成在衬底上的复合栅极结构。 复合栅极结构中的每一个在两个存储栅极之间具有第一存储栅极,第二存储栅极和选择栅极。 复合栅极结构中的每一个分别耦合到两个存储栅极处的两个世界线(WL)连接端子和选择栅极处的选择端子。 每个存储门对应于存储器位单元。 多个掺杂区域在复合栅极结构之间的衬底中。 第一选择掺杂区域形成在衬底中并且耦合在BL连接端子和复合栅极结构中的第一边缘之间。 第二选择掺杂区域形成在衬底中并且耦合在复合栅极结构之一的第二边缘和电压端子之间。