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1. 发明申请

US20050118802A1 Method for implementing poly pre-doping in deep sub-micron process 审中-公开
标题翻译：在深亚微米工艺中实施多种预掺杂的方法
公开(公告)号：US20050118802A1
公开(公告)日：2005-06-02
申请号：US10991839
申请日：2004-11-18
申请人： Chang-Sheng Tsao , Yi-Hang Chen , Jung-Hui Kao , Yen-Ming Chen , Pu-Fang Chen , Lin-June Wu
发明人： Chang-Sheng Tsao , Yi-Hang Chen , Jung-Hui Kao , Yen-Ming Chen , Pu-Fang Chen , Lin-June Wu
IPC分类号： H01L21/265 , H01L21/28 , H01L21/324 , H01L21/331 , H01L29/78
CPC分类号： H01L21/28035 , H01L21/265 , H01L21/324 , H01L29/78
摘要： Method for reducing dopant contamination during the fabrication of semiconductor devices is provided. The method includes doping a first layer, such as a polysilicon layer. During a subsequent annealing process, a gas, such as nitrogen, oxygen, a combination thereof, or the like, is introduced. The gas causes a cap layer to be formed over the first layer, preventing or reducing out-diffusing of the dopants and contamination of the process chamber. In a preferred embodiment, the gas is introduced during the ramp-up stage of the annealing process. The cap layer may be removed prior to etching the first layer.
摘要翻译：提供了在制造半导体器件期间减少掺杂剂污染的方法。该方法包括掺杂第一层，例如多晶硅层。在随后的退火过程中，引入气体，例如氮气，氧气，其组合等。气体导致在第一层上形成覆盖层，防止或减少掺杂物的扩散和处理室的污染。在优选实施例中，在退火过程的加速阶段期间引入气体。在蚀刻第一层之前可以去除覆盖层。

2. 发明申请

US20050277262A1 Method for manufacturing isolation structures in a semiconductor device 审中-公开
标题翻译：用于制造半导体器件中的隔离结构的方法
公开(公告)号：US20050277262A1
公开(公告)日：2005-12-15
申请号：US10867336
申请日：2004-06-14
申请人： Chang-Sheng Tsao , Jung-Hui Kao , Yen-Ming Chen , Lin-June Wu
发明人： Chang-Sheng Tsao , Jung-Hui Kao , Yen-Ming Chen , Lin-June Wu
IPC分类号： H01L21/76 , H01L21/762
CPC分类号： C09G1/02 , C09K3/1409 , C09K3/1463 , H01L21/31053 , H01L21/76243
摘要： A method for manufacturing isolation structures in a semiconductor device includes providing a substrate with a surface. A plurality of ions are implanted below the surface of the substrate and the substrate is then annealed to form a layer below its surface. Isolation structures may then be formed in the substrate extending from the surface of the substrate to approximately the depth of the layer.
摘要翻译：一种用于制造半导体器件中的隔离结构的方法包括：提供具有表面的衬底。将多个离子注入到衬底的表面下方，然后将衬底退火以在其表面下形成一层。然后可以在从衬底的表面延伸到衬底的深度的衬底中形成隔离结构。

3. 发明授权

US07220650B2 Sidewall spacer for semiconductor device and fabrication method thereof 有权
标题翻译：用于半导体器件的侧壁间隔件及其制造方法
公开(公告)号：US07220650B2
公开(公告)日：2007-05-22
申请号：US10821438
申请日：2004-04-09
申请人： Rong-Hui Kao , Chang-Sheng Tsao , Yen-Ming Chen , Lin-June Wu
发明人： Rong-Hui Kao , Chang-Sheng Tsao , Yen-Ming Chen , Lin-June Wu
IPC分类号： H01L21/336
CPC分类号： H01L29/6659 , H01L21/2652 , H01L29/6656
摘要： An offset spacer layer for an LDD ion implantation process is formed by blanket deposition without photolithography and dry etch processes. The offset spacer layer remaining on LDD regions during an ion implantation process prevents a substrate from silicon loss and dosage contamination and has densified characteristics to improve device reliability.
摘要翻译：用于LDD离子注入工艺的偏移间隔层通过无光刻和干蚀刻工艺的覆盖沉积形成。在离子注入工艺期间残留在LDD区域上的偏移间隔层防止了衬底的硅损耗和剂量污染，并具有致密的特性以提高器件的可靠性。

4. 发明申请

US20050227446A1 Sidewall spacer for semiconductor device and fabrication method thereof 有权
标题翻译：用于半导体器件的侧壁间隔件及其制造方法
公开(公告)号：US20050227446A1
公开(公告)日：2005-10-13
申请号：US10821438
申请日：2004-04-09
申请人： Rong-Hui Kao , Chang-Sheng Tsao , Yen-Ming Chen , Lin-June Wu
发明人： Rong-Hui Kao , Chang-Sheng Tsao , Yen-Ming Chen , Lin-June Wu
IPC分类号： H01L21/265 , H01L21/336 , H01L21/8234 , H01L27/088 , H01L27/105 , H01L29/78
CPC分类号： H01L29/6659 , H01L21/2652 , H01L29/6656
摘要： An offset spacer layer for an LDD ion implantation process is formed by blanket deposition without photolithography and dry etch processes. The offset spacer layer remaining on LDD regions during an ion implantation process prevents a substrate from silicon loss and dosage contamination and has densified characteristics to improve device reliability.
摘要翻译：用于LDD离子注入工艺的偏移间隔层通过无光刻和干蚀刻工艺的覆盖沉积形成。在离子注入工艺期间残留在LDD区域上的偏移间隔层防止了衬底的硅损耗和剂量污染，并具有致密的特性以提高器件的可靠性。

5. 发明申请

US20130285632A1 Soft Start Scheme Under Low Voltage Power 有权
标题翻译：低压电源下软启动方案
公开(公告)号：US20130285632A1
公开(公告)日：2013-10-31
申请号：US13594896
申请日：2012-08-27
申请人： Chih-Ning Chen , Yen-Ming Chen
发明人： Chih-Ning Chen , Yen-Ming Chen
IPC分类号： G05F1/10
CPC分类号： H02M1/36 , H03F3/45192 , H03F2203/45674
摘要： A soft start circuit includes an error amplifier for generating a control signal according to an input voltage, a feedback voltage and a reference voltage, a feedback circuit for generating the feedback voltage according to an output voltage, an internal voltage source for generating a soft start voltage, and a sink circuit including a first transformation module for generating a first transformation current according to the soft start voltage, a second transformation module for generating a second transformation current according to the feedback voltage, a comparison module coupled to the first transformation module and the second transformation module for generating a comparison result according to the first transformation current and the second transformation current, and an output module coupled to the comparison module for generating a sink current according to the comparison result, so as to control the control signal.
摘要翻译：软启动电路包括误差放大器，用于根据输入电压，反馈电压和参考电压产生控制信号，用于根据输出电压产生反馈电压的反馈电路，用于产生软启动的内部电压源电压和宿电路，包括用于根据软启动电压产生第一变换电流的第一变换模块，用于根据反馈电压产生第二变换电流的第二变换模块，耦合到第一变换模块的比较模块和用于根据第一变换电流和第二变换电流产生比较结果的第二变换模块，以及耦合到比较模块的输出模块，用于根据比较结果产生吸收电流，以便控制控制信号。

6. 发明授权

US08497584B2 Method to improve bump reliability for flip chip device 有权
标题翻译：提高倒装芯片器件的突发可靠性的方法
公开(公告)号：US08497584B2
公开(公告)日：2013-07-30
申请号：US10810965
申请日：2004-03-26
申请人： Yen-Ming Chen , Chia-Fu Lin , Shun-Liang Hsu , Kai-Ming Ching , Hsin-Hui Lee , Chao-Yuan Su , Li-Chih Chen
发明人： Yen-Ming Chen , Chia-Fu Lin , Shun-Liang Hsu , Kai-Ming Ching , Hsin-Hui Lee , Chao-Yuan Su , Li-Chih Chen
IPC分类号： H01L23/48
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05171 , H01L2224/05572 , H01L2224/05644 , H01L2224/1147 , H01L2224/11472 , H01L2224/11912 , H01L2224/13006 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/15787 , H01L2924/30107 , H01L2924/351 , H01L2224/05552 , H01L2924/00 , H01L2924/00014
摘要： A new method is provided for the creation of a solder bump. Conventional methods are initially followed, creating a patterned layer of Under Bump Metal over the surface of a contact pad. A layer of photoresist is next deposited, this layer of photoresist is patterned and developed creating a resist mask having a T-shape opening aligned with the contact pad. This T-shaped opening is filled with a solder compound, creating a T-shaped layer of solder compound on the surface of the layer of UBM. The layer of photoresist is removed, exposing the created T-shaped layer of solder compound, further exposing the layer of UBM. The layer of UBM is etched using the T-shaped layer of solder compound as a mask. Reflow of the solder compound results in creating a solder ball.
摘要翻译：提供了一种创建焊料凸块的新方法。最初遵循常规方法，在接触垫的表面上形成凹凸金属图案层。随后沉积一层光致抗蚀剂，该光致抗蚀剂层被图案化和显影，产生具有与接触焊盘对准的T形开口的抗蚀剂掩模。该T形开口填充有焊料化合物，在UBM层的表面上形成T形焊料化合物层。去除光致抗蚀剂层，暴露所生成的T形焊料化合物层，进一步暴露UBM层。使用焊料化合物的T形层作为掩模蚀刻UBM层。焊料复合物的回流导致产生焊球。

7. 发明申请

US20120322265A1 POLY OPENING POLISH PROCESS 有权
公开(公告)号：US20120322265A1
公开(公告)日：2012-12-20
申请号：US13162776
申请日：2011-06-17
申请人： Chun-Wei HSU , Po-Cheng Huang , Teng-Chun Tsai , Chia-Lin Hsu , Chih-Hsun Lin , Chang-Hung Kung , Chia-His Chen , Yen-Ming Chen
发明人： Chun-Wei HSU , Po-Cheng Huang , Teng-Chun Tsai , Chia-Lin Hsu , Chih-Hsun Lin , Chang-Hung Kung , Chia-His Chen , Yen-Ming Chen
IPC分类号： H01L21/304 , H01L21/306
CPC分类号： H01L21/31053 , H01L21/02065 , H01L29/517 , H01L29/66545
摘要： A poly opening polish process includes the following steps. A semi-finished semiconductor component is provided. The semi-finished semiconductor component includes a substrate, a gate disposed on the substrate, and a dielectric layer disposed on the substrate and covering the gate. A first polishing process is applied onto the dielectric layer. A second polishing process is applied to the gate. The second polishing process utilizes a wetting solution including a water soluble polymer surfactant, an alkaline compound and water. The poly opening polish process can effectively remove an oxide residue formed in the chemical mechanical polish, thereby improving the performance of the integrated circuit and reducing the production cost of the integrated circuit.
摘要翻译：多孔抛光工艺包括以下步骤。提供半成品半导体元件。半成品半导体部件包括基板，设置在基板上的栅极和设置在基板上并覆盖栅极的电介质层。将第一抛光工艺施加到电介质层上。第二次抛光工艺应用于浇口。第二抛光工艺利用包含水溶性聚合物表面活性剂，碱性化合物和水的润湿溶液。多孔抛光工艺可有效去除化学机械抛光中形成的氧化物残留物，从而提高集成电路的性能，降低集成电路的生产成本。

8. 发明申请

US20120264302A1 CHEMICAL MECHANICAL POLISHING PROCESS 审中-公开
标题翻译：化学机械抛光工艺
公开(公告)号：US20120264302A1
公开(公告)日：2012-10-18
申请号：US13085502
申请日：2011-04-13
申请人： Chun-Wei Hsu , Teng-Chun Tsai , Chia-Lin Hsu , Po-Cheng Huang , Chia-Hsi Chen , Yen-Ming Chen , Chih-Hsun Lin
发明人： Chun-Wei Hsu , Teng-Chun Tsai , Chia-Lin Hsu , Po-Cheng Huang , Chia-Hsi Chen , Yen-Ming Chen , Chih-Hsun Lin
IPC分类号： H01L21/306
CPC分类号： H01L21/31053 , H01L21/02065 , H01L21/76224 , H01L29/66545
摘要： A chemical mechanical polishing (CMP) process includes steps of providing a substrate, performing a first polishing step to the substrate with an acidic slurry, and performing a second polishing step to the substrate with a basic slurry after the first polishing step.
摘要翻译：化学机械抛光（CMP）工艺包括以下步骤：提供基材，用酸性浆料对基材进行第一抛光步骤，以及在第一抛光步骤之后用碱性浆料对基材进行第二抛光步骤。

9. 发明申请

US20120256275A1 METAL GATE STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：金属门结构及其制造方法
公开(公告)号：US20120256275A1
公开(公告)日：2012-10-11
申请号：US13081479
申请日：2011-04-06
申请人： Hsin-Fu Huang , Chi-Mao Hsu , Kun-Hsien Lin , Chin-Fu Lin , Tzung-Ying Lee , Min-Chuan Tsai , Yi-Wei Chen , Bin-Siang Tsai , Ted Ming-Lang Guo , Ger-Pin Lin , Yu-Ling Liang , Yen-Ming Chen , Tsai-Yu Wen
发明人： Hsin-Fu Huang , Chi-Mao Hsu , Kun-Hsien Lin , Chin-Fu Lin , Tzung-Ying Lee , Min-Chuan Tsai , Yi-Wei Chen , Bin-Siang Tsai , Ted Ming-Lang Guo , Ger-Pin Lin , Yu-Ling Liang , Yen-Ming Chen , Tsai-Yu Wen
IPC分类号： H01L29/772 , H01L21/283
CPC分类号： H01L21/823857 , H01L21/823842 , H01L29/4966 , H01L29/66545 , H01L29/7833
摘要： A manufacturing method of a metal gate structure includes first providing a substrate having a dummy gate formed thereon. The dummy gate includes a high-K gate dielectric layer, a bottom barrier layer, a first etch stop layer and a sacrificial layer sequentially and upwardly stacked on the substrate. Then, the sacrificial layer is removed to form a gate trench with the first etch stop layer exposed on the bottom of the gate trench. After forming the gate trench, a first work function metal layer is formed in the gate trench.
摘要翻译：金属栅极结构的制造方法包括首先提供其上形成有虚拟栅极的衬底。虚拟栅极包括高K栅极电介质层，底部阻挡层，第一蚀刻停止层和依次且向上堆叠在基板上的牺牲层。然后，去除牺牲层以形成栅极沟槽，其中第一蚀刻停止层暴露在栅极沟槽的底部。在形成栅极沟槽之后，在栅极沟槽中形成第一功函数金属层。

10. 发明申请

US20120236613A1 ELECTRONIC DEVICE 有权
标题翻译：电子设备
公开(公告)号：US20120236613A1
公开(公告)日：2012-09-20
申请号：US13421370
申请日：2012-03-15
申请人： Yen-Ming Chen , Wei-Lu Wang
发明人： Yen-Ming Chen , Wei-Lu Wang
IPC分类号： H02M7/06
CPC分类号： G06F1/26 , H02M2001/0032 , Y02B70/16
摘要： An electronic device including a power switch, a switch unit, a power supply unit and a control unit is provided. Two power ends of the power switch are connected in parallel with two connecting terminals of the switch unit. The power supply unit generates a system voltage by a power come from the power switch or the switch unit. When the two power ends of the power switch are conducted for a predetermined time, the power is provided to the power supply unit and the electronic device starts up. Furthermore, the control unit controls the switch unit to conduct the two connecting terminals, so that the power is still provided to the power supply unit through the switch unit after the two power ends are disconnected. When the electronic device is shut down, the control unit controls the switch unit to disconnect the two connecting terminals.
摘要翻译：提供了包括电源开关，开关单元，电源单元和控制单元的电子设备。电源开关的两个电源端与开关单元的两个连接端子并联连接。电源单元通过来自电源开关或开关单元的电源产生系统电压。当电源开关的两个电源端进行预定时间时，电源被提供给电源单元并且电子设备启动。此外，控制单元控制开关单元导通两个连接端子，使得在断开两个电源端之后，仍然通过开关单元将电力提供给电源单元。当电子设备关闭时，控制单元控制开关单元断开两个连接端子。

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