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1. 发明授权

US08000154B2 Non-volatile memory device and method of controlling a bulk voltage thereof 失效
标题翻译：非易失性存储器件及其体电压的控制方法
公开(公告)号：US08000154B2
公开(公告)日：2011-08-16
申请号：US12130931
申请日：2008-05-30
申请人： Chae Kyu Jang , Jong Hyun Wang , Suk Yun , Seong Hun Park
发明人： Chae Kyu Jang , Jong Hyun Wang , Suk Yun , Seong Hun Park
IPC分类号： G11C5/14
CPC分类号： G11C16/10 , G11C16/349
摘要： A non-volatile memory device comprises a voltage supplier comprising memory cells in which the voltage supplier supplies a positive set voltage to a bulk of a memory cell array at the time of a read operation of the memory cells and a controller for controlling the voltage supplier to set and supply a bulk voltage depending on a number of erase/program cycles of the memory cell array.
摘要翻译：非易失性存储器件包括电压供应器，其包括存储器单元，其中电压供应器在存储器单元的读取操作时向存储单元阵列的大部分提供正设定电压，以及用于控制电压供应器以根据存储器单元阵列的擦除/编程周期的数量来设置和提供体电压。

2. 发明申请

US20090122615A1 NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME 有权
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US20090122615A1
公开(公告)日：2009-05-14
申请号：US12049253
申请日：2008-03-14
申请人： Chae Kyu Jang , Joong Seob Yang , Duck Ju Kim , Jong Hyun Wang , Seong Hun Park
发明人： Chae Kyu Jang , Joong Seob Yang , Duck Ju Kim , Jong Hyun Wang , Seong Hun Park
IPC分类号： G11C16/06
CPC分类号： G11C16/349
摘要： Program voltages of a non-volatile memory device are controlled variably according to a program/erase operation count. The non-volatile memory device includes a program voltage supply unit for applying a program voltage to a memory cell, a program/erase count storage unit for storing a total program/erase operation count of the non-volatile memory device, a program start voltage storage unit for storing levels of program start voltages to be differently supplied according to the program/erase operation count, and a program voltage controller for controlling the program start voltage according to the program/erase operation count.
摘要翻译：根据编程/擦除操作计数可变地控制非易失性存储器件的编程电压。非易失性存储器件包括用于将程序电压施加到存储单元的编程电压供应单元，用于存储非易失性存储器件的总编程/擦除操作计数的程序/擦除计数存储单元，程序启动电压存储单元，用于存储根据编程/擦除操作计数而不同地提供的程序启动电压的电平;以及编程电压控制器，用于根据编程/擦除操作计数来控制程序启动电压。

3. 发明授权

US07796434B2 Non-volatile memory device and method of operating the same 有权
标题翻译：非易失性存储器件及其操作方法
公开(公告)号：US07796434B2
公开(公告)日：2010-09-14
申请号：US12049253
申请日：2008-03-14
申请人： Chae Kyu Jang , Joong Seob Yang , Duck Ju Kim , Jong Hyun Wang , Seong Hun Park
发明人： Chae Kyu Jang , Joong Seob Yang , Duck Ju Kim , Jong Hyun Wang , Seong Hun Park
IPC分类号： G11C16/04
CPC分类号： G11C16/349
摘要： Program voltages of a non-volatile memory device are controlled variably according to a program/erase operation count. The non-volatile memory device includes a program voltage supply unit for applying a program voltage to a memory cell, a program/erase count storage unit for storing a total program/erase operation count of the non-volatile memory device, a program start voltage storage unit for storing levels of program start voltages to be differently supplied according to the program/erase operation count, and a program voltage controller for controlling the program start voltage according to the program/erase operation count.
摘要翻译：根据编程/擦除操作计数可变地控制非易失性存储器件的编程电压。非易失性存储器件包括用于将程序电压施加到存储单元的编程电压供应单元，用于存储非易失性存储器件的总编程/擦除操作计数的程序/擦除计数存储单元，程序启动电压存储单元，用于存储根据编程/擦除操作计数而不同地提供的程序启动电压的电平;以及编程电压控制器，用于根据编程/擦除操作计数来控制程序启动电压。

4. 发明授权

US08365026B2 Methods for performing fail test, block management, erasing and programming in a nonvolatile memory device 失效
标题翻译：用于在非易失性存储器件中执行故障测试，块管理，擦除和编程的方法
公开(公告)号：US08365026B2
公开(公告)日：2013-01-29
申请号：US12130994
申请日：2008-05-30
申请人： Jong Hyun Wang , Chae Kyu Jang , Se Chun Park
发明人： Jong Hyun Wang , Chae Kyu Jang , Se Chun Park
IPC分类号： G11C29/44 , G11C29/56
CPC分类号： G11C29/44 , G11C29/82 , G11C2029/1208 , G11C2029/4402
摘要： Methods for performing a fail test, block management, erase operations and program operations are used in a nonvolatile memory device having a block switch devoid of a fuse and a PMOS transistor. A method for performing a fail test in a nonvolatile memory device includes performing a fail test for a memory cell block; storing good block information in a block information store associated with the corresponding block when the memory cell block is a good block; and repeating the performing and storing steps for all memory cell blocks.
摘要翻译：在具有不具有熔丝和PMOS晶体管的块开关的非易失性存储器件中使用用于执行故障测试，块管理，擦除操作和编程操作的方法。用于在非易失性存储器件中执行故障测试的方法包括执行存储器单元块的故障测试; 当所述存储器单元块是良好块时，将良好块信息存储在与相应块相关联的块信息存储器中; 并重复执行和存储所有存储单元块的步骤。

5. 发明申请

US20090172482A1 METHODS FOR PERFORMING FAIL TEST, BLOCK MANAGEMENT, ERASING AND PROGRAMMING IN A NONVOLATILE MEMORY DEVICE 失效
标题翻译：在非易失性存储器件中执行失败测试，块管理，擦除和编程的方法
公开(公告)号：US20090172482A1
公开(公告)日：2009-07-02
申请号：US12130994
申请日：2008-05-30
申请人： Jong Hyun WANG , Chae Kyu Jang , Se Chun Park
发明人： Jong Hyun WANG , Chae Kyu Jang , Se Chun Park
IPC分类号： G11C29/08 , G06F11/26
CPC分类号： G11C29/44 , G11C29/82 , G11C2029/1208 , G11C2029/4402
摘要： Methods for performing a fail test, block management, erase operations and program operations are used in a nonvolatile memory device having a block switch devoid of a fuse and a PMOS transistor. A method for performing a fail test in a nonvolatile memory device includes performing a fail test for a memory cell block; storing good block information in a block information store associated with the corresponding block when the memory cell block is a good block; and repeating the performing and storing steps for all memory cell blocks.
摘要翻译：在具有不具有熔丝和PMOS晶体管的块开关的非易失性存储器件中使用用于执行故障测试，块管理，擦除操作和编程操作的方法。用于在非易失性存储器件中执行故障测试的方法包括执行存储器单元块的故障测试; 当所述存储器单元块是良好块时，将良好块信息存储在与相应块相关联的块信息存储器中; 并重复执行和存储所有存储单元块的步骤。

6. 发明授权

US08587369B2 Down-converting voltage generating circuit 有权
标题翻译：下变频电压发生电路
公开(公告)号：US08587369B2
公开(公告)日：2013-11-19
申请号：US13339034
申请日：2011-12-28
申请人： Chae Kyu Jang , Jong Hyun Wang , Sang Don Lee
发明人： Chae Kyu Jang , Jong Hyun Wang , Sang Don Lee
IPC分类号： G05F3/16 , G05F3/24
CPC分类号： G05F1/56
摘要： A down-converting voltage generating circuit includes a reference voltage providing unit, an initial setting unit, a driving unit, and a driving force control unit. The reference voltage providing unit provides a reference voltage to a first node. The initial setting unit drops a voltage level of the first node to substantially a level of a ground voltage when an initial setting signal is activated. The driving unit drives a down-converted voltage derived from an external voltage in response to the voltage level of the first node. The driving force control unit is connected to the driving unit, and controls a driving force for driving the down-converted voltage of the driving unit in response to the initial setting signal.
摘要翻译：下变频电压发生电路包括基准电压提供单元，初始设定单元，驱动单元和驱动力控制单元。参考电压提供单元向第一节点提供参考电压。当初始设置信号被激活时，初始设置单元将第一节点的电压电平降低到接地电压的大致水平。驱动单元驱动响应于第一节点的电压电平从外部电压导出的下变频电压。驱动力控制单元连接到驱动单元，并且响应于初始设置信号控制用于驱动驱动单元的下变频电压的驱动力。

7. 发明授权

US08189388B2 Fuse circuit and flash memory device having the same 有权
标题翻译：保险丝电路和具有相同功能的闪存器件
公开(公告)号：US08189388B2
公开(公告)日：2012-05-29
申请号：US12839277
申请日：2010-07-19
申请人： Chae Kyu Jang
发明人： Chae Kyu Jang
IPC分类号： G11C11/34 , G11C16/06 , G11C17/00 , G11C17/18
CPC分类号： G11C17/16 , G11C17/18 , G11C29/785
摘要： A flash memory device includes a main cell array configured to have main memory cells for storing data and a redundancy cell array configured to have redundancy memory cells for repairing a failed memory cell of the main cell array. A page buffer circuit is configured to perform a program operation, a verifying operation and a read operation on the main cell array and the redundancy cell array. A repair circuit includes fuse circuits having fuse memory cells each of which is programmed in response to address information. The repair circuit is operated in response to a program state of the fuse memory cells and output a repair signal. A data input/output controller is configured to control input/output of data to/from the main memory cell or the redundancy memory cell in accordance with the repair signal outputted by the repair circuit.
摘要翻译：闪存器件包括：主单元阵列，被配置为具有用于存储数据的主存储单元;冗余单元阵列，被配置为具有用于修复主单元阵列的故障存储单元的冗余存储单元。页缓冲电路被配置为对主单元阵列和冗余单元阵列执行编程操作，验证操作和读操作。修复电路包括具有熔丝存储单元的熔丝电路，每个熔丝电路根据地址信息进行编程。修复电路响应于保险丝存储器单元的编程状态而被操作并输出修复信号。数据输入/输出控制器被配置为根据由修复电路输出的修复信号来控制到主存储器单元或冗余存储单元的数据输入/输出。

8. 发明申请

US20100284222A1 FUSE CIRCUIT AND FLASH MEMORY DEVICE HAVING THE SAME 有权
标题翻译：保险丝电路和具有该保险丝的闪存存储器件
公开(公告)号：US20100284222A1
公开(公告)日：2010-11-11
申请号：US12839277
申请日：2010-07-19
申请人： Chae Kyu Jang
发明人： Chae Kyu Jang
IPC分类号： G11C16/06 , G11C17/16
CPC分类号： G11C17/16 , G11C17/18 , G11C29/785
摘要： A flash memory device includes a main cell array configured to have main memory cells for storing data and a redundancy cell array configured to have redundancy memory cells for repairing a failed memory cell of the main cell array. A page buffer circuit is configured to perform a program operation, a verifying operation and a read operation on the main cell array and the redundancy cell array. A repair circuit includes fuse circuits having fuse memory cells each of which is programmed in response to address information. The repair circuit is operated in response to a program state of the fuse memory cells and output a repair signal. A data input/output controller is configured to control input/output of data to/from the main memory cell or the redundancy memory cell in accordance with the repair signal outputted by the repair circuit.
摘要翻译：闪存器件包括：主单元阵列，被配置为具有用于存储数据的主存储单元;冗余单元阵列，被配置为具有用于修复主单元阵列的故障存储单元的冗余存储单元。页缓冲电路被配置为对主单元阵列和冗余单元阵列执行编程操作，验证操作和读操作。修复电路包括具有熔丝存储单元的熔丝电路，每个熔丝电路根据地址信息进行编程。修复电路响应于保险丝存储器单元的编程状态而被操作并输出修复信号。数据输入/输出控制器被配置为根据由修复电路输出的修复信号来控制到主存储器单元或冗余存储单元的数据输入/输出。

9. 发明申请

US20100008137A1 NONVOLATILE MEMORY DEVICE AND PROGRAM OR ERASE METHOD USING THE SAME 失效
标题翻译：非易失性存储器件和使用其的程序或擦除方法
公开(公告)号：US20100008137A1
公开(公告)日：2010-01-14
申请号：US12493288
申请日：2009-06-29
申请人： Chae Kyu Jang , Seung Ho Chang , Young Soo Park , Jae Yun Kim , Se Chun Park
发明人： Chae Kyu Jang , Seung Ho Chang , Young Soo Park , Jae Yun Kim , Se Chun Park
IPC分类号： G11C16/06 , G11C16/04 , G11C7/06
CPC分类号： G11C16/10 , G11C16/14 , G11C16/28 , G11C16/30
摘要： A nonvolatile memory device includes a comparison unit configured to compare a reference voltage and a voltage of each of a plurality of nodes of a sample memory cell string, a state storage unit configured to store state information of each of memory cells depending on the corresponding comparison result of the comparison unit, and a high voltage generation unit configured to change a program start voltage depending on data stored in the state storage unit.
摘要翻译：非易失性存储器件包括：比较单元，被配置为比较采样存储单元串的多个节点的参考电压和电压;状态存储单元，被配置为根据相应的比较来存储每个存储器单元的状态信息比较单元的结果，以及被配置为根据存储在状态存储单元中的数据来改变程序开始电压的高电压生成单元。

10. 发明授权

US07499363B2 Semiconductor memory apparatus capable of reducing ground noise 有权
标题翻译：能够降低地面噪声的半导体存储装置
公开(公告)号：US07499363B2
公开(公告)日：2009-03-03
申请号：US11637080
申请日：2006-12-12
申请人： Dong Keun Kim , Chae Kyu Jang
发明人： Dong Keun Kim , Chae Kyu Jang
IPC分类号： G11C5/14 , G11C5/06 , G11C8/00
CPC分类号： G11C5/14 , G11C7/02
摘要： A semiconductor memory apparatus includes a bank that includes a core block where a memory cell array is disposed and a control block to drive the memory cell array, a ground power supply pad that is supplied with a ground power through a ground line, a switch that connects the ground line and the core block, and a block control unit that controls an on/off operation of the switch.
摘要翻译：一种半导体存储装置，具备包括配置有存储单元阵列的芯块和驱动存储单元阵列的控制块的存储体，通过地线提供接地电力的接地电源焊盘，连接地线和核心块，以及块控制单元，其控制开关的开/关操作。

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