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    • 2. 发明申请
    • DOWN-CONVERTING VOLTAGE GENERATING CIRCUIT
    • 下变频电压发生电路
    • US20120306470A1
    • 2012-12-06
    • US13339034
    • 2011-12-28
    • Chae Kyu JANGJong Hyun WANGSang Don LEE
    • Chae Kyu JANGJong Hyun WANGSang Don LEE
    • G05F3/08
    • G05F1/56
    • A down-converting voltage generating circuit includes a reference voltage providing unit, an initial setting unit, a driving unit, and a driving force control unit. The reference voltage providing unit provides a reference voltage to a first node. The initial setting unit drops a voltage level of the first node to substantially a level of a ground voltage when an initial setting signal is activated. The driving unit drives a down-converted voltage derived from an external voltage in response to the voltage level of the first node. The driving force control unit is connected to the driving unit, and controls a driving force for driving the down-converted voltage of the driving unit in response to the initial setting signal.
    • 下变频电压发生电路包括基准电压提供单元,初始设定单元,驱动单元和驱动力控制单元。 参考电压提供单元向第一节点提供参考电压。 当初始设置信号被激活时,初始设置单元将第一节点的电压电平降低到接地电压的大致水平。 驱动单元驱动响应于第一节点的电压电平从外部电压导出的下变频电压。 驱动力控制单元连接到驱动单元,并且响应于初始设置信号控制用于驱动驱动单元的下变频电压的驱动力。
    • 3. 发明申请
    • NON-VOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING A MULTI LEVEL CELL IN THE SAME
    • 非易失性记忆体装置及其编程多级细胞的方法
    • US20080158953A1
    • 2008-07-03
    • US11765518
    • 2007-06-20
    • Jong Hyun WANGSe Chun ParkSeong Hun Park
    • Jong Hyun WANGSe Chun ParkSeong Hun Park
    • G11C11/34
    • G11C11/5628G11C2211/5642
    • A non-volatile memory device of the present invention includes a page buffer having a bit line selecting circuit, a first register, a second register, a data comparing circuit, a first bit line voltage controller, and a second bit line voltage controller. The bit line selecting circuit couples selectively a certain bit line to a sensing node. The first register and the second register store given data. The data comparing circuit compares the data stored in the first register with the data stored in the second register, and transmits the comparison result to the sensing node. The first bit line voltage controller applies a voltage of low level to the bit line in accordance with a voltage level of the data stored in the first register. The second bit line voltage controller applies a selected first voltage of high level to the bit line in accordance with the data stored in the second register.
    • 本发明的非易失性存储器件包括具有位线选择电路,第一寄存器,第二寄存器,数据比较电路,第一位线电压控制器和第二位线电压控制器的页缓冲器。 位线选择电路将特定位线选择性地耦合到感测节点。 第一个寄存器和第二个寄存器存储给定的数据。 数据比较电路将存储在第一寄存器中的数据与存储在第二寄存器中的数据进行比较,并将比较结果发送到感测节点。 第一位线电压控制器根据存储在第一寄存器中的数据的电压电平向位线施加低电平的电压。 第二位线电压控制器根据存储在第二寄存器中的数据将所选择的高电平的第一电压施加到位线。
    • 6. 发明申请
    • METHOD OF PROGRAMMING DATA IN A FLASH MEMORY DEVICE
    • 在闪速存储器件中编程数据的方法
    • US20080175064A1
    • 2008-07-24
    • US11771792
    • 2007-06-29
    • Jong Hyun WANG
    • Jong Hyun WANG
    • G11C11/34
    • G11C16/10G11C11/5628G11C16/3454G11C2211/5621
    • A method of programming a most significant bit (MSB) data to a multi-level cell in a flash memory device including first and second cells includes performing a first program operation on the first cell using a first program voltage, the first cell being in a first state when the first program operation is performed on the first cell; if the first cell is determined to be in a second state after the first program operation, defining a second program voltage based on a result of comparing the first program voltage with a start voltage predefined for a second program operation; and performing the second program operation on the second cell using the second program voltage that has been defined according to a result of the comparison between the first program voltage and the start voltage.
    • 一种将最高有效位(MSB)数据编程到包括第一和第二单元的闪存器件中的多电平单元的方法包括使用第一编程电压对第一单元执行第一编程操作,第一单元位于 当在第一单元上执行第一编程操作时的第一状态; 如果在第一编程操作之后确定第一单元处于第二状态,则基于将第一编程电压与为第二编程操作预定的启动电压进行比较的结果来定义第二编程电压; 以及使用根据第一编程电压和起始电压之间的比较结果定义的第二编程电压对第二单元执行第二编程操作。
    • 8. 发明申请
    • METHOD OF PROGRAMMING NONVOLATILE MEMORY DEVICE
    • 编程非易失性存储器件的方法
    • US20100008145A1
    • 2010-01-14
    • US12361231
    • 2009-01-28
    • Jong Hyun WANG
    • Jong Hyun WANG
    • G11C16/06
    • G11C16/10
    • A method of programming nonvolatile memory devices. According to one programming method program operation is performed by applying a dummy program pulse having a pulse width wider than a pulse width of a program start pulse. A program operation is performed by applying the program start pulse. It is then verified whether a program has been completed as a result of the program operation. According to another programming method, a program operation is performed by applying a step-shaped dummy program pulse, which has a second pulse width and has been increased by a second step voltage. A program operation is performed by applying a program pulse having a first step voltage and a first pulse width. It is then verified whether a program has been completed as a result of the program operation.
    • 一种编程非易失性存储器件的方法。 根据一种编程方法,通过应用具有比编程开始脉冲的脉冲宽度更宽的脉冲宽度的虚拟编程脉冲来执行程序操作。 通过应用程序启动脉冲来执行编程操作。 然后,由程序运行结果验证程序是否已经完成。 根据另一编程方法,通过应用具有第二脉冲宽度并已经增加了第二阶梯电压的阶梯形虚拟编程脉冲来执行编程操作。 通过施加具有第一阶跃电压和第一脉冲宽度的编程脉冲来执行编程操作。 然后,由程序运行结果验证程序是否已经完成。