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    • 6. 发明申请
    • CATALYTIC REACTION-RECTIFICATION INTEGRATED PROCESS AND SPECIALIZED DEVICE THEREOF
    • 催化反应 - 整流方法及其专用装置
    • US20110144378A1
    • 2011-06-16
    • US12745709
    • 2008-11-20
    • Zhibing ZhangZheng ZhouYouting WuMin Shao
    • Zhibing ZhangZheng ZhouYouting WuMin Shao
    • C07C67/48C07C29/80C07C41/42B01J10/00
    • C07C41/06B01D3/009B01J8/085B01J8/125B01J2219/00006C07C29/04C07C67/08Y02P20/125Y02P20/127C07C33/025C07C43/04C07C69/14
    • A catalytic reaction-rectification integrated process and a catalytic reaction-rectification integrated column (T-01), the specialized device of such process. The process comprises that the reactants are preheated and mixed with catalysts, and then fed into a jet agitation reaction section (6) located in the middle of the catalytic reaction-rectification integrated column (T-01) from a feeding inlet. The jet agitation reaction section (6) is a kettle-like reactor located in the middle of the catalytic reaction-rectification integrated column (T-01). After pressurized by a centrifugal pump (21), the reactant materials are admitted into a subsonic or transonic agitator (33) located within the reaction section (6). The reactant materials are ejected into the jet agitation reaction section (6) at high speed, to efficiently mix the solid and liquid phases in the reaction section (6) and to reinforce heat and mass transfer efficiency during the reaction. The liquid reaction mixture is separated and purified directly in the catalytic reaction-rectification integrated column (T-01). This process may be used for esterification, the production of alcohols from olefins and water, and the production of ethers from olefins and alcohols.
    • 催化反应整流一体化工艺和催化反应整流一体化塔(T-01),是这种工艺的专用装置。 该方法包括将反应物预热并与催化剂混合,然后从进料口进料到位于催化反应整流塔(T-01)中间的喷射搅拌反应段(6)中。 喷射搅拌反应段(6)是位于催化反应整流塔(T-01)中间的釜式反应器。 在通过离心泵(21)加压之后,反应物料进入位于反应段(6)内的亚音速或跨音速搅拌器(33)。 将反应物质高速喷射到喷射搅拌反应段(6)中,以有效地混合反应段(6)中的固相和液相,并加强反应过程中的传质和传质效率。 将液体反应混合物直接在催化反应整流柱(T-01)中分离和纯化。 该方法可用于酯化,由烯烃和水生产醇,以及由烯烃和醇生产醚。
    • 8. 发明授权
    • De-registration method, home NodeB (HNB), and home NodeB gateway (HNB GW)
    • 取消登记方法,家庭NodeB(HNB)和家庭NodeB网关(HNB GW)
    • US08311544B2
    • 2012-11-13
    • US13071912
    • 2011-03-25
    • Zheng Zhou
    • Zheng Zhou
    • H04Q7/20
    • H04W60/06H04W76/30H04W84/045
    • The present invention relates to the field of communication technology, and a de-registration method, a Home NodeB (HNB) and a Home NodeB Gateway (HNB GW) are disclosed. In an embodiment, the present invention provides a de-registration method, comprising: initiating, by an HNB GW, release of pre-registration resources corresponding to user equipment (UE) after the HNB GW receives indication information indicating that the UE moves to another cell from a source HNB. Applying the embodiment of the present invention can release pre-registration resources in time and reduce waste of resources.
    • 本发明涉及通信技术领域,并且公开了一种解除注册方法,家庭节点B(HNB)和家庭节点B网关(HNB GW)。 在一个实施例中,本发明提供一种去注册方法,包括:在HNB GW接收到指示UE移动到另一个的指示信息之后,由HNB GW发起对应于用户设备(UE)的预注册资源的释放 来自源HNB的单元。 应用本发明的实施例可以及时释放预注册资源,减少资源浪费。
    • 10. 发明授权
    • Method to form shallow trench isolations
    • 形成浅沟槽隔离的方法
    • US06649486B1
    • 2003-11-18
    • US09679510
    • 2000-10-06
    • Subramanian BalakumarKong Hean LeeZheng ZhouXian Bin Wang
    • Subramanian BalakumarKong Hean LeeZheng ZhouXian Bin Wang
    • H01L2176
    • H01L21/76229
    • A new method of fabricating shallow trench isolations has been achieved. A pad oxide layer is formed overlying a semiconductor substrate. A silicon nitride layer is deposited overlying the pad oxide layer. A protective layer is deposited overlying the silicon nitride layer. The protective layer, the silicon nitride layer, and the pad oxide layer are patterned to expose the semiconductor substrate where shallow trench isolations are planned. The semiconductor substrate is etched to form trenches for the planned shallow trench isolations. A large trench etching angle is used. The presence of the protective layer prevents loss of the silicon nitride layer during the etching. A trench filling layer is deposited overlying the protective layer and filling the trenches. The trench filling layer and the protective layer are polished down to complete the shallow trench isolations in the manufacture of the integrated circuit device.
    • 已经实现了制造浅沟槽隔离的新方法。 在半导体衬底上形成焊盘氧化物层。 在衬垫氧化物层上沉积氮化硅层。 覆盖氮化硅层的保护层被沉积。 对保护层,氮化硅层和焊盘氧化物层进行图案化以暴露其中规划浅沟槽隔离的半导体衬底。 蚀刻半导体衬底以形成用于规划的浅沟槽隔离的沟槽。 使用大的沟槽蚀刻角度。 保护层的存在防止在蚀刻期间氮化硅层的损失。 沉积沟槽填充层,覆盖保护层并填充沟槽。 在集成电路器件的制造中,沟槽填充层和保护层被抛光以完成浅沟槽隔离。